output.mod

TQ公司的STK16x开发系统的源码

MODEL
MODEL_VERSION "1.0";
DESIGN "output";
DATE "Wed May 28 08:19:27 2003";
VENDOR "Lattice Semiconductor Corporation";
PROGRAM "STAMP Model Generator";

/* port name and type */
INPUT adresse_0;
INPUT adresse_1;
INPUT adresse_2;
INPUT adresse_3;
INPUT adresse_4;
INPUT adresse_5;
INPUT cs;
INPUT rd;
INPUT reset;
INPUT wr;
OUTPUT p2_0;
OUTPUT p2_1;
OUTPUT p2_2;
OUTPUT p2_3;
OUTPUT p2_4;
OUTPUT p2_5;
OUTPUT p2_6;
OUTPUT p2_7;
OUTPUT p7_0;
OUTPUT p7_1;
OUTPUT p7_2;
OUTPUT p7_3;
OUTPUT p8_6;
OUTPUT p8_7;
INOUT data_0;
INOUT data_1;
INOUT data_2;
INOUT data_3;
INOUT data_4;
INOUT data_5;
INOUT data_6;
INOUT data_7;

/* timing arc definitions */
reset_p2_0_delay: DELAY reset p2_0;
reset_p2_1_delay: DELAY reset p2_1;
reset_p2_2_delay: DELAY reset p2_2;
reset_p2_3_delay: DELAY reset p2_3;
reset_p2_4_delay: DELAY reset p2_4;
reset_p2_5_delay: DELAY reset p2_5;
reset_p2_6_delay: DELAY reset p2_6;
reset_p2_7_delay: DELAY reset p2_7;
reset_p7_0_delay: DELAY reset p7_0;
reset_p7_1_delay: DELAY reset p7_1;
reset_p7_2_delay: DELAY reset p7_2;
reset_p7_3_delay: DELAY reset p7_3;
reset_p8_6_delay: DELAY reset p8_6;
reset_p8_7_delay: DELAY reset p8_7;
adresse_5_p2_0_delay: DELAY adresse_5 p2_0;
adresse_5_p2_1_delay: DELAY adresse_5 p2_1;
adresse_5_p2_2_delay: DELAY adresse_5 p2_2;
adresse_5_p2_3_delay: DELAY adresse_5 p2_3;
adresse_5_p2_4_delay: DELAY adresse_5 p2_4;
adresse_5_p2_5_delay: DELAY adresse_5 p2_5;
adresse_5_p2_6_delay: DELAY adresse_5 p2_6;
adresse_5_p2_7_delay: DELAY adresse_5 p2_7;
adresse_5_p7_0_delay: DELAY adresse_5 p7_0;
adresse_5_p7_1_delay: DELAY adresse_5 p7_1;
adresse_5_p7_2_delay: DELAY adresse_5 p7_2;
adresse_5_p7_3_delay: DELAY adresse_5 p7_3;
adresse_5_p8_6_delay: DELAY adresse_5 p8_6;
adresse_5_p8_7_delay: DELAY adresse_5 p8_7;
adresse_5_data_0_delay: DELAY adresse_5 data_0;
adresse_5_data_1_delay: DELAY adresse_5 data_1;
adresse_5_data_2_delay: DELAY adresse_5 data_2;
adresse_5_data_3_delay: DELAY adresse_5 data_3;
adresse_5_data_4_delay: DELAY adresse_5 data_4;
adresse_5_data_5_delay: DELAY adresse_5 data_5;
adresse_5_data_6_delay: DELAY adresse_5 data_6;
adresse_5_data_7_delay: DELAY adresse_5 data_7;

/* timing check arc definitions */
adresse_0_adresse_5_setup: SETUP(POSEDGE) adresse_0 adresse_5;
adresse_0_adresse_5_hold: HOLD(POSEDGE) adresse_0 adresse_5;
adresse_1_adresse_5_setup: SETUP(POSEDGE) adresse_1 adresse_5;
adresse_1_adresse_5_hold: HOLD(POSEDGE) adresse_1 adresse_5;
adresse_2_adresse_5_setup: SETUP(POSEDGE) adresse_2 adresse_5;
adresse_2_adresse_5_hold: HOLD(POSEDGE) adresse_2 adresse_5;
adresse_3_adresse_5_setup: SETUP(POSEDGE) adresse_3 adresse_5;
adresse_3_adresse_5_hold: HOLD(POSEDGE) adresse_3 adresse_5;
adresse_4_adresse_5_setup: SETUP(POSEDGE) adresse_4 adresse_5;
adresse_4_adresse_5_hold: HOLD(POSEDGE) adresse_4 adresse_5;
adresse_5_adresse_5_setup: SETUP(POSEDGE) adresse_5 adresse_5;
adresse_5_adresse_5_hold: HOLD(POSEDGE) adresse_5 adresse_5;
cs_adresse_5_setup: SETUP(POSEDGE) cs adresse_5;
cs_adresse_5_hold: HOLD(POSEDGE) cs adresse_5;
data_0_adresse_5_setup: SETUP(POSEDGE) data_0 adresse_5;
data_0_adresse_5_hold: HOLD(POSEDGE) data_0 adresse_5;
data_1_adresse_5_setup: SETUP(POSEDGE) data_1 adresse_5;
data_1_adresse_5_hold: HOLD(POSEDGE) data_1 adresse_5;
data_2_adresse_5_setup: SETUP(POSEDGE) data_2 adresse_5;
data_2_adresse_5_hold: HOLD(POSEDGE) data_2 adresse_5;
data_3_adresse_5_setup: SETUP(POSEDGE) data_3 adresse_5;
data_3_adresse_5_hold: HOLD(POSEDGE) data_3 adresse_5;
data_4_adresse_5_setup: SETUP(POSEDGE) data_4 adresse_5;
data_4_adresse_5_hold: HOLD(POSEDGE) data_4 adresse_5;
data_5_adresse_5_setup: SETUP(POSEDGE) data_5 adresse_5;
data_5_adresse_5_hold: HOLD(POSEDGE) data_5 adresse_5;
data_6_adresse_5_setup: SETUP(POSEDGE) data_6 adresse_5;
data_6_adresse_5_hold: HOLD(POSEDGE) data_6 adresse_5;
data_7_adresse_5_setup: SETUP(POSEDGE) data_7 adresse_5;
data_7_adresse_5_hold: HOLD(POSEDGE) data_7 adresse_5;
rd_adresse_5_setup: SETUP(POSEDGE) rd adresse_5;
rd_adresse_5_hold: HOLD(POSEDGE) rd adresse_5;
reset_adresse_5_setup: SETUP(POSEDGE) reset adresse_5;
reset_adresse_5_hold: HOLD(POSEDGE) reset adresse_5;
wr_adresse_5_setup: SETUP(POSEDGE) wr adresse_5;
wr_adresse_5_hold: HOLD(POSEDGE) wr adresse_5;

ENDMODEL