📄 generate_crc_32.asm
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/*****************************************************************************Copyright (c) 2005 Analog Devices. All Rights Reserved.Developed by Analog Devices Australia - Unit 3, 97 Lewis Road,Wantirna, Victoria, Australia, 3152. Email: ada.info@analog.comTHIS SOFTWARE IS PROPRIETARY & CONFIDENTIAL. By using this module youagree to the terms of the associated Analog Devices License Agreement.******************************************************************************Project: IEEE 802.16 LibraryTitle: Generate CRC 16Author(s): Luke Mawbey (luke.mawbey@analog.com)Revised by:Description: Generates a 32 bit CRC and appends it to the message, as described in section 6.3.3.5 of [1].References: [1] IEEE 802.16-2004, October 2004******************************************************************************Target Processor: ADSP-TS201Target Tools Revision: easmts 1.6.1.11*****************************************************************************/#include "generate_crc_32_tables.h".global _generate_crc_32;.section ADI.802_16.generate_crc_16;.align 2;// count table used to set the correct crc bit.var count[32] = {0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31};.section program;_generate_crc_32:.align_code 4;//PROLOGUE J27 = J27 - 28; K27 = K27 - 20;; q[J27 + 24] = XR27:24; q[K27 + 16] = YR27:24;; q[J27 + 20] = XR31:28; q[K27 + 12] = YR31:28;;//PROLOGUE ENDS J0 = J31 + _crc_32_m; R30 = 3;; R22 = [J5 += 1];; R28 = J4; K0 = K31 + count;; YXR1:0 = Q[J0 += 4];; YXR3:2 = Q[J0 += 4]; R31 = R28 and R30;; YXR5:4 = Q[J0 += 4]; R24 = lshift R28 by -2;; YXR7:6 = Q[J0 += 4]; KB0 = K0 + K31; R31 = lshift R31 by 3;; YXR9:8 = Q[J0 += 4]; R22 = NOT R22; R30 = 32;; YXR11:10 = Q [J0 += 4]; KL0 = 32;; YXR13:12 = Q [J0 += 4]; XR30 = r30 - r31; YR30 = 3;; YXR15:14 = Q [J0 += 4]; LC0 = xR24;;crc_32_loop_top: R24 = lshift R24 by 32; R16 = R0 and R22;; R17 = R1 and R22;; R20 = ones R16; YXR27:26 = CB Q [K0 += 4];; R21 = ones R17;; bitest R20 by 0x0; R18 = R2 and R22;; if nseq; do, R24 = bset R24 by R26; R19 = R3 and R22;; bitest R21 by 0x0; R20 = ones R18;; if nseq; do, R24 = bset R24 by R27; R21 = ones R19; YXR27:26 = CB Q [K0 += 4];; bitest R20 by 0x0; R16 = R4 and R22; R29 = [J5 += 1];; if nseq; do, R24 = bset R24 by R26; R17 = R5 and R22;; bitest R21 by 0x0; R20 = ones R16;; if nseq; do, R24 = bset R24 by R27; R21 = ones R17; YXR27:26 = CB Q [K0 += 4];; bitest R20 by 0x0; R18 = R6 and R22;; if nseq; do, R24 = bset R24 by R26; R19 = R7 and R22;; bitest R21 by 0x0; R20 = ones R18;; if nseq; do, R24 = bset R24 by R27; R21 = ones R19; YXR27:26 = CB Q [K0 += 4];; bitest R20 by 0x0; R16 = R8 and R22;; if nseq; do, R24 = bset R24 by R26; R17 = R9 and R22;; bitest R21 by 0x0; R20 = ones R16;; if nseq; do, R24 = bset R24 by R27; R21 = ones R17; YXR27:26 = CB Q [K0 += 4];; bitest R20 by 0x0; R18 = R10 and R22;; if nseq; do, R24 = bset R24 by R26; R19 = R11 and R22;; bitest R21 by 0x0; R20 = ones R18;; if nseq; do, R24 = bset R24 by R27; R21 = ones R19; YXR27:26 = CB Q [K0 += 4];; bitest R20 by 0x0; R16 = R12 and R22;; if nseq; do, R24 = bset R24 by R26; R17 = R13 and R22;; bitest R21 by 0x0; R20 = ones R16;; if nseq; do, R24 = bset R24 by R27; R21 = ones R17; YXR27:26 = CB Q [K0 += 4];; bitest R20 by 0x0; R18 = R14 and R22;; if nseq; do, R24 = bset R24 by R26; R19 = R15 and R22;; bitest R21 by 0x0; R20 = ones R18;; if nseq; do, R24 = bset R24 by R27; R21 = ones R19; YXR27:26 = CB Q [K0 += 4];; bitest R20 by 0x0;; if nseq; do, R24 = bset R24 by R26;; bitest R21 by 0x0;; if nseq; do, R24 = bset R24 by R27;; XR25 = YR24; YR25 = XR24; R24 = R24 xor R29;;// RLR23:22 = lshift R29:28 by R31;; //stallif nlc0e, jump crc_32_loop_top; R22 = R25 xor R24;; yR28 = R28 and R30;;.align_code 4; if yaeq, jump crc_8_end; else, J0 = J31 + _crc_32_m_8;; YXR1:0 = Q[J0 += 4];; YXR3:2 = Q[J0 += 4]; LC0 = yR28;; YXR5:4 = Q[J0 += 4];; YXR7:6 = Q[J0 += 4];; YXR9:8 = Q[J0 += 4];; YXR11:10 = Q[J0 += 4];; YXR13:12 = Q[J0 += 4];; YXR15:14 = Q[J0 += 4];;crc_8_loop_top: R24 = lshift R24 by 32; R16 = R0 and R22;; R17 = R1 and R22;; R20 = ones R16; YXR27:26 = CB Q[K0 += 4];; R21 = ones R17;; bitest R20 by 0x0; R18 = R2 and R22;; if nseq; do, R24 = bset R24 by R26; R19 = R3 and R22;; bitest R21 by 0x0; R20 = ones R18;; if nseq; do, R24 = bset R24 by R27; R21 = ones R19; YXR27:26 = CB Q[K0 += 4];; bitest R20 by 0x0; R16 = R4 and R22;; if nseq; do, R24 = bset R24 by R26; R17 = R5 and R22;; bitest R21 by 0x0; R20 = ones R16;; if nseq; do, R24 = bset R24 by R27; R21 = ones R17; YXR27:26 = CB Q[K0 += 4];; bitest R20 by 0x0; R18 = R6 and R22;; if nseq; do, R24 = bset R24 by R26; R19 = R7 and R22;; bitest R21 by 0x0; R20 = ones R18;; if nseq; do, R24 = bset R24 by R27; R21 = ones R19; YXR27:26 = CB Q[K0 += 4];; bitest R20 by 0x0; R16 = R8 and R22;; if nseq; do, R24 = bset R24 by R26; R17 = R9 and R22;; bitest R21 by 0x0; R20 = ones R16;; if nseq; do, R24 = bset R24 by R27; R21 = ones R17; YXR27:26 = CB Q[K0 += 4];; bitest R20 by 0x0; R18 = R10 and R22;; if nseq; do, R24 = bset R24 by R26; R19 = R11 and R22;; bitest R21 by 0x0; R20 = ones R18;; if nseq; do, R24 = bset R24 by R27; R21 = ones R19; YXR27:26 = CB Q[K0 += 4];; bitest R20 by 0x0; R16 = R12 and R22;; if nseq; do, R24 = bset R24 by R26; R17 = R13 and R22;; bitest R21 by 0x0; R20 = ones R16;; if nseq; do, R24 = bset R24 by R27; R21 = ones R17; YXR27:26 = CB Q[K0 += 4];; bitest R20 by 0x0; R18 = R14 and R22;; if nseq; do, R24 = bset R24 by R26; R19 = R15 and R22;; bitest R21 by 0x0; R20 = ones R18;; if nseq; do, R24 = bset R24 by R27; R21 = ones R19; YXR27:26 = CB Q[K0 += 4];; bitest R20 by 0x0;; if nseq; do, R24 = bset R24 by R26;; bitest R21 by 0x0;; if nseq; do, R24 = bset R24 by R27;; XR25 = YR24; YR25 = XR24;; //stallif nlc0e, jump crc_8_loop_top; R22 = R25 or R24;; XR29 = [J5 + 0];;//stall XR17 = lshift R29 by r30;; // (32 - 8 * (num_bytes % 4));;//stall XR22 = R22 xor R17;;crc_8_end: J5 = J5 - 1; XR22 = NOT R22; XR23 = 0;; //stall XR30 = -R30; XR29 = 0xFFFFFFFF;; XR0 = [J5 + 0]; XLR23:22 = lshift R23:22 by R31;; //8 * (num_bytes % 4);; XR29 = lshift R29 by R30;; //-(32 - 8 * (num_bytes % 4));; // stall XR0 = R0 and R29;; // stall XR0 = R0 xor R22;; [J5 += 1] = XR0; R31 = pass R31;; if nxaeq; do, [J5 + 0] = xR23;;//EPILOGUE STARTS YR27:24 = q[K27 + 16]; XR27:24 = q[J27 + 24];; YR31:28 = q[K27 + 12]; XR31:28 = q[J27 + 20];; cjmp (ABS); J27:24=q[J27+32]; K27:24=q[K27+24]; nop;;// EPILOGUE ENDS_generate_crc_32.end:⌨️ 快捷键说明
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