year1.tdf

能自动记时

--年计数器
Library ieee;
Use ieee.std_logic_1164.all;
Use ieee.std_logic_arith.all;
Use ieee.std_logic_unsigned.all;
Entity year1 is
 Port(clky,set,reset:in std_logic;
      y1,y0:in std_logic_vector(3 downto 0);
      year1,year0:buffer std_logic_vector(3 downto 0));  
End;

Architecture a of year1 is
  Begin
  Process(clkd,reset,set,y1,y0)
      variable  cq1,cq0: STD_LOGIC_vector( 3 downto 0);
      Begin
   if reset='1' then cq1:="0000"; cq0:="0001"; 
   -- Elsif set='0' then cq1<=mo1; cq0<=mo0;  
    Elsif clky'event and clky='1' then
                            cq0:=cq0+1; 
                            if  cq0="1010" then  
                            cq0:="0000";
                            cq1:=cq1+1; 
                            if  cq1="1001" and cq0:="1001"  then 
                            cq1:="0000"; cq0:="0000";   
                            end if;    
                            end if;
    end if;
year1<=cq1;year0<=cq0;
End process;
End;