📄 flash.lst
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9195 CD 912B jsr _SCIRe1
9198 A7 02 aiS #2
919A 95 tSX
919B B7 41 stA *__r1
919D E6 02 ldA 2,X
919F EB 07 add 7,X
91A1 B7 43 stA *__r3
91A3 E6 01 ldA 1,X
91A5 E9 06 adc 6,X
91A7 B7 42 stA *__r2
91A9 B6 41 ldA *__r1
91AB 55 42 ldHX *__r2
91AD F7 stA 0,X
91AE 95 tSX
(0058) ch[m]=SCIRe1(&fp);
(0059) if (fp == 1) return 1;
91AF F6 ldA 0,X
91B0 A1 01 cmp #1
91B2 26 04 bne 0x91B8
91B4 A6 01 ldA #1
91B6 20 22 bra 0x91DA
(0060) m ++;
91B8 E6 02 ldA 2,X
91BA AB 01 add #1
91BC E7 02 stA 2,X
91BE E6 01 ldA 1,X
91C0 A9 00 adc #0
91C2 E7 01 stA 1,X
(0061) }
91C4 3F 40 clr *__r0
91C6 E6 05 ldA 5,X
91C8 B7 41 stA *__r1
91CA E6 02 ldA 2,X
91CC B7 43 stA *__r3
91CE E6 01 ldA 1,X
91D0 B7 42 stA *__r2
91D2 55 42 ldHX *__r2
91D4 75 40 cpHX *__r0
91D6 95 tSX
91D7 91 BA blt 0x9193
(0062) return 0;
91D9 4F clrA
91DA A7 03 aiS #3
91DC 81 rts
FILE: SCIInit.c
(0001) #include "GP32C.H"
(0002) #include "SCIInit.H"
(0003) void SCIInit(void)
(0004) { //总线频率fBUS＝2.4576MHz，定义波特率Bt=9600
_SCIInit:
91DD A6 02 ldA #2
91DF B7 19 stA 0x19
(0005) SCBR=0b00000010;
(0006) //设置允许SCI，正常码输出、8位数据、无校验
(0007) SCC1=0b01000000;
91E1 A6 40 ldA #64
91E3 B7 13 stA 0x13
(0008) //设置允许发送、允许接收，查询方式收发
(0009) SCC2=0b00001100;
91E5 A6 0C ldA #12
91E7 B7 14 stA 0x14
91E9 81 rts
(0010) }
(0011) void SCIOpen(void)
(0012) {
_SCIOpen:
91EA 1A 14 Bset 5,0x14
91EC 81 rts
_SetProtectAddress:
address --> X+2
91ED 95 tSX
FILE: flash.c
(0001) #include "flash.h"
(0002) #include "GP32C.h"
(0003) #include <string.h>
(0004) static void Delay1(void);
(0005) static void Delay2(void);
(0006) static void DoEraseFlash(void);
(0007) static void DoWriteFlash(void);
(0008) static void EraseFlash_End(void);
(0009) static void WriteFlash_End(void);
(0010) UINT8 PrgIOfRam[];
(0011) static UINT16 g_bBegin, g_bEnd;
(0012) static UINT8 *g_pAddress;
(0013)
(0014) static UINT8 *g_pData;
(0015) static UINT8 g_nNum;
(0016)
(0017) void SetProtectAddress(UINT8 address)
(0018) {
91EE E6 02 ldA 2,X
91F0 C7 FF7E stA 0xFF7E
91F3 81 rts
_EraseFlash:
address --> X+2
91F4 95 tSX
(0019) FLBPR = address;
(0020) }
(0021) void EraseFlash(UINT8 *address)
(0022) {
91F5 E6 02 ldA 2,X
91F7 B7 8A stA 0xFFFFFF8A
91F9 E6 03 ldA 3,X
91FB B7 8B stA 0xFFFFFF8B
(0023) g_pAddress = address;
(0024)
(0025) asm("ldhx #_DoEraseFlash");
91FD 45 9230 ldHX #0x9230
(0026) asm("sthx _g_bBegin");
9200 35 8E stHX 0xFFFFFF8E
(0027) asm("ldhx #_EraseFlash_End");
9202 45 926A ldHX #0x926A
(0028) asm("sthx _g_bEnd");
9205 35 8C stHX 0xFFFFFF8C
(0029)
(0030)
(0031)
(0032) memcpy((void *)PrgIOfRam, (void *)g_bBegin, g_bEnd - g_bBegin);
9207 B6 8D ldA 0xFFFFFF8D
9209 B0 8F sub 0xFFFFFF8F
920B B7 41 stA *__r1
920D B6 8C ldA 0xFFFFFF8C
920F B2 8E sbc 0xFFFFFF8E
9211 B7 40 stA *__r0
9213 B6 41 ldA *__r1
9215 87 pshA
9216 B6 40 ldA *__r0
9218 87 pshA
9219 B6 8F ldA 0xFFFFFF8F
921B 87 pshA
921C B6 8E ldA 0xFFFFFF8E
921E 87 pshA
921F A6 90 ldA #-112
9221 87 pshA
9222 A6 00 ldA #0
9224 87 pshA
9225 CD 9329 jsr _memcpy
9228 A7 06 aiS #6
922A 95 tSX
(0033)
(0034)
(0035) asm("ldhx #_PrgIOfRam");
922B 45 0090 ldHX #0x0090
(0036) asm("jsr ,x");
922E FD jsr 0,X
922F 81 rts
_DoEraseFlash:
i --> X+0
9230 A7 FF aiS #-1
9232 95 tSX
(0037) }
(0038) static void DoEraseFlash(void)
(0039) {
9233 A6 02 ldA #2
9235 C7 FE08 stA 0xFE08
(0040) UINT8 i;
(0041) FLCR = 0b00000010;
(0042) i = FLBPR;
9238 C6 FF7E ldA 0xFF7E
923B F7 stA 0,X
(0043) *((volatile UINT8*)g_pAddress) = 68;
923C A6 44 ldA #68
923E 55 8A ldHX 0xFFFFFF8A
9240 F7 stA 0,X
9241 95 tSX
(0044) asm("bsr _Delay1");
9242 AD 17 bsr 0x925B
(0045) FLCR = 0b00001010;
9244 A6 0A ldA #10
9246 C7 FE08 stA 0xFE08
(0046) asm("bsr _Delay1");
9249 AD 10 bsr 0x925B
(0047) FLCR = 0b00001000;
924B A6 08 ldA #8
924D C7 FE08 stA 0xFE08
(0048) asm("bsr _Delay1");
9250 AD 09 bsr 0x925B
(0049) FLCR = 0b00000000;
9252 4F clrA
9253 C7 FE08 stA 0xFE08
(0050) asm("bsr _Delay1");
9256 AD 03 bsr 0x925B
9258 A7 01 aiS #1
925A 81 rts
_Delay1:
i --> X+0
925B A7 FF aiS #-1
925D 95 tSX
(0051) }
(0052) static void Delay1(void)
(0053) {
925E 7F clr 0,X
925F 20 01 bra 0x9262
(0054) UINT8 i;
(0055) for(i = 0; i < 10; ++i);
9261 7C inc 0,X
9262 F6 ldA 0,X
9263 A1 0A cmp #10
9265 25 FA bcs 0x9261
9267 A7 01 aiS #1
9269 81 rts
(0056) }
(0057) static void EraseFlash_End(void)
(0058) {
_EraseFlash_End:
926A 81 rts
_WriteFlash:
n --> X+6
data --> X+4
address --> X+2
926B 95 tSX
(0059) }
(0060) void WriteFlash(UINT8 *address, UINT8 *data, int n)
(0061) {
926C E6 02 ldA 2,X
926E B7 8A stA 0xFFFFFF8A
9270 E6 03 ldA 3,X
9272 B7 8B stA 0xFFFFFF8B
(0062) g_pAddress = address;
(0063) g_pData = data;
9274 E6 04 ldA 4,X
9276 B7 88 stA 0xFFFFFF88
9278 E6 05 ldA 5,X
927A B7 89 stA 0xFFFFFF89
(0064) g_nNum = n;
927C E6 07 ldA 7,X
927E B7 87 stA 0xFFFFFF87
(0065)
(0066) asm("ldhx #_DoWriteFlash");
9280 45 92B3 ldHX #0x92B3
(0067) asm("sthx _g_bBegin");
9283 35 8E stHX 0xFFFFFF8E
(0068) asm("ldhx #_WriteFlash_End");
9285 45 9328 ldHX #0x9328
(0069) asm("sthx _g_bEnd");
9288 35 8C stHX 0xFFFFFF8C
(0070)
(0071) memcpy((void *)PrgIOfRam, (void *)g_bBegin, g_bEnd - g_bBegin);
928A B6 8D ldA 0xFFFFFF8D
928C B0 8F sub 0xFFFFFF8F
928E B7 41 stA *__r1
9290 B6 8C ldA 0xFFFFFF8C
9292 B2 8E sbc 0xFFFFFF8E
9294 B7 40 stA *__r0
9296 B6 41 ldA *__r1
9298 87 pshA
9299 B6 40 ldA *__r0
929B 87 pshA
929C B6 8F ldA 0xFFFFFF8F
929E 87 pshA
929F B6 8E ldA 0xFFFFFF8E
92A1 87 pshA
92A2 A6 90 ldA #-112
92A4 87 pshA
92A5 A6 00 ldA #0
92A7 87 pshA
92A8 CD 9329 jsr _memcpy
92AB A7 06 aiS #6
92AD 95 tSX
(0072)
(0073)
(0074)
(0075) asm("ldhx #_PrgIOfRam");
92AE 45 0090 ldHX #0x0090
(0076) asm("jsr ,x");
92B1 FD jsr 0,X
92B2 81 rts
_DoWriteFlash:
j --> X+0
i --> X+1
92B3 A7 FE aiS #-2
92B5 95 tSX
(0077)
(0078)
(0079)
(0080) }
(0081) static void DoWriteFlash(void)
(0082) {
92B6 A6 01 ldA #1
92B8 C7 FE08 stA 0xFE08
(0083) UINT8 i, j;
(0084) FLCR = 0b00000001;
(0085) j = FLBPR;
92BB C6 FF7E ldA 0xFF7E
92BE F7 stA 0,X
(0086) *((volatile UINT8*)g_pAddress) = 68;
92BF A6 44 ldA #68
92C1 55 8A ldHX 0xFFFFFF8A
92C3 F7 stA 0,X
92C4 95 tSX
(0087) asm("bsr _Delay2");
92C5 AD 52 bsr 0x9319
(0088) FLCR = 0b00001001;
92C7 A6 09 ldA #9
92C9 C7 FE08 stA 0xFE08
(0089) asm("bsr _Delay2");
92CC AD 4B bsr 0x9319
(0090) for(j = 0 ;j < g_nNum; ++j)
92CE 7F clr 0,X
92CF 20 33 bra 0x9304
(0091) {
92D1 3F 40 clr *__r0
92D3 F6 ldA 0,X
92D4 BB 89 add 0xFFFFFF89
92D6 B7 41 stA *__r1
92D8 B6 40 ldA *__r0
92DA B9 88 adc 0xFFFFFF88
92DC B7 40 stA *__r0
92DE 55 40 ldHX *__r0
92E0 F6 ldA 0,X
92E1 95 tSX
92E2 B7 41 stA *__r1
92E4 3F 42 clr *__r2
92E6 F6 ldA 0,X
92E7 BB 8B add 0xFFFFFF8B
92E9 B7 43 stA *__r3
92EB B6 42 ldA *__r2
92ED B9 8A adc 0xFFFFFF8A
92EF B7 42 stA *__r2
92F1 B6 41 ldA *__r1
92F3 55 42 ldHX *__r2
92F5 F7 stA 0,X
92F6 95 tSX
(0092) *((volatile UINT8*)g_pAddress + j) = g_pData[j];
(0093) for(i = 0; i < 30; ++i);
92F7 6F 01 clr 1,X
92F9 20 02 bra 0x92FD
92FB 6C 01 inc 1,X
92FD E6 01 ldA 1,X
92FF A1 1E cmp #30
9301 25 F8 bcs 0x92FB
(0094) }
9303 7C inc 0,X
9304 F6 ldA 0,X
9305 B1 87 cmp 0xFFFFFF87
9307 25 C8 bcs 0x92D1
(0095) FLCR = 0b00001000;
9309 A6 08 ldA #8
930B C7 FE08 stA 0xFE08
(0096) asm("bsr _Delay2");
930E AD 09 bsr 0x9319
(0097) FLCR = 0b00000000;
9310 4F clrA
9311 C7 FE08 stA 0xFE08
(0098) asm("bsr _Delay2");
9314 AD 03 bsr 0x9319
9316 A7 02 aiS #2
9318 81 rts
_Delay2:
i --> X+0
9319 A7 FF aiS #-1
931B 95 tSX
(0099)
(0100) }
(0101) static void Delay2(void)
(0102) {
931C 7F clr 0,X
931D 20 01 bra 0x9320
(0103) UINT8 i;
(0104) for(i = 0; i < 10; ++i);
931F 7C inc 0,X
9320 F6 ldA 0,X
9321 A1 0A cmp #10
9323 25 FA bcs 0x931F
9325 A7 01 aiS #1
9327 81 rts
(0105) }
(0106) static void WriteFlash_End(void)
(0107) {
FILE: <library>
_WriteFlash_End:
9328 81 rts
_memcpy:
9329 95 tSX
932A AF 02 aiX #2
932C 7E 40 mov 0,X+,*__r0
932E 7E 41 mov 0,X+,*__r1
9330 7E 42 mov 0,X+,*__r2
9332 7E 43 mov 0,X+,*__r3
9334 7E 44 mov 0,X+,*__r4
9336 7E 45 mov 0,X+,*__r5
9338 95 tSX
9339 55 44 ldHX *__r4
933B 65 0000 cpHX #0x0000
933E 27 18 beq 0x9358
9340 55 42 ldHX *__r2
9342 E6 00 ldA 0,X
9344 AF 01 aiX #1
9346 35 42 stHX *__r2
9348 55 40 ldHX *__r0
934A E7 00 stA 0,X
934C AF 01 aiX #1
934E 35 40 stHX *__r0
9350 55 44 ldHX *__r4
9352 AF FF aiX #-1
9354 35 44 stHX *__r4
9356 20 E3 bra 0x933B
9358 95 tSX
9359 E6 02 ldA 2,X
935B B7 40 stA *__r0
935D E6 03 ldA 3,X
935F B7 41 stA *__r1
9361 81 rts
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