📄 uart_clk.tan.qmsg
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{ "Info" "IDAT_DAT_STARTED" "" "Info: Started post-fitting delay annotation" { } { } 0 0 "Started post-fitting delay annotation" 0 0}
{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" { } { } 0 0 "Delay annotation completed successfully" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "sys_clock " "Info: Assuming node \"sys_clock\" is an undefined clock" { } { { "uart_clk.v" "" { Text "F:/verilog/uart/uart_clk.v" 2 -1 0 } } { "d:/program files/alter/bin/Assignment Editor.qase" "" { Assignment "d:/program files/alter/bin/Assignment Editor.qase" 1 { { 0 "sys_clock" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "sel_baud_rate\[2\] " "Info: Assuming node \"sel_baud_rate\[2\]\" is an undefined clock" { } { { "uart_clk.v" "" { Text "F:/verilog/uart/uart_clk.v" 3 -1 0 } } { "d:/program files/alter/bin/Assignment Editor.qase" "" { Assignment "d:/program files/alter/bin/Assignment Editor.qase" 1 { { 0 "sel_baud_rate\[2\]" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "sel_baud_rate\[1\] " "Info: Assuming node \"sel_baud_rate\[1\]\" is an undefined clock" { } { { "uart_clk.v" "" { Text "F:/verilog/uart/uart_clk.v" 3 -1 0 } } { "d:/program files/alter/bin/Assignment Editor.qase" "" { Assignment "d:/program files/alter/bin/Assignment Editor.qase" 1 { { 0 "sel_baud_rate\[1\]" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "sel_baud_rate\[0\] " "Info: Assuming node \"sel_baud_rate\[0\]\" is an undefined clock" { } { { "uart_clk.v" "" { Text "F:/verilog/uart/uart_clk.v" 3 -1 0 } } { "d:/program files/alter/bin/Assignment Editor.qase" "" { Assignment "d:/program files/alter/bin/Assignment Editor.qase" 1 { { 0 "sel_baud_rate\[0\]" } } } } } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0} } { } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
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