uart_top.sim.vwf

来自「Uart port 是一段不错的」· VWF 代码 · 共 1,255 行 · 第 1/2 页

VWF
1,255 行
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12
/*
WARNING: Do NOT edit the input and output ports in this file in a text
editor if you plan to continue editing the block that represents it in
the Block Editor! File corruption is VERY likely to occur.
*/

/*
Copyright (C) 1991-2005 Altera Corporation
Your use of Altera Corporation's design tools, logic functions 
and other software and tools, and its AMPP partner logic 
functions, and any output files any of the foregoing 
(including device programming or simulation files), and any 
associated documentation or information are expressly subject 
to the terms and conditions of the Altera Program License 
Subscription Agreement, Altera MegaCore Function License 
Agreement, or other applicable license agreement, including, 
without limitation, that your use is for the sole purpose of 
programming logic devices manufactured by Altera and sold by 
Altera or its authorized distributors.  Please refer to the 
applicable agreement for further details.
*/

HEADER
{
	VERSION = 1;
	TIME_UNIT = ns;
	SIMULATION_TIME = 60000000.0;
	GRID_PHASE = 0.0;
	GRID_PERIOD = 10.0;
	GRID_DUTY_CYCLE = 50;
}

SIGNAL("date_bus")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 8;
	LSB_INDEX = 0;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("date_bus[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "date_bus";
}

SIGNAL("date_bus[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "date_bus";
}

SIGNAL("date_bus[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "date_bus";
}

SIGNAL("date_bus[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "date_bus";
}

SIGNAL("date_bus[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "date_bus";
}

SIGNAL("date_bus[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "date_bus";
}

SIGNAL("date_bus[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "date_bus";
}

SIGNAL("date_bus[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "date_bus";
}

SIGNAL("rest")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("sel_baud_rate")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 3;
	LSB_INDEX = 0;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("sel_baud_rate[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "sel_baud_rate";
}

SIGNAL("sel_baud_rate[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "sel_baud_rate";
}

SIGNAL("sel_baud_rate[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "sel_baud_rate";
}

SIGNAL("sys_clock")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("bit_counter")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 4;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("bit_counter[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "bit_counter";
}

SIGNAL("bit_counter[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "bit_counter";
}

SIGNAL("bit_counter[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "bit_counter";
}

SIGNAL("bit_counter[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "bit_counter";
}

SIGNAL("clock")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("finish_F")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("sample_clock")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("serial")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("load_bus_reg")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = INPUT;
	PARENT = "";
}

SIGNAL("bus")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 8;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("bus[7]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "bus";
}

SIGNAL("bus[6]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "bus";
}

SIGNAL("bus[5]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "bus";
}

SIGNAL("bus[4]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "bus";
}

SIGNAL("bus[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "bus";
}

SIGNAL("bus[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "bus";
}

SIGNAL("bus[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "bus";
}

SIGNAL("bus[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "bus";
}

SIGNAL("counter")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = BUS;
	WIDTH = 4;
	LSB_INDEX = 0;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("counter[3]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "counter";
}

SIGNAL("counter[2]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "counter";
}

SIGNAL("counter[1]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "counter";
}

SIGNAL("counter[0]")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "counter";
}

SIGNAL("error")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

SIGNAL("finish_s")
{
	VALUE_TYPE = NINE_LEVEL_BIT;
	SIGNAL_TYPE = SINGLE_BIT;
	WIDTH = 1;
	LSB_INDEX = -1;
	DIRECTION = OUTPUT;
	PARENT = "";
}

TRANSITION_LIST("date_bus[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 60000000.0;
	}
}

TRANSITION_LIST("date_bus[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 60000000.0;
	}
}

TRANSITION_LIST("date_bus[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 60000000.0;
	}
}

TRANSITION_LIST("date_bus[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 60000000.0;
	}
}

TRANSITION_LIST("date_bus[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 60000000.0;
	}
}

TRANSITION_LIST("date_bus[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 60000000.0;
	}
}

TRANSITION_LIST("date_bus[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 60000000.0;
	}
}

TRANSITION_LIST("date_bus[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 60000000.0;
	}
}

TRANSITION_LIST("rest")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 30.0;
		LEVEL 1 FOR 2960.0;
		LEVEL 0 FOR 111515.0;
		LEVEL 1 FOR 3206105.0;
		LEVEL 0 FOR 56679390.0;
	}
}

TRANSITION_LIST("sel_baud_rate[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 60000000.0;
	}
}

TRANSITION_LIST("sel_baud_rate[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 60000000.0;
	}
}

TRANSITION_LIST("sel_baud_rate[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 60000000.0;
	}
}

TRANSITION_LIST("sys_clock")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 480000;
			LEVEL 0 FOR 62.5;
			LEVEL 1 FOR 62.5;
		}
	}
}

TRANSITION_LIST("bit_counter[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 39719953.182;
		LEVEL 1 FOR 3328000.0;
		LEVEL 0 FOR 16952046.818;
	}
}

TRANSITION_LIST("bit_counter[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 26407953.221;
		LEVEL 1 FOR 13312000.0;
		LEVEL 0 FOR 20280046.779;
	}
}

TRANSITION_LIST("bit_counter[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 19751953.829;
		LEVEL 1 FOR 6656000.0;
		LEVEL 0 FOR 6656000.0;
		LEVEL 1 FOR 6656000.0;
		LEVEL 0 FOR 20280046.171;
	}
}

TRANSITION_LIST("bit_counter[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 16423953.208;
		NODE
		{
			REPEAT = 3;
			LEVEL 1 FOR 3328000.0;
			LEVEL 0 FOR 3328000.0;
		}
		LEVEL 1 FOR 3328000.0;
		LEVEL 0 FOR 20280046.792;
	}
}

TRANSITION_LIST("clock")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 3527949.442;
		NODE
		{
12

uart_top.sim.vwf - 源码说明

本页面展示了「Uart port 是一段不错的」中的 uart_top.sim.vwf 源码文件，采用 VWF 编程语言编写，共 1,255 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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