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📄 os_cpu_a.lst

📁 keil 下的ucOS移植程序。移植平台AT91SAM7S64.
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  181 00000044         ;              e) OSTCBCur              = OSTCBHighRdy;
  182 00000044         ;              f) SP                    = OSTCBHighRdy->
                       OSTCBStkPtr;
  183 00000044         ;              g) Restore the new task's context from th
                       e new task's stack
  184 00000044         ;              h) Return to new task's code
  185 00000044         ;
  186 00000044         ;           3) Upon entry:
  187 00000044         ;              OSTCBCur      points to the OS_TCB of the
                        task to suspend
  188 00000044         ;              OSTCBHighRdy  points to the OS_TCB of the
                        task to resume
  189 00000044         ;*******************************************************
                       **************************************************
  190 00000044                 IF               (ASM_KEILRV > 0)
  191 00000044                 PRESERVE8
  192 00000044         
  193 00000044                 AREA             |.text|, CODE, READONLY
  194 00000044                 ARM
  195 00000044                 ELSE
  198                          ENDIF
  199 00000044         
  200 00000044         OSCtxSw
  201 00000044         ; SAVE CURRENT TASK'S CONTEXT
  202 00000044 E92D4000        STMFD            SP!, {LR}   ;     Push return a
                                                            ddress
  203 00000048 E92D5FFF        STMFD            SP!, {R0-R12, LR} ;     Push re
                                                            gisters
  204 0000004C E10F4000        MRS              R4,  CPSR   ;     Push current 
                                                            CPSR
  205 00000050 E31E0001        TST              LR, #1      ;     See if called
                                                             from Thumb mode
  206 00000054 13844020        ORRNE            R4,  R4, #T_BIT ;     If yes, S
                                                            et the T-bit
  207 00000058 E92D0010        STMFD            SP!, {R4}
  208 0000005C         
  209 0000005C         OSCtxSw1



ARM Macro Assembler    Page 6 


  210 0000005C E59F4108        LDR              R4, OS_TCBCur ; OSTCBCur->OSTCB
                                                            StkPtr = SP;
  211 00000060 E5945000        LDR              R5, [R4]
  212 00000064 E585D000        STR              SP, [R5]
  213 00000068         
  214 00000068                 IF               (OS_TASK_SW_HOOK >= 1)
  218                          ENDIF
  219 00000068         
  220 00000068 E59F40F0        LDR              R4, OS_PrioCur ; OSPrioCur = OS
                                                            PrioHighRdy
  221 0000006C E59F50F0        LDR              R5, OS_PrioHighRdy
  222 00000070 E5D56000        LDRB             R6, [R5]
  223 00000074 E5C46000        STRB             R6, [R4]
  224 00000078         
  225 00000078 E59F40EC        LDR              R4, OS_TCBCur ; OSTCBCur  = OST
                                                            CBHighRdy;
  226 0000007C E59F60EC        LDR              R6, OS_TCBHighRdy
  227 00000080 E5966000        LDR              R6, [R6]
  228 00000084 E5846000        STR              R6, [R4]
  229 00000088         
  230 00000088         OSCtxSw2
  231 00000088         ;-------------------------------------------------------
                       --------------------------
  232 00000088         ;LDR     SP, [R6]                ; SP = OSTCBHighRdy->OS
                       TCBStkPtr;
  233 00000088         ; RESTORE NEW TASK'S CONTEXT
  234 00000088         ;LDMFD   SP!, {R4}               ;    Pop new task's CPS
                       R
  235 00000088         ;MSR     CPSR_cxsf, R4      ; has CPSR only at SYS mode
  236 00000088         ;LDMFD   SP!, {R0-R12,LR,PC}     ;    pop new task's con
                       text
  237 00000088         ;-------------------------------------------------------
                       --------------------------
  238 00000088         
  239 00000088 E5964000        LDR              R4, [R6]    ; R4(SP) = OSTCBHig
                                                            hRdy->OSTCBStkPtr;
  240 0000008C E284D040        ADD              SP, R4, #16*4 ; Adjust SYS stac
                                                            k pointer
  241 00000090 E51DE008        LDR              LR, [SP, #-2*4] ; get new task'
                                                            s register LR_sys
  242 00000094         
  243 00000094 E321F0DB        MSR              CPSR_c, #(I_BIT | F_BIT | ARM_M
ODE_UNDEF) 
                                                            ; Switch to UNDEF m
                                                            ode
  244 00000098 E1A0D004        MOV              SP, R4
  245 0000009C         ; RESTORE NEW TASK'S CONTEXT
  246 0000009C E8BD0010        LDMFD            SP!, {R4}   ;    Pop new task's
                                                             CPSR
  247 000000A0 E16FF004        MSR              SPSR_cxsf, R4 ; has SPSR only a
                                                            t UNDEF mode
  248 000000A4 E8FDDFFF        LDMFD            SP!, {R0-R12,LR,PC}^ ;    pop n
                                                            ew task's context
  249 000000A8         
  250 000000A8         
  251 000000A8         ;*******************************************************
                       **************************************************
  252 000000A8         ;                   PERFORM A CONTEXT SWITCH (From inter
                       rupt level) - OSIntCtxSw()



ARM Macro Assembler    Page 7 


  253 000000A8         ;
  254 000000A8         ; Note(s) : 1) OSIntCtxSw() is called in SYS mode with B
                       OTH FIQ and IRQ interrupts DISABLED
  255 000000A8         ;
  256 000000A8         ;           2) The pseudo-code for OSCtxSw() is:
  257 000000A8         ;              a) OSTaskSwHook();
  258 000000A8         ;              b) OSPrioCur             = OSPrioHighRdy;
                       
  259 000000A8         ;              c) OSTCBCur              = OSTCBHighRdy;
  260 000000A8         ;              d) SP                    = OSTCBHighRdy->
                       OSTCBStkPtr;
  261 000000A8         ;              e) Restore the new task's context from th
                       e new task's stack
  262 000000A8         ;              f) Return to new task's code
  263 000000A8         ;
  264 000000A8         ;           3) Upon entry:
  265 000000A8         ;              OSTCBCur      points to the OS_TCB of the
                        task to suspend
  266 000000A8         ;              OSTCBHighRdy  points to the OS_TCB of the
                        task to resume
  267 000000A8         ;*******************************************************
                       **************************************************
  268 000000A8                 IF               (ASM_KEILRV > 0)
  269 000000A8                 PRESERVE8
  270 000000A8         
  271 000000A8                 AREA             |.text|, CODE, READONLY
  272 000000A8                 ARM
  273 000000A8                 ELSE
  276                          ENDIF
  277 000000A8         
  278 000000A8         OSIntCtxSw
  279 000000A8         ;*******************************************************
                       *************
  280 000000A8         ; IRQ STACK <LOW> R4 R14 | SPSR R0 R1 R2 R3 R11 R12 LR(P
                       C) <HIGH>
  281 000000A8         ;*******************************************************
                       *************
  282 000000A8         ; SAVE TASK'S CONTEXT ONTO TASK'S STACK
  283 000000A8         ;ADD SP, SP, #2*4   ; Adjust IRQ stack pointer (OSIntExi
                       t=2*4)
  284 000000A8         ;LDMFD SP!, {R4, R14}   ; Restore, See OSIntExit() @ os_
                       core.c
  285 000000A8         
  286 000000A8 E28DD020        ADD              SP, SP, #(0+8)*4 ; Adjust IRQ s
                                                            tack pointer
  287 000000AC         ; {R4,R14}=2*4, {SPSR, R0-R3, R11, R12, LR}=8*4
  288 000000AC E24D000C        SUB              R0, SP, #3*4 ; R0->R11
  289 000000B0         
  290 000000B0 E321F0DF        MSR              CPSR_c, #(I_BIT | F_BIT | ARM_M
ODE_SYS) 
                                                            ; Switch to SYS mod
                                                            e
  291 000000B4         
  292 000000B4         
  293 000000B4 E890000E        LDMIA            R0,  {R1-R3} ; R11,R12,LR(PC)=>
                                                            R1,R2,R3
  294 000000B8 E2400014        SUB              R0,  R0, #5*4 ; Moving (SPSR, R
                                                            3-R0)
  295 000000BC E92D0008        STMFD            SP!, {R3}   ; R3(PC)=>[SP]



ARM Macro Assembler    Page 8 


  296 000000C0 E92D4006        STMFD            SP!, {R1-R2, LR} ; R1(R11),R2(R
                                                            12),LR=>[SP]
  297 000000C4 E92D07F0        STMFD            SP!, {R4-R10} ; R4-R10=>[SP]
  298 000000C8         
  299 000000C8 E89001F0        LDMIA            R0,  {R4-R8} 
                                                            ; SPSR,R0-R3=>R4-R8
                                                            
  300 000000CC E92D01F0        STMFD            SP!, {R4-R8} ; R4(SPSR),R5-R8(R
                                                            0-R3)=>[SP]
  301 000000D0         
  302 000000D0         
  303 000000D0 EAFFFFE1        B                OSCtxSw1
  304 000000D4         
  305 000000D4         ;*******************************************************
                       **************************************************
  306 000000D4         ;                                      IRQ Interrupt Ser
                       vice Routine
  307 000000D4         ;*******************************************************
                       **************************************************
  308 000000D4                 IF               (ASM_KEILRV > 0)
  309 000000D4                 PRESERVE8
  310 000000D4         
  311 000000D4                 AREA             |.text|, CODE, READONLY
  312 000000D4                 ARM
  313 000000D4                 ELSE
  316                          ENDIF
  317 000000D4         
  318 000000D4         OS_CPU_IRQ_ISR
  319 000000D4         
  320 000000D4 E24EE004        SUB              LR, LR, #4  ;- Adjust and save 
                                                            LR_irq in IRQ stack
                                                            
  321 000000D8 E92D580F        STMFD            SP!, {R0-R3, R11, R12, LR} ;- S
                                                            ave scratch/used re
                                                            gisters and LR in I
                                                            RQ Stack
  322 000000DC         ;- #Save R11 only for the register 'LR_svc'
  323 000000DC         
  324 000000DC E14FE000        MRS              R14, SPSR   ;- Save SPSR need t
                                                            o be saved for nest
                                                            ed interrupt
  325 000000E0 E92D4000        STMFD            SP!, {R14}
  326 000000E4         
  327 000000E4         ; HANDLE NESTING COUNTER
  328 000000E4 E59FE070        LDR              R14, OS_IntNesting 
                                                            ; OSIntNesting++;
  329 000000E8 E5DEC000        LDRB             R12, [R14]
  330 000000EC E28CC001        ADD              R12, R12,#1
  331 000000F0 E5CEC000        STRB             R12, [R14]
  332 000000F4         
  333 000000F4         ;- Write in the IVR to support Protect Mode
  334 000000F4         ;- No effect in Normal Mode
  335 000000F4         ;- De-assert the NIRQ and clear the source in Protect Mo
                       de
  336 000000F4 E59FE054        LDR              R14, =AT91C_BASE_AIC
  337 000000F8 E59EC100        LDR              R12, [R14, #AIC_IVR]
  338 000000FC E58EE100        STR              R14, [R14, #AIC_IVR]
  339 00000100         
  340 00000100         



ARM Macro Assembler    Page 9 


  341 00000100         ;IRQ_ISR_Handler {
  342 00000100 E321F013        MSR              CPSR_c, #ARM_MODE_SVC ; - Enabl
                                                            e Interrupt and Swi
                                                            tch to SVC mode
  343 00000104 E1A0B00E        MOV              R11, LR     ; R11<-LR_svc
  344 00000108         
  345 00000108 E1A0E00F        MOV              LR, PC      ;- Branch to the ro
                                                            utine pointed by th
                                                            e AIC_IVR
  346 0000010C E12FFF1C        BX               R12         ; IRQ_ISR_Handler()
                                                            
  347 00000110         
  348 00000110 E1A0E00B        MOV              LR, R11     ;- Restore LR_svc
  349 00000114 E321F0D2        MSR              CPSR_c, #(I_BIT | F_BIT | ARM_M
ODE_IRQ) 
                                                            ;- Disable Interrup
                                                            t and Switch back i
                                                            n IRQ mode
  350 00000118         ;} IRQ_ISR_Handler
  351 00000118         
  352 00000118         
  353 00000118 E59FE030        LDR              R14, =AT91C_BASE_AIC ;- Mark th
                                                            e End of Interrupt 
                                                            on the AIC
  354 0000011C E58EE130        STR              R14, [R14, #AIC_EOICR]
  355 00000120         
  356 00000120 E59FC030        LDR              R12, OS_IntExit ; OSIntExit() <
                                                            not call OSIntCtxSw
                                                            ()>
  357 00000124 E1A0E00F        MOV              LR,  PC
  358 00000128 E12FFF1C        BX               R12
  359 0000012C         
  360 0000012C         
  361 0000012C E59F002C        LDR              R0, OS_PrioCur ; if (OSPrioCur 
                                                            != OSPrioHighRdy)
  362 00000130 E59F102C        LDR              R1, OS_PrioHighRdy
  363 00000134 E5D00000        LDRB             R0, [R0]
  364 00000138 E5D11000        LDRB             R1, [R1]
  365 0000013C E1500001        CMP              R0, R1
  366 00000140 1AFFFFD8        BNE              OSIntCtxSw  ; Do OSIntCtxSw()
  367 00000144         
  368 00000144         
  369 00000144 E8BD4000        LDMFD            SP!, {R14}  ;- Restore SPSR_irq
                                                             from IRQ stack
  370 00000148 E16FF00E        MSR              SPSR_cxsf, R14
  371 0000014C         
  372 0000014C E8FD980F        LDMFD            SP!, {R0-R3, R11, R12, PC}^ ;- 
                                                            Restore adjusted LR
                                                            _irq from IRQ stack
                                                             directly in the PC

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