bootalon.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

/*
===============================================================================
            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION           
                                                                             
   Property of Texas Instruments 
   For  Unrestricted  Internal  Use  Only 
   Unauthorized reproduction and/or distribution is strictly prohibited.  
   This product is protected under copyright law and trade secret law 
   as an unpublished work.  
   Created 1999, (C) Copyright 1999 Texas Instruments.  All rights reserved.
   Filename       	: boot_a9.c

   Description    	: Initialization of ARM925ST, TCIF and ICR modules
                             before starting Samson module.

   Project        	: Perseus

   Author         	: Sebastien Sabatier

===============================================================================
*/

#include "boot_alone_a9.h"

#define TIMEOUT_RHEA 0xff 

#define TTB      BRD_CS4_SDRAM_TTB_ADDRESS /* Translation Table Base */
//#define DOMAIN   0xFFFFFFF7 /* all domains are manager */


void BOOT_AloneA9 ( void ) 
{
  boot_initialization_a9();
  
  /* Optimize RHEA accesses */
  RHEA_InitCtrolReg(RHEA_FACTOR3_STROBE, RHEA_FACTOR3_STROBE, TIMEOUT_RHEA); 
  /* No Posted Write */ 
  RHEA_SetPostedWrite(RHEA_ENABLE_WRITE_BUFFER_STROBE0, 
                      RHEA_ENABLE_WRITE_BUFFER_STROBE1); 

  /* ARM7 and ARM9 will use shared external memories */
  set_arm7_share_external_mem();

  INTH_InitLevel (INTH_FIQNIRQ_MPUIO, // Perseus_IRQ_Mpuio to IRQ1
		  INTH_IRQ,            
		  INTH_HIGHEST_PRIORITY,
		  INTH_LOW_LEVEL_SENSITIVE);
  INTH_EnableOneIt(INTH_FIQNIRQ_MPUIO);

} 
void BOOT_AloneFpgaA9 ( void ) 
{
int i;

  BOOT_AloneA9();
  
  /* FPGA (on local Bus 3) and PCI descriptors */
  ARM_Section(LOCALBUS3_ADDRESS + 0x01000000,
	      LOCALBUS3_ADDRESS + 0x01000000,
	      TTB, ALL_ACCESS, DOMAIN0, 0); // Non Cacheable area

  for (i = 0; i < 256; i++)
    {
      ARM_Section(PCI_IF_ADDRESS + (0x00100000 * i),
		  PCI_IF_ADDRESS + (0x00100000 * i),
		  TTB, ALL_ACCESS, DOMAIN0, 0); // Non Cacheable area
    }


}