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📄 w_16.asm

📁 OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器
💻 ASM
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;******************************************************************************
;            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION           
;                                                                             
;   Property of Texas Instruments 
;   For  Unrestricted  Internal  Use  Only
;   Unauthorized reproduction and/or distribution is strictly prohibited.  
;   This product is protected under copyright law and trade secret law 
;   as an unpublished work.	
; 
;   Created 1999, (C) Copyright 1999 Texas Instruments.  All rights reserved.
;
;
;   Filename     : w_16.asm
;
;   Description : Test of memory access in 16 bits mode (write and read back value )
;                 (write and read back 2 values )
;
;   Project     : ARM925ST
;
;   Author      : Francis Huguenin fhugueni@tif.ti.com  
; 
;******************************************************************************* 
	.state16		; thumb mode

	.ref	edata		;defined by armas
	.global $w_16
	.ref    etext


OK				.equ  0x0001
BAD			.equ  0x0002
NOT_TESTED	.equ  0x0 
THE_END		.equ  0xffff	;That's the end of the test(s)


 	
$w_16:           
;
;	- write 2 half word (16 bits)
;	- read them back 
;	- and check that the value is correct
;
;	The 2 half words are written to the address of the memory
;	space given in argument.
;
;	Input : R0 = address to test,
;
;	Output : R0 = result (1 for OK, 2 for bad)
;

	push	{r4,lr}

;Load into R2 address of data to be written
	ldr	r2,data_addr			; R2 = data_addr
	
;; -------------------------------------------------------------------------
;; TEST WRITE 16 bits (at address contain in R0)                                             --
;; -------------------------------------------------------------------------

	ldrh	r4,[r2,#0]	;Load first half word
	strh	r4,[r0,#0]	;Store the first half word into the address
	ldrh	r4,[r2,#2]	;Load 2nd half word
	strh	r4,[r0,#2]	;Store it into address+1
	bl	read_back	   ;Unconditionally branch to 'read_back'
	cmp	r3,#OK		;Compare Result R3 to OK
	bne	its_bad		;IF Result Not OK THEN BRANCH to 'its_bad'

its_ok:	
	mov	r0,#OK			;test is ok
	b	the_end			;Unconditionally branch to 'the_end'

its_bad:
	mov	r0,#BAD			;test is bad

the_end:	
	pop 	{r4,pc}		; Return to caller


end:	b 	end		;infinite loop to terminate execution
loop:	b 	loop		; loop to prevent bad execution of data

; read back the 2 written half words 
read_back:
	ldrh	r4,[r2,#0]	;Load first half word
	ldrh	r3,[r0,#0]	;load the first written half word
	ldr   r1,mask
	bic   r4,r1       ; clear the upper half word
	bic   r3,r1       ; clear the upper half word 
	cmp	r3,r4		   ;compare 
	bne	one_bad		;If NotEqual 
	ldrh	r4,[r2,#2]	;Load second half word
	ldrh	r3,[r0,#2]	;load the second written half word
	bic   r4,r1			; clear the upper half word
	bic   r3,r1			; clear the upper half word
	cmp	r3,r4			;compare
	bne	one_bad		;If NotEqual 

				;Branch to 'one_bad' 
one_ok:	
	mov	r3,#OK		;test is ok
	b	one_end		;Unconditionally branch to 'one_end'

one_bad:
	mov	r3,#BAD		;test is bad

one_end:
	mov	pc,lr

	.align 	4
	; select 32 bit instructions assembling mode
	.state32


;;**********************************************************************
;;                   V A R I A B L E S                                **
;;**********************************************************************
data_addr  	.word   data
data 	   	.half   0AA55h,055AAh
mask			.word	  0ffff0000h	

.end			; Terminate assembly

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