📄 uartmodem.c
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//------------------------------------------------------------------------------
// TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
//
// Property of Texas Instruments -- For Unrestricted Internal Use Only
// Unauthorized reproduction and/or distribution is strictly prohibited. This
// product is protected under copyright law and trade secret law as an
// unpublished work. Created 1987, (C) Copyright 1997 Texas Instruments. All
// rights reserved.
//
// Filename : uartmoden_a9.c
// Description : Body file for the UART_MODEM MODEM module
// Project : Import form Samson to Perseus
// Author : rJULLIEN@tif.ti.com JULLIEN.Richard
// adapted by freygagne@tif.ti.com Francois Reygagne
// adapted by fhugueni@ti.com Francois Huguenin
// LIMITATIONS
// Some few registers have some fields with some undefined values
// such as:
// To access them without violation, we must use the files force.do
// which makes VHDL forcing some values to each undefined fields
//------------------------------------------------------------------------------
#include "test.h"
#include "global_types.h"
#include "result.h"
#include "intvecs.h"
#include "test.h"
#include "uartmodem.h"
#include "reset.h"
#include "errorcodes.h"
#define UART_COMPILE
void UMOD_TestResetValue(UARTMOD_UartType_t UartType)
{
UWORD8 OldEFR, OldMCR, OldLCR;
OldMCR=UARTMOD_MCR_REG(UartType);
OldLCR=UARTMOD_LCR_REG(UartType);
UMOD_SetBfToLcr(UartType);
OldEFR=UARTMOD_EFR_REG(UartType);
UARTMOD_DLL_REG(UartType) = 0x01; // This set up enables the UART clock
UARTMOD_DLH_REG(UartType) = 0x00;
UARTMOD_LCR_REG(UartType)=OldLCR;
// Only the first and the second column are tested as the columns on the edge
// allow to access to any register.
// 1st column (LCR7=0)
//=====================
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_IER_REG,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UIER_RHRIT,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UIER_THRIT,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UIER_LINESTSIT,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UIER_MODEMSTSIT,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UIER_SLEEPMODE,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UIER_XOFFIT,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UIER_RTSIT,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UIER_CTSIT,UartType);
END;
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_IIR_REG,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UIIR_ITPENDING,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UIIR_ITTYPE,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UIIR_FCRMIRROR,UartType);
END;
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_LCR_REG,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_LCR_CHARLENGTH,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_LCR_NBSTOP,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_LCR_PARITYEN,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_LCR_PARITYTYPE1,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_LCR_PARITYTYPE2,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_LCR_BREAKEN,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_LCR_DIVEN,UartType);
END;
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_MCR_REG,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_MCR_DCD,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_MCR_RTS,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_MCR_LOOPBACKEN,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_MCR_XONEN,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_MCR_TCRTLR,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_MCR_CLKSEL,UartType);
END;
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_LSR_REG,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_ULSR_RXFIFOE,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_ULSR_RXOE,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_ULSR_TXFIFOE,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_ULSR_TXSRE,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_ULSR_RXFIFOSTS,UartType);
END;
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_MSR_REG,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_MSR_CTSSTS,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_MSR_DSRSTS,UartType);
END;
UMOD_SetEfr4(UartType);
UMOD_SetMcr6(UartType);
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_TCR_REG,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_TCR_RXFIFOTRIGHALT,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_TCR_RXFIFOTRIGSTART,UartType);
END;
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_TLR_REG,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_TLR_TXFIFOTRIGDMA,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_TLR_RXFIXOTRIGDMA,UartType);
END;
UMOD_ClearEfr4(UartType);
UMOD_ClearMcr6(UartType);
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_MDR1_REG,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_MDR1_MODESELECT,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_MDR1_IRSLEEP,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_MDR1_SCT,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_MDR1_FRAMEENDMODE,UartType);
END;
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_SCR_REG,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_SCR_DMAMODECTL,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_SCR_DMAMODE2,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_SCR_TXEMPTYCTLIT,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_SCR_RXCTSWAKEUPENABLE,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_SCR_DSRIT,UartType);
END;
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_SSR_REG,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_SSR_TXFIFOFULL,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_SSR_RXCTSWAKEUPSTS,UartType);
END;
// 3rd column (LCR=BF)
//=====================
UMOD_SetBfToLcr(UartType);
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_EFR_REG,UartType);
UART_TEST_FIELD_RES_VAL( UARTMOD_EFR_SWFLOWCONTROL,UartType);
UART_TEST_FIELD_RES_VAL( UARTMOD_EFR_ENHANCEDEN,UartType);
UART_TEST_FIELD_RES_VAL( UARTMOD_EFR_SPECIALCHARDETECT,UartType);
UART_TEST_FIELD_RES_VAL( UARTMOD_EFR_AUTORTSEN,UartType);
UART_TEST_FIELD_RES_VAL( UARTMOD_EFR_AUTOCTSEN,UartType);
END;
UART_READ_ACCESS_WORK_WITH_REGISTER(UARTMOD_UASR_ST_REG,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UASR_SPEED,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UASR_BITBYCHAR,UartType);
UART_TEST_FIELD_RES_VAL(UARTMOD_UASR_PARITYTYPE,UartType);
END;
UARTMOD_LCR_REG(UartType)=OldLCR;
/* PRINT_CURRENT_ERROR_STATUS(UartType==UART_MODEM ?
UARTMOD_TEST_RESET_VALUE_SUCCEEDED:
UartType==UART_BLUETOOTH ?
UARTBT_TEST_RESET_VALUE_SUCCEEDED:
UARTEVAL_TEST_RESET_VALUE_SUCCEEDED); */
}
void UMOD_TestRegistersAccess(UARTMOD_UartType_t UartType)
{
// 1st column (LCR7=0)
//=====================
UMOD_ClearLcr7(UartType);
UMOD_SetEfr4(UartType);
UART_READWRITE_ACCESS_WORK_WITH_REGISTER(UARTMOD_IER_REG,UartType);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_UIER_RHRIT,8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_UIER_THRIT,8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_UIER_LINESTSIT,8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_UIER_MODEMSTSIT,8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_UIER_SLEEPMODE,8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_UIER_XOFFIT,8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_UIER_RTSIT,8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_UIER_CTSIT,8);
UART_WRITE_MASK(UARTMOD_IER_REG,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_UIER_RHRIT,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_UIER_THRIT,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_UIER_LINESTSIT,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_UIER_MODEMSTSIT,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_UIER_SLEEPMODE,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_UIER_XOFFIT,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_UIER_RTSIT,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_UIER_CTSIT,UartType);
UART_WRITE_PREVIOUS_VALUE(UARTMOD_IER_REG,UartType);
END;
UMOD_ClearEfr4(UartType);
UART_READWRITE_ACCESS_WORK_WITH_REGISTER(UARTMOD_LCR_REG,UartType);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_LCR_CHARLENGTH, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_LCR_NBSTOP, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_LCR_PARITYEN, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_LCR_PARITYTYPE1, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_LCR_PARITYTYPE2, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_LCR_BREAKEN, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_LCR_DIVEN, 8);
UART_WRITE_MASK(UARTMOD_LCR_REG,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_LCR_CHARLENGTH, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_LCR_NBSTOP, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_LCR_PARITYEN, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_LCR_PARITYTYPE1, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_LCR_PARITYTYPE2, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_LCR_BREAKEN, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_LCR_DIVEN, UartType);
UART_WRITE_PREVIOUS_VALUE(UARTMOD_LCR_REG,UartType);
END;
UMOD_SetEfr4(UartType);
UART_READWRITE_ACCESS_WORK_WITH_REGISTER(UARTMOD_MCR_REG,UartType);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_MCR_DCD, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_MCR_RTS, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_MCR_LOOPBACKEN, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_MCR_XONEN, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_MCR_TCRTLR, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_MCR_CLKSEL, 8);
UART_WRITE_MASK(UARTMOD_MCR_REG,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_MCR_DCD, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_MCR_RTS, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_MCR_LOOPBACKEN, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_MCR_XONEN, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_MCR_TCRTLR, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_MCR_CLKSEL, UartType);
UART_WRITE_PREVIOUS_VALUE(UARTMOD_MCR_REG,UartType);
END;
UMOD_ClearEfr4(UartType);
UMOD_SetEfr4(UartType);
UMOD_SetMcr6(UartType);
MODIFY_FIELD_RESET_VALUE_MOD(UARTMOD_TCR_REG, UARTMOD_TCR_RXFIFOTRIGHALT, UartType);
MODIFY_FIELD_RESET_VALUE_MOD(UARTMOD_TCR_REG, UARTMOD_TCR_RXFIFOTRIGSTART, UartType);
MODIFY_FIELD_RESET_VALUE_MOD(UARTMOD_TLR_REG, UARTMOD_TLR_TXFIFOTRIGDMA, UartType);
MODIFY_FIELD_RESET_VALUE_MOD(UARTMOD_TLR_REG, UARTMOD_TLR_RXFIXOTRIGDMA, UartType);
UMOD_ClearEfr4(UartType);
UMOD_ClearMcr6(UartType);
MODIFY_FIELD_UNDEFINED_MOD(UARTMOD_SPR_REG, UARTMOD_SPRWORD, UartType);
UART_READWRITE_ACCESS_WORK_WITH_REGISTER(UARTMOD_MDR1_REG,UartType);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_MDR1_MODESELECT, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_MDR1_IRSLEEP, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_MDR1_SCT, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_MDR1_FRAMEENDMODE, 8);
UART_WRITE_MASK(UARTMOD_MDR1_REG,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_MDR1_MODESELECT, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_MDR1_IRSLEEP, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_MDR1_SCT, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_MDR1_FRAMEENDMODE, UartType);
UART_WRITE_PREVIOUS_VALUE(UARTMOD_MDR1_REG,UartType);
END;
UART_READWRITE_ACCESS_WORK_WITH_REGISTER(UARTMOD_SCR_REG,UartType);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_SCR_DMAMODECTL, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_SCR_DMAMODE2, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_SCR_TXEMPTYCTLIT, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_SCR_RXCTSWAKEUPENABLE, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_SCR_DSRIT, 8);
UART_WRITE_MASK(UARTMOD_SCR_REG,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_SCR_DMAMODECTL, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_SCR_DMAMODE2, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_SCR_TXEMPTYCTLIT, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_SCR_RXCTSWAKEUPENABLE, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_SCR_DSRIT, UartType);
UART_WRITE_PREVIOUS_VALUE(UARTMOD_SCR_REG,UartType);
END;
// 3rd column (LCR=BF)
//=====================
UMOD_SetBfToLcr(UartType);
MODIFY_FIELD_UNDEFINED_MOD(UARTMOD_DLL_REG, UARTMOD_CKLSB, UartType);
MODIFY_FIELD_UNDEFINED_MOD(UARTMOD_DLH_REG, UARTMOD_CKMSB, UartType);
UART_READWRITE_ACCESS_WORK_WITH_REGISTER(UARTMOD_EFR_REG,UartType);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_EFR_SWFLOWCONTROL, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_EFR_ENHANCEDEN, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_EFR_SPECIALCHARDETECT, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_EFR_AUTORTSEN, 8);
READWRITE_ACCESS_PREPARE_OPPOSED_MASK(UARTMOD_EFR_AUTOCTSEN, 8);
UART_WRITE_MASK(UARTMOD_EFR_REG,UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_EFR_SWFLOWCONTROL, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_EFR_ENHANCEDEN, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_EFR_SPECIALCHARDETECT, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_EFR_AUTORTSEN, UartType);
UART_READ_WRITE_CHECK_TEST_FIELD(UARTMOD_EFR_AUTOCTSEN, UartType);
UART_WRITE_PREVIOUS_VALUE(UARTMOD_EFR_REG,UartType);
END;
MODIFY_FIELD_UNDEFINED_MOD(UARTMOD_ADR1_REG, UARTMOD_XONWORD1, UartType);
MODIFY_FIELD_UNDEFINED_MOD(UARTMOD_ADR2_REG, UARTMOD_XONWORD2, UartType);
MODIFY_FIELD_UNDEFINED_MOD(UARTMOD_XOFF1_REG, UARTMOD_XOFFWORD1, UartType);
MODIFY_FIELD_UNDEFINED_MOD(UARTMOD_XOFF2_REG, UARTMOD_XOFFWORD2, UartType);
MODIFY_FIELD_RESET_VALUE_MOD(UARTMOD_UIR_REG, UARTMOD_UIR_UARTACCESS, UartType);
MODIFY_FIELD_RESET_VALUE_MOD(UARTMOD_UIR_REG, UARTMOD_UIR_UARTMASKIT, UartType);
PRINT_CURRENT_ERROR_STATUS(UartType==UART_MODEM ?
UARTMOD_TEST_REGISTER_ACCESS_SUCCEEDED:
UartType==UART_BLUETOOTH ?
UARTBT_TEST_REGISTER_ACCESS_SUCCEEDED:
UARTEVAL_TEST_REGISTER_ACCESS_SUCCEEDED);
}
void UMOD_InitFcr(UARTMOD_FifoEnable_t EnFifo ,
UARTMOD_RxFifoClear_t ClRxFifo,
UARTMOD_TxFifoClear_t ClTxFifo,
UARTMOD_DmaMode_t DmaMode,
UARTMOD_TxFifoTrigger_t TxnbFifo,
UARTMOD_RxFifoTrigger_t RxnbFifo,
UARTMOD_UartType_t UartType)
{
// Local variable
UWORD8 efrtemp,mdr1temp,lcrtemp,dlltemp,dlhtemp;
volatile UWORD8 i;
// Read MDR1(Mode Definition Register 1) to save value
mdr1temp =UARTMOD_MDR1_REG(UartType);
// Read LCR (Line Control Register) to save value
lcrtemp= UMOD_SetBfToLcr(UartType);
//Store current value EFR register
efrtemp= UARTMOD_EFR_REG(UartType);
//Set bit EFR[4]=1
UARTMOD_EFR_REG(UartType)=(efrtemp | 0x10);
// Set MODE_SELECT bit in reset mode
UARTMOD_MDR1_REG(UartType) |= 0x07;
dlltemp= UARTMOD_DLL_REG(UartType);/* Save value to DLL register */
dlhtemp= UARTMOD_DLH_REG(UartType);/* Save value to DLH register */
UARTMOD_DLL_REG(UartType) &= 0x00; /* Set DLL register to zero*/
UARTMOD_DLH_REG(UartType) &= 0x00; /*Set DLH register to zero */
// Wait 18 clock cycles
// delay();
for (i=0;i<10; i++);
UMOD_ClearLcr7(UartType);
// Program FCR register
UARTMOD_FCR_REG(UartType) = (EnFifo |
ClRxFifo << 1 |
ClTxFifo << 2 |
DmaMode << 3 |
TxnbFifo << 4 |
RxnbFifo << 6);
// restore values to DLH,DLL,LCR,MDR1,EFR registers
UMOD_SetBfToLcr(UartType);
UARTMOD_EFR_REG(UartType)=efrtemp;
UARTMOD_DLH_REG(UartType)=dlhtemp;
UARTMOD_DLL_REG(UartType)=dlltemp;
UARTMOD_LCR_REG(UartType)=lcrtemp;
UARTMOD_MDR1_REG(UartType)=mdr1temp;
}
//-----------------------------------------------------------------
// UMOD_InitLcr
//-----------------------------------------------------------------
UWORD8 UMOD_InitLcr(const UARTMOD_CharLength_t CharLength,
const UARTMOD_NbStop_t nbStop,
const UARTMOD_ParityEnable_t ParityEnable,
const UARTMOD_ParityType_t ParityType,
const UARTMOD_BreakEnable_t BreakEnable,
const UARTMOD_DivisorEnable_t DivisorEnable,
UARTMOD_UartType_t UartType)
{
UWORD8 lcrmodem;
UARTMOD_LCR_REG(UartType) = ( CharLength | nbStop << 2 |
ParityEnable << 3 | ParityType << 4 |
BreakEnable << 6 | DivisorEnable << 7 );
UARTMOD_LCR_REG(UartType)&=0xDF;
lcrmodem = UARTMOD_LCR_REG(UartType);
return lcrmodem;
}
//--------------------------------------------------------------------
// UMOD_SetBfToLcr
//--------------------------------------------------------------------
UWORD8 UMOD_SetBfToLcr(UARTMOD_UartType_t UartType)
{
UWORD8 LCR_Storedvalue = UARTMOD_LCR_REG(UartType)&0xDF;
UARTMOD_LCR_REG(UartType) = 0xBF;
return LCR_Storedvalue;
}
//--------------------------------------------------------------------
// UMOD_CheckLcr7Is0
//--------------------------------------------------------------------
void UMOD_CheckLcr7Is0(UARTMOD_UartType_t UartType)
{
if(((UARTMOD_LCR_REG(UartType))&0x80)!=0)
{
RES_Set(SET_UART_ERROR(UartType,LCR_IS_NOT_WELL_DEFINED));
UARTMOD_LCR_REG(UartType) &= 0x7F;
}
}
//--------------------------------------------------------------------
// UMOD_ClearLcr7
//--------------------------------------------------------------------
UWORD8 UMOD_ClearLcr7(UARTMOD_UartType_t UartType)
{
UWORD8 oldlcr;
//Store LCR and set LCR[7]=0
oldlcr = UARTMOD_LCR_REG(UartType);
UARTMOD_LCR_REG(UartType) &= 0x7F;
return oldlcr;
}
//--------------------------------------------------------------------
// CheckEFR4IsSet
//--------------------------------------------------------------------
void UMOD_CheckEfr4IsSet(UARTMOD_UartType_t UartType)
{
if((UARTMOD_EFR_REG(UartType)&0x10)==0)
{
RES_Set(SET_UART_ERROR(UartType,EFR_IS_NOT_WELL_DEFINED));
UARTMOD_EFR_REG(UartType)|=0x10;
}
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