usb_otg_ctrl.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,SRP_GPDVBUS,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,SRP_GPUVBUS,32);
    //USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED2 when read, any RESERVED bit returns 0
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED2,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,A_WAIT_VRISE,32);
    //USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED3  when read, any RESERVED bit returns 0
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED3,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,B_ASE0_BRST,32);
    //USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED1  when read, any RESERVED bit returns 0
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED1,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,SRP_DPW,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,SRP_DATA,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,SRP_VBUS,32);
    //USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED4  when read, any RESERVED bit returns 0
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED4,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,OTG_PADEN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,HMC_PADEN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,UHOST_EN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,HMC_TLLSPEED,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,HMC_TLLATTACH,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32,HMC_MODE,32);
    RW_WRITE(USB_OTG_CTRL_OTG_SYSCON_2_32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,OTG_EN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,USBx_SYNCHRO,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,OTG_MST16,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,SRP_GPDATA,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,SRP_GPDVBUS,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,SRP_GPUVBUS,32);
    //USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED2  when read, any RESERVED bit returns 0
    //RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED2,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,A_WAIT_VRISE,32);
    //USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED3  when read, any RESERVED bit returns 0
    //RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED3,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,B_ASE0_BRST,32);
    //USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED1  when read, any RESERVED bit returns 0
    //RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED1,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,SRP_DPW,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,SRP_DATA,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,SRP_VBUS,32);
    //USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED4  when read, any RESERVED bit returns 0
    //RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,RESERVED4,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,OTG_PADEN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,HMC_PADEN,32);
    //USB_OTG_CTRL_OTG_SYSCON_2_32,UHOST_EN, read this bit will give the USB Host clock enable (UHOSTENI pin) 
    // selected by the HMC_PADEN = 1.
    //RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,UHOST_EN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,HMC_TLLSPEED,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,HMC_TLLATTACH,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_SYSCON_2_32,HMC_MODE,32);
    RW_WRITE_PREVIOUS_VALUE(USB_OTG_CTRL_OTG_SYSCON_2_32);
    END_RW_TEST();

    BEGIN_RW_TEST(USB_OTG_CTRL_OTG_CTRL_32,32);
    //USB_OTG_CTRL_OTG_CTRL_32,RESERVED1 is Read Only
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_CTRL_32,ASESSVLD,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_CTRL_32,BSESSEND,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_CTRL_32,BSESSVLD,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_CTRL_32,VBUSVLD,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_CTRL_32,ID,32);
    //USB_OTG_CTRL_OTG_CTRL_32,DRIVER_SEL is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,RESERVED2 is Read Only
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_CTRL_32,A_SETB_HNPEN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_CTRL_32,A_BUSREQ,32);
    //USB_OTG_CTRL_OTG_CTRL_32,RESERVED3 is Read Only
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_CTRL_32,B_HNPEN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_CTRL_32,B_BUSREQ,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_CTRL_32,OTG_BUSDROP,32);
    //USB_OTG_CTRL_OTG_CTRL_32,RESERVED4 is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,OTG_PD is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,OTG_PU is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,OTG_DRV_VBUS is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,OTG_PD_VBUS is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,OTG_PU_VBUS is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,OTG_PU_ID is Read Only
    RW_WRITE(USB_OTG_CTRL_OTG_CTRL_32);
    //USB_OTG_CTRL_OTG_CTRL_32,RESERVED1 is Read Only
    RW_TEST_READ(USB_OTG_CTRL_OTG_CTRL_32,ASESSVLD,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_CTRL_32,BSESSEND,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_CTRL_32,BSESSVLD,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_CTRL_32,VBUSVLD,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_CTRL_32,ID,32);
    //USB_OTG_CTRL_OTG_CTRL_32,DRIVER_SEL is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,RESERVED2 is Read Only
    RW_TEST_READ(USB_OTG_CTRL_OTG_CTRL_32,A_SETB_HNPEN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_CTRL_32,A_BUSREQ,32);
    //USB_OTG_CTRL_OTG_CTRL_32,RESERVED3 is Read Only
    RW_TEST_READ(USB_OTG_CTRL_OTG_CTRL_32,B_HNPEN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_CTRL_32,B_BUSREQ,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_CTRL_32,OTG_BUSDROP,32);
    //USB_OTG_CTRL_OTG_CTRL_32,RESERVED4 is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,OTG_PD is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,OTG_PU is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,OTG_DRV_VBUS is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,OTG_PD_VBUS is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,OTG_PU_VBUS is Read Only
    //USB_OTG_CTRL_OTG_CTRL_32,OTG_PU_ID is Read Only
    RW_WRITE_PREVIOUS_VALUE(USB_OTG_CTRL_OTG_CTRL_32);
    END_RW_TEST();

    BEGIN_RW_TEST(USB_OTG_CTRL_OTG_IRQ_EN_32,32);
    //USB_OTG_CTRL_OTG_IRQ_EN_32,RESERVED1 is Read Only
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_EN_32,DRIVER_SWITCH_EN,32);
    //USB_OTG_CTRL_OTG_IRQ_EN_32,RESERVED2 is Read Only
    //RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_EN_32,RESERVED2,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_EN_32,A_VBUS_ERR_EN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_EN_32,A_REQ_TMROUT_EN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_EN_32,A_SRP_DETECT_EN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_EN_32,B_HNP_FAIL_EN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_EN_32,B_SRP_TMROUT_EN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_EN_32,B_SRP_DONE_EN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_EN_32,B_SRP_STARTED_EN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_EN_32,OPRT_CHG_EN,32);
    RW_WRITE(USB_OTG_CTRL_OTG_IRQ_EN_32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_EN_32,DRIVER_SWITCH_EN,32);
    //USB_OTG_CTRL_OTG_IRQ_EN_32,RESERVED2 when read, any RESERVED bit returns 0
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_EN_32,RESERVED2,32);

    RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_EN_32,A_VBUS_ERR_EN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_EN_32,A_REQ_TMROUT_EN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_EN_32,A_SRP_DETECT_EN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_EN_32,B_HNP_FAIL_EN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_EN_32,B_SRP_TMROUT_EN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_EN_32,B_SRP_DONE_EN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_EN_32,B_SRP_STARTED_EN,32);
    //USB_OTG_CTRL_OTG_IRQ_EN_32,RESERVED4 when read, any RESERVED bit returns 0
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_EN_32,RESERVED4,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_EN_32,OPRT_CHG_EN,32);
    RW_WRITE_PREVIOUS_VALUE(USB_OTG_CTRL_OTG_IRQ_EN_32);
    END_RW_TEST();

    BEGIN_RW_TEST(USB_OTG_CTRL_OTG_IRQ_SRC_32,32);
    //USB_OTG_CTRL_OTG_IRQ_SRC_32,RESERVED1 is Read Only
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_SRC_32,DRIVER_SWITCH,32);
    //USB_OTG_CTRL_OTG_IRQ_SRC_32,RESERVED2 is Read Only
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_SRC_32,A_VBUS_ERR,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_SRC_32,A_REQ_TMROUT,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_SRC_32,A_SRP_DETECT,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_SRC_32,B_HNP_FAIL,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_SRC_32,B_SRP_TMROUT,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_SRC_32,B_SRP_DONE,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_SRC_32,B_SRP_STARTED,32);
    //USB_OTG_CTRL_OTG_IRQ_SRC_32,RESERVED4 is Read Only
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_IRQ_SRC_32,OPRT_CHG,32);
    RW_WRITE(USB_OTG_CTRL_OTG_IRQ_SRC_32);
    //USB_OTG_CTRL_OTG_IRQ_SRC_32,RESERVED1 is Read Only
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_SRC_32,DRIVER_SWITCH,32);// this bit is cleared by writing 1
    //USB_OTG_CTRL_OTG_IRQ_SRC_32,RESERVED2 when read, any RESERVED bit returns 0
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_SRC_32,RESERVED2,32);
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_SRC_32,A_VBUS_ERR,32);   // this bit is cleared by writing 1
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_SRC_32,A_REQ_TMROUT,32); // this bit is cleared by writing 1
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_SRC_32,A_SRP_DETECT,32); // this bit is cleared by writing 1
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_SRC_32,B_HNP_FAIL,32);   // this bit is cleared by writing 1
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_SRC_32,B_SRP_TMROUT,32); // this bit is cleared by writing 1
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_SRC_32,B_SRP_DONE,32);   // this bit is cleared by writing 1
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_SRC_32,B_SRP_STARTED,32);// this bit is cleared by writing 1
    //USB_OTG_CTRL_OTG_IRQ_SRC_32,RESERVED4 when read, any RESERVED bit returns 0
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_SRC_32,RESERVED4,32);
    //RW_TEST_READ(USB_OTG_CTRL_OTG_IRQ_SRC_32,OPRT_CHG,32);     // this bit is cleared by writing 1
    RW_WRITE_PREVIOUS_VALUE(USB_OTG_CTRL_OTG_IRQ_SRC_32);
    END_RW_TEST();

    BEGIN_RW_TEST(USB_OTG_CTRL_OTG_OUTCTRL_32,32);
    //USB_OTG_CTRL_OTG_OUTCTRL_32,RESERVED1 is Read Only
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,RESERVED1,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,OTGVPD,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,OTGVPU,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,OTGPUID,32);
    //USB_OTG_CTRL_OTG_OUTCTRL_32,RESERVED2 is Read Only
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,RESERVED2,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,USB2VDR,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,USB2PDEN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,USB2PUEN,32);
    //USB_OTG_CTRL_OTG_OUTCTRL_32,RESERVED3 is Read Only
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,RESERVED3,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,USB1VDR,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,USB1PDEN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,USB1PUEN,32);
    //USB_OTG_CTRL_OTG_OUTCTRL_32,RESERVED4 is Read Only
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,RESERVED4,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,USB0VDR,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,USB0PDEN,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32,USB0PUEN,32);
    RW_WRITE(USB_OTG_CTRL_OTG_OUTCTRL_32);
    //USB_OTG_CTRL_OTG_OUTCTRL_32,RESERVED1, any RESERVED bit returns 0
    RW_TEST_READ(USB_OTG_CTRL_OTG_OUTCTRL_32,OTGVPD,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_OUTCTRL_32,OTGVPU,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_OUTCTRL_32,OTGPUID,32);
    //USB_OTG_CTRL_OTG_OUTCTRL_32,RESERVED2, any RESERVED bit returns 0
    RW_TEST_READ(USB_OTG_CTRL_OTG_OUTCTRL_32,USB2VDR,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_OUTCTRL_32,USB2PDEN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_OUTCTRL_32,USB2PUEN,32);
    //USB_OTG_CTRL_OTG_OUTCTRL_32,RESERVED3, any RESERVED bit returns 0
    RW_TEST_READ(USB_OTG_CTRL_OTG_OUTCTRL_32,USB1VDR,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_OUTCTRL_32,USB1PDEN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_OUTCTRL_32,USB1PUEN,32);
    //USB_OTG_CTRL_OTG_OUTCTRL_32,RESERVED4, any RESERVED bit returns 0
    RW_TEST_READ(USB_OTG_CTRL_OTG_OUTCTRL_32,USB0VDR,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_OUTCTRL_32,USB0PDEN,32);
    RW_TEST_READ(USB_OTG_CTRL_OTG_OUTCTRL_32,USB0PUEN,32);
    RW_WRITE_PREVIOUS_VALUE(USB_OTG_CTRL_OTG_OUTCTRL_32);
    END_RW_TEST();

    BEGIN_RW_TEST(USB_OTG_CTRL_OTG_TEST_32,32);
    //USB_OTG_CTRL_OTG_TEST_32,RESERVED1 is Read Only
    //RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_TEST_32,RESERVED1,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_TEST_32,TEST_UNLOCK,32);
    //USB_OTG_CTRL_OTG_TEST_32,RESERVED2 is Read Only
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_TEST_32,RESERVED2,32);
    RW_PREPARE_WRITE(USB_OTG_CTRL_OTG_TEST_32,IRQ_OTG,32);
    //USB_OTG_CTRL_OTG_TEST_32,OTG_FSM_STATE is Read Only
    RW_WRITE(USB_OTG_CTRL_OTG_TEST_32);
    //USB_OTG_CTRL_OTG_TEST_32,RESERVED1, any RESERVED bit returns 0
    // the TEST_UNLOCK bit is always read as 0 
    //RW_TEST_READ(USB_OTG_CTRL_OTG_TEST_32,TEST_UNLOCK,32);
    //USB_OTG_CTRL_OTG_TEST_32,RESERVED2, any RESERVED bit returns 0
    // the IRQ_OTG bit is always read as 0 
    //RW_TEST_READ(USB_OTG_CTRL_OTG_TEST_32,IRQ_OTG,32);
    //USB_OTG_CTRL_OTG_TEST_32,OTG_FSM_STATE is Read Only
    RW_WRITE_PREVIOUS_VALUE(USB_OTG_CTRL_OTG_TEST_32);
    END_RW_TEST();

    if ( GlobalStatus == TEST_OK )
      Status = 0;
    else
      Status = 1;

  END_ACCESS_MODULE();

  return Status;

}