clkrst.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

UWORD16 Pos, Numb;

switch (PerifName)
  {
  case DSP_WDGTIM_CK ://watchdog timer clock
    {
    Pos=DSP_EN_WDTCK_POS;
    Numb=DSP_EN_WDTCK_NUMB;
    break;
    }

  case DSP_XORPC_CK ://vtcxo reference peripheral
    {
    Pos=DSP_EN_XORPCK_POS;
    Numb=DSP_EN_XORPCK_NUMB;
    break;
    }

  case DSP_PER_CK ://external peripheral
    {
    Pos=DSP_EN_PERCK_POS;
    Numb=DSP_EN_PERCK_NUMB;
    break;
    }

  case DSP_UART_CK ://uart 
    {
    Pos=DSP_EN_UARTCK_POS;
    Numb=DSP_EN_UARTCK_NUMB;
    break;
    }

  case DSP_GPIO_CK ://GPIO clock
    {
    Pos=DSP_EN_GPIOCK_POS;
    Numb=DSP_EN_GPIOCK_NUMB;
    break;
    }

  case DSP_TIM_CK ://os timer
    {
    Pos=DSP_EN_TIMCK_POS;
    Numb=DSP_EN_TIMCK_NUMB;
    break;
    }

  case DSP_ALL_CK ://ALL clocks
    {
        if (State==ENABLE)
            {
            SetGroupBits16(DSP_IDLECT2_REG,0,11,0xFFFF);
            }
        else
            {
            SetGroupBits16(DSP_IDLECT2_REG,0,11,0x0);
            }

    return((BOOL)TRUE);
    }

  default :
    {
    return((BOOL)FALSE);
    }
  }

  SetGroupBits16(DSP_IDLECT2_REG,Pos,Numb,State);
  return((BOOL)TRUE);

}


//----------------------------------------------------------
// NAME        : CLKRST_DspPeripheralClockControl 
// DESCRIPTION : Define the frequency selection for the selected peripheral clock
//               (ENABLE = the clock is issued from CK_GEN2
//                DISABLE = the clock is the input reference clock)
// PARAMETERS  : PerifName
//                        DSP_UARTXO   
//                        DSP_GPIOXO    
//                        DSP_TIMXO      
//                                   
//                and State=ENABLE or DISABLE
// RETURN VALUE: IS_OK if the operation succeed
//               NOT_OK if not      -
//  LIMITATIONS : None                                      -
// ----------------------------------------------------------

BOOL CLKRST_SetDspPeripheralClockControl(DSP_CLOCK_CONTROL_t PerifName, BOOL State)
{
UWORD16 Pos, Numb;

switch (PerifName)
  {
  case DSP_UARTXO ://UART frequency selection
    {
    Pos=UARTXO_POS;
    Numb=UARTXO_NUMB;
    break;
    }

  case DSP_GPIOXO ://GPIO sub-frequency selection
    {
    Pos=GPIOXO_POS;
    Numb=GPIOXO_NUMB;
    break;
    }

  case DSP_TIMXO ://GPIO frequency selection
    {
    Pos=TIMXO_POS;
    Numb=TIMXO_NUMB;
    break;
    }

  
  default :
    {
    return((BOOL)FALSE);
    }
  }

  SetGroupBits16(DSP_CKCTL_REG,Pos,Numb,State);
  return((BOOL)TRUE);

}


//-----------------------------------------------------------------------------
// NAME         : CLKRST_DriveDspReset                                              --
// DESCRIPTION  : drive the reset line of the dsp
// PARAMETERS   : level HIGH_LEVEL or LOW_LEVEL
// RETURN VALUE : None 
// LIMITATIONS  : None                              
//-----------------------------------------------------------------------------
void CLKRST_DriveDspReset(BOOL level)
{
   SetGroupBits16(ARM_RSTCT1_REG,DSP_EN_POS,DSP_EN_NUMB,level);
}

//-----------------------------------------------------------------------------
// NAME         : CLKRST_EnableDisableDsp                                              --
// DESCRIPTION  : Reset the priority registers, Emifs confs and API control
// PARAMETERS   : level HIGH_LEVEL or LOW_LEVEL
// RETURN VALUE : None 
// LIMITATIONS  : None                              
//-----------------------------------------------------------------------------
void CLKRST_DriveInterfaceDspReset(BOOL level)
{
    SetGroupBits16(ARM_RSTCT1_REG,DSP_RST_POS,DSP_RST_NUMB,level);
}

//-----------------------------------------------------------------------------
// NAME         : CLKRST_EnableDisableDspClock
// DESCRIPTION  : Enable or disable the dsp clock to turned on during the reset state
// PARAMETERS   : Action ENABLE or DISABLE
// RETURN VALUE : None 
// LIMITATIONS  : None                              
//-----------------------------------------------------------------------------
void CLKRST_EnableDisableDspClock(BOOL Action)
{
    SetGroupBits16(ARM_CKCTL_REG,EN_DSPCK_POS,EN_DSPCK_NUMB,Action);
}

//-----------------------------------------------------------------------------
// NAME         : CLKRST_SetIdle               
// DESCRIPTION  : Launch the idle mode                  
// PARAMETERS   : IdleMode         IDLE_PIN_WKUP or IDLE_INT_WKUP 
//
// RETURN VALUE : None.                                                      --
// LIMITATIONS  : None                                                      --
//-----------------------------------------------------------------------------
void CLKRST_SetIdle(BOOL IdleMode)
{  
  SetGroupBits16(ARM_IDLECT1_REG,WKUP_MODE_POS,WKUP_MODE_NUMB,IdleMode);
  SetGroupBits16(ARM_IDLECT1_REG,IDL_CLKOUT_ARM_POS,IDL_CLKOUT_ARM_NUMB,SET_IN_IDLE);
  
}

//-----------------------------------------------------------------------------
// NAME         : CLKRST_TogglePeripheralResetPin       
// DESCRIPTION  : Toggle the pin which manage the peripheral reset :MCUPER_nRST
// PARAMETERS   : LOW_LEVEL or HIGH_LEVEL
// RETURN VALUE : None 
// LIMITATIONS  : None                                    --
//-----------------------------------------------------------------------------
void CLKRST_TogglePeripheralResetPin(BOOL State)
{
    SetGroupBits16(ARM_RSTCT2_REG,PER_EN_POS,PER_EN_NUMB,State);
}


//-----------------------------------------------------------------------------
// NAME         : CLKRST_ToggleDspPeripheralResetPin       
// DESCRIPTION  : Toggle the pin which manage the peripheral reset :MCUPER_nRST
// PARAMETERS   : LOW_LEVEL or HIGH_LEVEL
// RETURN VALUE : None 
// LIMITATIONS  : None                                    --
//-----------------------------------------------------------------------------
void CLKRST_ToggleDspPeripheralResetPin(BOOL State)
{
    SetGroupBits16(DSP_RSTCT2_REG,PER_EN_POS,PER_EN_NUMB,State);
}


//-----------------------------------------------------------------------------
// NAME         : CLKA_SetClockDivider                     
// DESCRIPTION  : defines the frequency for sub domain
// PARAMETERS   : CLOCK_DIV values of peripherals     
//                                                    
//                   DSPMMU_DIV                   
//                   TC_DIV                       
//                   DSP_DIV                      
//                   ARM_DIV                      
//                   LCD_DIV                      
//                   PER_DIV                      
//                                                    
//                                                    
//                    CLK_DIV_BY_1                     
//                    CLK_DIV_BY_2                     
//                    CLK_DIV_BY_4                     
//                    CLK_DIV_BY_8                     
//                                                    
// RETURN VALUE : None.                               
// LIMITATIONS  : None                                
//-----------------------------------------------------------------------------
void CLKRST_SetClockDivider(DIV_NAME_t DivName,  CKCTL_DIV_t divval)
{
#define CLEAN 0x3

switch (DivName)
  {
  case DSPMMU_DIV :
    {
    SetGroupBits16(ARM_CKCTL_REG,DSPMMUDIV_POS,DSPMMUDIV_NUMB,divval);
    break;
    }

  case TC_DIV :
    {
    SetGroupBits16(ARM_CKCTL_REG,TCDIV_POS,TCDIV_NUMB,divval);
    break;
    }

  case DSP_DIV :
    {
    SetGroupBits16(ARM_CKCTL_REG,DSPDIV_POS,DSPDIV_NUMB,divval);
    break;
    }

  case ARM_DIV :
    {
    SetGroupBits16(ARM_CKCTL_REG,ARMDIV_POS,ARMDIV_NUMB,divval);
    break;
    }

  case LCD_DIV :
    {
    SetGroupBits16(ARM_CKCTL_REG,LCDDIV_POS,LCDDIV_NUMB,divval);
    break;
    }

  case PER_DIV :
    {
    SetGroupBits16(ARM_CKCTL_REG,PERDIV_POS,PERDIV_NUMB,divval);
    break;
    }

  default :
    {
    break;
    }
  }

}


//-----------------------------------------------------------------------------
// NAME         : GetClockDivider                     
// DESCRIPTION  : get the frequency divider for sub domain
// PARAMETERS   : DIV_NAME_t DivName name of the peripheral implied     
//                                                    
//                   DSPMMU_DIV                   
//                   TC_DIV                       
//                   DSP_DIV                      
//                   ARM_DIV                      
//                   LCD_DIV                      
//                   PER_DIV                      
//                                                    
//                                                    
//                                                    
// RETURN VALUE : 1,2,4 or 8 the real value of the divider (to be used directly in equation)                               
// LIMITATIONS  : None                                
//-----------------------------------------------------------------------------
UWORD16 CLKRST_GetClockDivider(DIV_NAME_t DivName)
{
UWORD16 divval=0;

switch (DivName)
  {
  case DSPMMU_DIV :
    {
    divval=GetGroupBits(ARM_CKCTL_REG,DSPMMUDIV_POS,DSPMMUDIV_NUMB);
    break;
    }

  case TC_DIV :
    {
     divval=GetGroupBits(ARM_CKCTL_REG,TCDIV_POS,TCDIV_NUMB);
    break;
    }

  case DSP_DIV :
    {
        divval=GetGroupBits(ARM_CKCTL_REG,DSPDIV_POS,DSPDIV_NUMB);
    break;
    }

  case ARM_DIV :
    {
     divval=GetGroupBits(ARM_CKCTL_REG,ARMDIV_POS,ARMDIV_NUMB);
    break;
    }

  case LCD_DIV :
    {
     divval=GetGroupBits(ARM_CKCTL_REG,LCDDIV_POS,LCDDIV_NUMB);
    break;
    }

  case PER_DIV :
    {
     divval=GetGroupBits(ARM_CKCTL_REG,PERDIV_POS,PERDIV_NUMB);
    break;
    }

  default :
    {
    break;
    }
  }

switch (divval)
  {
  case CLK_DIV_BY_1 :
    {
    divval=1;
    break;
    }

  case CLK_DIV_BY_2 :
    {
    divval=2;
    break;
    }

  case CLK_DIV_BY_4 :
    {
    divval=4;
    break;
    }

  case CLK_DIV_BY_8 :
    {
    divval=8;
    break;
    }

  default :
    {
    divval=1;
    break;
    }
  }

 return(divval);

}


//-----------------------------------------------------------------------------
// NAME         : CLKRST_ConfigIdleModule                                                --
// DESCRIPTION  : put or remove a module from idle mode                     --
// PARAMETERS   :
//                      State=SET_IN_IDLE or SET_NOT_IDLE for each module
// RETURN VALUE : None.                                                      --
// LIMITATIONS  : None                                                      --
//-----------------------------------------------------------------------------
void CLKRST_ConfigIdleModule(MODULE_IDLE_NAME_t Module2Set, BOOL State  )
{

    switch(Module2Set)
        {
        case TIMARM_MODULE_IDLE :
             {
             SetGroupBits16(ARM_IDLECT1_REG,IDLTIM_ARM_POS,IDLTIM_ARM_NUMB,State);
             break;
             }

        case APIARM_MODULE_IDLE:
             {
             SetGroupBits16(ARM_IDLECT1_REG,IDLAPI_ARM_POS,IDLAPI_ARM_NUMB,State);
             break;
             }

        case DPLLARM_MODULE_IDLE:
             {
             SetGroupBits16(ARM_IDLECT1_REG,IDLDPLL_ARM_POS,IDLDPLL_ARM_NUMB,State);
             break;
             }

        case LIFARM_MODULE_IDLE:
             {
             SetGroupBits16(ARM_IDLECT1_REG,IDLIF_ARM_POS,IDLIF_ARM_NUMB,State);
             break;
             }

        case HSABARM_MODULE_IDLE:
             {
             SetGroupBits16(ARM_IDLECT1_REG,IDL_HSAB_ARM_POS,IDL_HSAB_ARM_NUMB,State);
             break;
             }

        case LBARM_MODULE_IDLE:
             {
             SetGroupBits16(ARM_IDLECT1_REG,IDLLB_ARM_POS,IDLLB_ARM_NUMB,State);
             break;
             }

        case LCDARM_MODULE_IDLE:
             {
             SetGroupBits16(ARM_IDLECT1_REG,IDLLLCD_ARM_POS,IDLLLCD_ARM_NUMB,State);
             break;
             }

        case PERARM_MODULE_IDLE:
             {
             SetGroupBits16(ARM_IDLECT1_REG,IDLPER_ARM_POS,IDLPER_ARM_NUMB,State);
             break;
             }

        case XORPARM_MODULE_IDLE:
             {
             SetGroupBits16(ARM_IDLECT1_REG,IDLXORP_ARM_POS,IDLXORP_ARM_NUMB,State);
             break;
             }

        case WDTARM_MODULE_IDLE:
             {
             SetGroupBits16(ARM_IDLECT1_REG,IDLWDT_ARM_POS,IDLWDT_ARM_NUMB,State);
             break;
             }

        case ALL_IDLE:
             {
             SetGroupBits16(ARM_IDLECT1_REG,0,10,0x3FF);
             break;
             }

        default :
             {
             break;
             }
        }

}


//-----------------------------------------------------------------------------
// NAME         : CLKRST_SetClockMode
// DESCRIPTION  : Set the clock mode
// PARAMETERS   :   - SYNC_MODE
//                  - ASYNC_MODE
//                  - SCAL_MODE
//                  - ARM_TO_TC_MODE
//                  - DSP_TO_TC_MODE
//                  - BYPASS_MODE
//                  - TEST_MODE
// RETURN VALUE : None
// LIMITATIONS  : None
//-----------------------------------------------------------------------------
void CLKRST_SetClockMode(CLOCK_MODE_t ClockMode)
{
    SetGroupBits16(ARM_SYSST_REG,CLOCK_SELECT_POS,CLOCK_SELECT_NUMB,ClockMode);
}


//-----------------------------------------------------------------------------
// NAME         : CLKRST_GenerateReset                                         
// DESCRIPTION  : Reset the MCU
// PARAMETERS   : GLOBAL_RESET, MCU_RESET, DSP_RESET
// RETURN VALUE : None 
// LIMITATIONS  : None                              
//-----------------------------------------------------------------------------
void CLKRST_GenerateReset(Reset_t Domain)
{
  if (Domain==GLOBAL_RESET)
    {
    SetGroupBits16(ARM_RSTCT1_REG, ARM_RST_POS, ARM_RST_NUMB, DISABLE);
    SetGroupBits16(ARM_RSTCT1_REG, ARM_RST_POS, ARM_RST_NUMB, ENABLE);
    }

  if(Domain== MCU_RESET)
    {// MCU_RESET
    SetGroupBits16(ARM_RSTCT1_REG, ARM_RST_POS, ARM_RST_NUMB, ENABLE);
    SetGroupBits16(ARM_RSTCT1_REG, DSP_RST_POS, DSP_RST_NUMB, ENABLE);
    }

   if(Domain==DSP_RESET)
    {
      ClearBit(ARM_RSTCT1_REG,MCU_RSTCT1_MGS_EN_MASK);
    }
}