led_bootled.asm

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

;******************************************************************************
;            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
;
; Property of Texas Instruments. For Unrestricted Internal Use Only.
; Unauthorized reproduction and/or distribution is strictly prohibited.
; This product is protected under copyright law and trade secret law as
; an unpublished work.
;
; Created 2002, (C) Copyright 2002 Texas Instruments.  All rights reserved.
;
; Created	: 5th of September, 2002, 4.00pm
;
; Filename	: led_bootled.asm
;
; Description	: LED ARM926EJS assembler programs in HELEN2 project
;
; Project	: HELEN2, OMAP1610
;
; Author		: Dayo Adeyeye
;
; Note		:
;*******************************************************************************


; EXPORTED DATA/LABEL DECLARATION
        .global $INT_EndOfLoad
	.global $StartDMA_sleep
	
; IMPORTED DATA/LABEL DECLARATION
	.global $DumpStop_LED
	
	.sect ".endofld"
	.state16
;===============================================================================
; INT_EndOfLoad(UWORD32 gpio_base_addr,
;		UWORD16 execpin,
; 		UWORD16 syncpin,
; 		UWORD16 ledtimeout)
;     gpio_base_addr ------> R0
;     execpin        ------> R1
;     syncpin        ------> R2
;     ledtimeout     ------> R3
; Input  : r0 = gpio base address. 
; 	  r1 = gpio exec pin.
; 	  r2 = gpio sync pin.
; 	  r3 = Led Timeout.
; Output : None.
;===============================================================================
; DESCRIPTION : Enter in Thumb and change state to ARM 32bit state.
; Flush the TLB, I and D cache and re-enable it. Re-enable ARM MMU.
; Jump to start address in TESTSRAM, jump to execute handlers
;===============================================================================
$INT_EndOfLoad:
	mov	r5, #0
; setup gpio exec pin to 1, preserve r0 = gpio base address
	mov	r4, #0x1
	lsl	r4, r1		; set exec GPIO bit position, 0x1 << r1 (position)
	mov	r1, #0x1
	lsl	r1, r2		; set sync GPIO bit position, 0x1 << r2 (position)
	adr	r7, ChangeToARMstate
	bx	r7
	.state32
ChangeToARMstate:
	; Not now available for use r0, r1, r3, r4 & r5
	mcr	p15, #0, r5, c7, c10, #4	; Drain Dcache Write buffer, r5
tci_loop:
	mrc	p15, #0, pc, c7, c14, #3	; Test, clean Invalidate Dcache
	bne	tci_loop
	mcr	p15, #0, r5, c7, c7	; Flush & Invalidate all Icache & Dcache
	mcr	p15, #0, r5, c8, c7	; Flush & Invalidate all TLB. r5
	mcr	p15, #0, r5, c1, c0	; Disable MMU, Dcache and Icache. r5
	
	strh	r4, [r0, #0xF0]		; Set gpio exec pin to 1, Start send GPIO pulse
	
	mrc	p15, #0, r2, c1, c0	; Read the ARM MMU Co-pro control reg. r1
	orr	r2, r2, #0x1000		; Enable the Icache. r1
	orr	r2, r2, #0x7		; Enable the ARM MMU, Dcache and Alignment
	mcr	p15, #0, r2, c1, c0	; Write back enable ARM MMU value. r1
	
	strh	r4, [r0, #0xB0]		; End and Clear GPIO Data 0ut send Pulse
	mov	r7, #0x0		; Set the program start jump address 0
	
; Toggle the EXEC_PIN to generate a pulse indication end of downloads 
; Then the ARM926EJ-S polls the sync pin by reading the GPIO Interrupt status register
; Until wakeup interrupt on SyncPin with a parameterized timeout
EndOfLoad_loop:	
	ldrh	r2, [r0, #0x18]	; Test gpio Sync pin is 1, indicating tst exec str
	ldrh	r6, [r0, #0x20]	; Test gpio Sync pin is 1, indicating tst exec str
	orr	r2, r2, r6
	tst	r2, r1
	strneh	r2, [r0, #0x18]	; Clears the GPIO interrupt Status registers 1
	strneh	r6, [r0, #0x20] ; Clears the GPIO interrupt Status registers 1
	strneh	r4, [r0, #0xF0]	; Set gpio exec pin to 1, Start send GPIO pulse
	movne	pc, r7		; Jump to program start address 0 in ARM mode
	nop	; not available for user0, r1, r2, r3, r4, r5, r6, r7 
	nop
	nop
	nop
	add	r5, r5, #0x1
	cmp	r5, r3
	bne	EndOfLoad_loop
	adr	r6, ChangeToTHUMBstate + 1 ; This part will never be executed
	bx	r6
	.state16				; Change to Thumb 16bit state
ChangeToTHUMBstate:
	ldr	r0, SPY_LEDOUT			; 0xCEED
	bl	$DumpStop_LED
	mov	pc, lr				; This part should never executed
SPY_LEDOUT	.word   0xCEED


	.state16	; Thumb state and supervisor mode for code density
	.sect ".text"	; Named sections for code area
;===============================================================================
; StartDMA_sleep(gpio_base_addr, execpin)
;     gpio_base_addr ------> R0
;     execpin        ------> R1
;
; Input  : r0 = gpio base address. r1 = gpio exec pin. 
; Output : None.
;===============================================================================
; DESCRIPTION :
;===============================================================================
$StartDMA_sleep: 
	push	{r0-r7,lr}
	;; Switch to supervisor mode, stack is no longer in use while in assembler.
	swi	#0xFA         ; 0xFA : Enable INT_Swi, Supervisor mode
; setup gpio exec pin to 1
	mov	r6, #0x1
	mov	r7, r0
	lsl	r6, r1		; set GPIO bit position, 0x1 << r1 (position)
; setup enabling the DMA transfer EMIFS -> OCPT1/MPUI.
	ldr	r1, DMA_CH0_CCR_ADDR
	mov	r4, #0x80
	ldrh	r5, [r1]
	orr	r5, r4
	mov	r3, #0x0		; SBZ for ARM wait for int operation
	
	adr	r0, into_32_state
	bx	r0
	.state32
into_32_state:
	movs	r4, #0 ; <=> mov r4,#0, cmp r4,0 => condition Flag z (zero) = true
; The first time we pass here instn are not executed due to condition z which is false
set_gpio_dma_ena:
; set only gpio exec pin to 1
	strneh	r6, [r7, #0xF0]		; (executed if z = false)
; Enable the DMA transfer EMIFS -> OCPT1/MPUI.
	strneh	r5, [r1]		; (executed if z = false)
	nop
	nop			; 6 no ops to clear the address bus and pipeline
; Put ARM9 in idle
	mcrne	p15, #0, r3, c7, c0, #4	; (executed if z = false)
	nop			; 6 no ops to clear the address bus and pipeline
	nop
	add	r4, r4, #1
	cmp	r4, #2	; change condition flag z to execute the previous instr
	bne 	set_gpio_dma_ena
	nop
	strh	r6, [r7, #0xB0]	; Clear gpio exec pin to 1
	adr 	r2, into_16_state + 1
	bx	r2
	.state16
into_16_state 
; clear gpio exec pin to 0
	swi	#0xFB        ; 0xFB : Enable INT_Swi, User mode
	pop	{r0-r7,pc}
	.align 4
DMA_CH0_CCR_ADDR	.word	0xFFFED802


;; Thumb state
;; ==============================================================
	.sect ".ctedata"      ; 0x0C00FFC0 + 0x40 (64 bytes)
	.align 4
        .half   0x0010      ; arm9 code size LSB bytes	-- 1
        .half   0x0000      ; arm9 code size MSB bytes	-- 2
        .half   0x0010      ; lead3 code size LSB bytes	-- 3
        .half   0x0000      ; lead3 code size MSB bytes	-- 4
	
	;; DPLL Register (0xfffecf00): Reset = 0x2000
	;; 15: Level Shifter = 0 : Transparent mode
	;; 14: Always 0
	;; 13: Initialize On Break (Always 1)
	;; 12: 0
	;; 11-7:	5 bits PLL_mult value 0 to 31 := 21 = 10101
	;; 6-5: 2 bits PLL_Div value 0 to 3 := 1 = 01
	;; 4: PLL_ENABLE:	 0 = Bypass mode, 1 = Lock mode
	;; 3-2:	BYPASS MODE DIV 0=CLK, 1-CLK/2, 2/3=CLK/4.
	;; 1-0:	Read DPLL status only
        .half   0x2830      ; ((20.0/2) * 16) = 160 MHz	-- 5
        ;; .half   0x2AB0      ; ((19.2/2) * 21) = 201.6 MHz	-- 5
	
	;; ARM Clock Control Register (0xfffece00): Reset = 0x3000
	;; 15: Always 0
	;; 14: ARM_INTHCK_SEL: 0 = ARMCK, 1=ARMCK/2
	;; 13: EN_DSPCK: 0 = Disable, 1 = Enable
	;; 12: ARM_TIMX0:	0 = CK_REF, 1 = CKGEN1
	;; 11-10: DSPMMUDIV: 0=CKG2, 1=CKG2/2, 2=CKG2/4, 3=CKG2/8;
	;; 9-8:       TCDIV: 0=CKG3, 1=CKG3/2, 2=CKG3/4, 3=CKG3/8; 2
	;; 7-6:      DSPDIV: 0=CKG2, 1=CKG2/2, 2=CKG2/4, 3=CKG2/8; 0
	;; 5-4:      ARMDIV: 0=CKG1, 1=CKG1/2, 2=CKG1/4, 3=CKG1/8; 0
	;; 3-2:	    LCDDIV: 0=CKG3, 1=CKG2/2, 2=CKG3/4, 3=CKG3/8; 0
	;; 1-0:  ARM_PERDIV: 0=CKG1, 1=CKG1/2, 2=CKG1/4, 3=CKG1/8; 2
        .half   0x7101      ; ARM CLK Divider CONTROL	-- 6
	
	;; ARM System Register (0xfffece18): Reset = 0x0000
	;; 15-14: Always 0, Reserved
	;; 13-11: 0=Sync, 2=Sync_scal, 5=Bypass, 6=mode3, 7=mode4, 1,3,4=Reserved
	;; 11-0:	Read status
        .half   0x103F      ; CLK SYNC or BYPASS MODE	-- 7
	
	;; LDO steady bit test Bypass if not zero, Bypass == 1.....
        .half   0x0000      ; LDO_STEADY_BYPASS		-- 8
	
        .half   0x000E      ; GPIO BLK SYNC PIN INT MAP	-- 9
        .half   0x004E      ; Peripheral WAKEUP INT MAP	-- 10
	
        .half   0xE400      ; GPIO base address LSB	-- 11
        .half   0xFFFB      ; GPIO base address MSB	-- 12
	
        .half   0x000B      ; GPIO SYNC_PIN		-- 13
        .half   0x000C      ; GPIO EXEC_PIN		-- 14
        .half   0x0004      ; GPIO STATUS PIN		-- 15
	
        .half   0x0005      ; EMIFS CFG mode 5 or 7.	-- 16
	
        .half   0xFFFF      ; CTE DPLL TIMEOUT VALUE	-- 17
        .half   0xFFFF      ; CTE ULPD TIMEOUT VALUE	-- 18
        .half   0xFFFF      ; LED EXECUTE TIMEOUT COUNT	-- 19
	
        .half   0xF0F0      ; free var			-- 20
        .half   0x5A5A      ; free var			-- 21
        .half   0xF0F0      ; free var			-- 22
        .half   0x5A5A      ; free var			-- 23
        .half   0xF0F0      ; free var			-- 24
        .half   0x5A5A      ; free var			-- 25
        .half   0xF0F0      ; free var			-- 26
        .half   0x5A5A      ; free var			-- 27
        .half   0xF0F0      ; free var			-- 28
        .half   0x5A5A      ; free var			-- 29
        .half   0xF0F0      ; free var			-- 30
        .half   0x5A5A      ; free var			-- 31
        .half   0xF0F0      ; free var			-- 32

	.end			; Terminate assembly