init_flash.asm

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

;******************************************************************************
;            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION           
;                                                                             
;   Property of Texas Instruments 
;   For  Unrestricted  Internal  Use  Only
;   Unauthorized reproduction and/or distribution is strictly prohibited.  
;   This product is protected under copyright law and trade secret law 
;   as an unpublished work.	
; 
;   Created 1999, (C) Copyright 1999 Texas Instruments.  All rights reserved.
;
;
;   Filename    : init_flash_synch.asm
;
;   Description : Initialize Flash memory into synchronous read mode
;                 This code is executed from memory to initialize
;
;   Project     : Perseus
;
;   Author      : Sebastien Sabatier
; 
;******************************************************************************* 

	.state16
	.global $init_flash_synch
	
;
;     Input : r0 = address of flash memory, r1 = address of EMIF Slow CS Config Register
;
;     temporary registers:	 r2 = CPSR at beginning, r3 = cp15 register 1 at beginning, 
; 	                   r4 = RCD, r5 = value of EMIF Slow CS Config
;
;     Output : None.
;
$init_flash_synch: 
	push	{r2-r7,lr}         
        adr	r7, into_32_bis
	bx	r7
	.state32
into_32_bis
	mrs	r2, cpsr	; r2 contains copy of Current Program Status Register
	and	r7, r2, #0x1f		; keep only the mode bits
	cmp	r7, #0x13
	beq	set_flash_synch		; if supervisor mode, go to main function
	
	adr	r7, into_16_bis_tmp + 1
	bx	r7
	.state16
into_16_bis_tmp
	swi	#0xFA			; if not supervisor mode, set svc mode
	adr	r7, set_flash_synch
	bx	r7
	.state32

set_flash_synch:	
	mrc	p15,#0,r3,c1,c0		; r3 keeps value of cp15 register 1
        orr     r7, r3, #0x1000
        mcr     p15,#0,r7,c1,c0         ; Enable the I_Cache

;--     Configure flash memory in synchronous mode   
;----------------------------------------------------
	; build RCD value = r4
	mov	r4, #0
	
	; build value of Slow CS Config Register = r5
	mov	r5, #0
	
        mov	r6, #0x60
	mov	r7, #0x03
        mov	r8, #0xFF
        
        movs    r9, #0
loop    strneh  r6, [r4,r0]
        strneh  r7, [r4]
        strneh	r5, [r1] 
        strneh  r8, [r0, #2]
        
        ; Read Status Register
        movne   r10, #0x70
        strneh  r10, [r0]
        ldrneh  r11, [r0,#2]
        strneh  r8, [r0,#4]
        
        add     r9, r9, #1
        cmp     r9, #2
        BNE     loop
        

        
        cmp     r11, #0x80
stop    bne     stop
	
	mcr	p15,#0,r3,c1,c0		; restore value of cp15 register 1
	msr	cpsr, r2		; restore cpsr value

	adr	r7, into_16_bis + 1
	bx	r7
	.state16
into_16_bis   
	pop	{r2-r7,pc}     

	.end