led_boot.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//===============================================================================
//            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION 
//
//   Property of Texas Instruments, For Unrestricted Internal Use Only
//   Unauthorized reproduction and/or distribution is strictly prohibited.
//   This product is protected under copyright law and trade secret law 
//   as an unpublished work.  
//   Created 1999, (C) Copyright 1999 Texas Instruments.  All rights reserved.
//
//   Filename       	: led_boot.c
//
//   Description    	: main boot file for all LED Test execution
//
//   Project        	:
//
//   Author         	:
//
//===============================================================================
//
//
//===============================================================================

#include "led_top.h"


void led_boot_init () {
  UWORD16 DPLL_BYPASS, LDO_BYPASS, DPLLLOCK_TIMEOUT, LDOSTDY_TIMEOUT;
  UWORD16 i = 0;
  UWORD16 j = 0;

  // clock tree initialization
  // Set the synchronous scalable mode from fully synchronous mode
  ARM_SYSST_REG = CTE_SYNC_BYPASS_MODE;

  // Set clock divider: ARM=DSP=LCD run at DPLL1 freq, TC=PERI runs at DPLL/2.
  // Disable the DSP_CK activation during reset, ARM inth run at ARM/2 clk.
  ARM_CKCTL_REG = CTE_ARM_CLK_CONTROL;

  // LDO_STEADY bit 6 of POWER_CTRL_REG (@=0xFFFE0850) register in the ULPD.
  LDO_BYPASS = CTE_LDO_STDY_BYPASS;
  if  (LDO_BYPASS == 0x0) {
    LDOSTDY_TIMEOUT = CTE_ULPD_TIMEOUT_VALUE;
    while((!(REG16(0xFFFE0850) & 0x40)) && (i < LDOSTDY_TIMEOUT)) {
      i++;
    }
    // Spy dump if LDO_STEADY times out
    if (i >= LDOSTDY_TIMEOUT) {
      DumpStop_LED(LED_RES_LDO_TIMEOUT);
    }
  }

  // Disable DPLL first if already enabled
  ClearBitIndex(CLKRST_DPLLCTL1_REG, 4);

  // Sets DPLL ratio, enable DPLL, with 384 clk cycles timeout
  CLKRST_DPLLCTL1_REG = CTE_DPLL1_BYPASS_VALUE;


  // Sets DPLL_ON or DPLL_OFF
  DPLL_BYPASS = CTE_DPLL1_BYPASS_VALUE;

  if  ((DPLL_BYPASS & 0x0010) != 0x0) {
    DPLLLOCK_TIMEOUT = CTE_DPLL_TIMEOUT_VALUE;
    do {
      j++;
    }
    while((!(CLKRST_DPLLCTL1_REG & 0x1)) && (j < DPLLLOCK_TIMEOUT));

  // Spy dump if dpll times out
    if (j >= DPLLLOCK_TIMEOUT) {
      // switch off the dpll
      CLKRST_DPLLCTL1_REG = 0x2000;
      DumpStop_LED(LED_RES_DPLL_TIMEOUT);
    }
  }

  // Clears the flag register for both private and public RHEA aborts
  // This a work around to fixed illegal 32bit accesses to 16bit RHEA registers
  LDO_BYPASS = REG16(0xFFFECA1C);
  DPLL_BYPASS = REG16(0xFFFED31C);
   
  // Set the location address of the result area values into the class Result
  // and then Set the automatic index to the first position
  RES_SetLocationLED(0x05000000);

  // The spy result location size is fixed at 256 bytes.
  // The spy location initialization value is 0xBABE
  RES_INIT_Result_LED();
}