dma.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

            (DMA_TransferWidth_t)MemoryRheaWidth, /* used only with rhea port */
            DMA_SOURCE_ADDRESS_MODE_INCREMENT,
            DMA_DESTINATION_ADDRESS_MODE_CONSTANT,
            AutoInitToggle,
            DMA_SYNCHRONISED, /* Transfer initiated by hard peripheral request */
            DMA_CHANNEL_DISABLE,   /* Enable Bit */
            DMA_ENABLE_TIMEOUT_BUSERROR_IT,
            DMA_ENABLE_BLOCK_TRANSFER_IT,
            HalfBlockIE, /* Enable or not the Half block Interrupt */
            DMA_ENABLE_DROP_IT); /* Idem for drop IT */

  
}


/*
---------------------------------------------------------------------------
               DMA_ConfigureRheaToSdram                                   -
---------------------------------------------------------------------------
*/void DMA_ConfigureRheaToSdram
       (const DMA_ChannelId_t          ChannelId,
        const DMA_Priority_t           Priority,
        const UWORD16                  SrceRheaAddr,
        const RHEA_Strobe0ChipSelect_t SrceRheaChipSelect,
        const UWORD32                  DestinationAddress,
        const UWORD16                  TransferLength,
	const RHEA_Access_Size_t       MemoryRheaWidth,
        const DMA_Autoinit_t           AutoInitToggle,
        const DMA_HalfBlockTrIE_t      HalfBlockIE)
{ 
 DMA_SetBlockCount(ChannelId, TransferLength);

 DMA_SetRheaSourceAddress(ChannelId, SrceRheaAddr, SrceRheaChipSelect);
 DMA_SetDestAddress(ChannelId, DMA_SDRAM_DESTINATION_PORT, DestinationAddress);


 DMA_SetControlReg
           (ChannelId,
            Priority,
            DMA_RHEA_SOURCE_PORT,
            DMA_SDRAM_DESTINATION_PORT,
            (DMA_TransferWidth_t)MemoryRheaWidth, /* used only with rhea port */
            DMA_SOURCE_ADDRESS_MODE_CONSTANT, /* Rhea source uses fifo */
            DMA_DESTINATION_ADDRESS_MODE_INCREMENT, /* Emif address mode */
            AutoInitToggle,
            DMA_SYNCHRONISED, /* Transfer initiated by a hard request from rhea peripheral */
            DMA_CHANNEL_DISABLE,   /* Enable Bit */
            DMA_ENABLE_TIMEOUT_BUSERROR_IT,
            DMA_ENABLE_BLOCK_TRANSFER_IT,
            HalfBlockIE, /* Enable or not the Half block Interrupt */
            DMA_ENABLE_DROP_IT); /* Idem for drop IT */
 
}

/*
---------------------------------------------------------------------------
               DMA_ConfigureRheaToEmif                                    -
---------------------------------------------------------------------------
*/
void DMA_ConfigureRheaToEmif  (const DMA_ChannelId_t          ChannelId,
			       const DMA_Priority_t           Priority,
			       const UWORD16                  SourceRheaAddress,
			       const RHEA_Strobe0ChipSelect_t SourceRheaChipSelect,
			       const UWORD32                  DestinationAddress,
			       const UWORD16                  TransferLength,
			       const RHEA_Access_Size_t       MemoryRheaWidth,
			       const DMA_Autoinit_t           AutoInitToggle,
			       const DMA_HalfBlockTrIE_t      HalfBlockIE)

{ 
 DMA_SetBlockCount(ChannelId, TransferLength);
 DMA_SetRheaSourceAddress(ChannelId, SourceRheaAddress, SourceRheaChipSelect);
 DMA_SetDestAddress(ChannelId, DMA_EMIF_DESTINATION_PORT, DestinationAddress);

 DMA_SetControlReg
           (ChannelId,
            Priority,
            DMA_RHEA_SOURCE_PORT,
            DMA_EMIF_DESTINATION_PORT,
            (DMA_TransferWidth_t)MemoryRheaWidth, /* used only with rhea port */
            DMA_SOURCE_ADDRESS_MODE_CONSTANT, /* Rhea source uses fifo */
            DMA_DESTINATION_ADDRESS_MODE_INCREMENT, /* Emif address mode */
            AutoInitToggle,
            DMA_SYNCHRONISED, /* Transfer initiated by a hard request from rhea peripheral */
            DMA_CHANNEL_DISABLE,
            DMA_ENABLE_TIMEOUT_BUSERROR_IT,
            DMA_ENABLE_BLOCK_TRANSFER_IT,
            HalfBlockIE,
            DMA_ENABLE_DROP_IT);
  
}
/*
---------------------------------------------------------------------------
               DMA_ConfigureRheaToImif                                    -
---------------------------------------------------------------------------
*/
void DMA_ConfigureRheaToImif  (const DMA_ChannelId_t          ChannelId,
			       const DMA_Priority_t           Priority,
			       const UWORD16                  SourceRheaAddress,
			       const RHEA_Strobe0ChipSelect_t SourceRheaChipSelect,
			       const UWORD32                  DestinationAddress,
			       const UWORD16                  TransferLength,
			       const RHEA_Access_Size_t       MemoryRheaWidth,
			       const DMA_Autoinit_t           AutoInitToggle,
			       const DMA_HalfBlockTrIE_t      HalfBlockIE)

{ 
 DMA_SetBlockCount(ChannelId, TransferLength);
 DMA_SetRheaSourceAddress(ChannelId, SourceRheaAddress, SourceRheaChipSelect);
 DMA_SetDestAddress(ChannelId, DMA_LOCAL_IMIF_DESTINATION_PORT, DestinationAddress);

 DMA_SetControlReg
           (ChannelId,
            Priority,
            DMA_RHEA_SOURCE_PORT,
            DMA_LOCAL_IMIF_DESTINATION_PORT,
            (DMA_TransferWidth_t)MemoryRheaWidth, /* used only with rhea port */
            DMA_SOURCE_ADDRESS_MODE_CONSTANT, /* Rhea source uses fifo */
            DMA_DESTINATION_ADDRESS_MODE_INCREMENT, /* Emif address mode */
            AutoInitToggle,
            DMA_SYNCHRONISED, /* Transfer initiated by a hard request from rhea peripheral */
            DMA_CHANNEL_DISABLE,
            DMA_ENABLE_TIMEOUT_BUSERROR_IT,
            DMA_ENABLE_BLOCK_TRANSFER_IT,
            HalfBlockIE,
            DMA_ENABLE_DROP_IT);
  
}

/*
---------------------------------------------------------------------------
               DMA_ConfigurImifToRhea                                    -
---------------------------------------------------------------------------
*/
void DMA_ConfigureImifToRhea(const DMA_ChannelId_t          ChannelId,
			     const DMA_Priority_t           Priority,
			     const UWORD32                  SourceAddress,
			     const RHEA_Strobe0ChipSelect_t DestinationRheaChipSelect ,
			     const UWORD16                  DestinationRheaAddress,
			     const UWORD16                  TransferLength,
			     const RHEA_Access_Size_t       MemoryRheaWidth,
			     const DMA_Autoinit_t           AutoInitToggle,
			     const DMA_HalfBlockTrIE_t      HalfBlockIE)
     
{ 
  DMA_SetBlockCount(ChannelId, TransferLength);
  DMA_SetSourceAddress(ChannelId, DMA_LOCAL_IMIF_SOURCE_PORT, SourceAddress);
  DMA_SetRheaDestAddress(ChannelId, DestinationRheaAddress, DestinationRheaChipSelect);

 DMA_SetControlReg
            (ChannelId,
             Priority,
             DMA_LOCAL_IMIF_SOURCE_PORT,
             DMA_RHEA_DESTINATION_PORT,
             (DMA_TransferWidth_t)MemoryRheaWidth, /* used only with rhea port */
             DMA_SOURCE_ADDRESS_MODE_INCREMENT, /* EMIF source uses fifo */
             DMA_DESTINATION_ADDRESS_MODE_CONSTANT, /* RHEA address mode */
             AutoInitToggle,
             DMA_SYNCHRONISED, /* Transfer initiated by a hard request from rhea peripheral */
             DMA_CHANNEL_DISABLE,
             DMA_ENABLE_TIMEOUT_BUSERROR_IT,
             DMA_ENABLE_BLOCK_TRANSFER_IT,
             HalfBlockIE,
             DMA_ENABLE_DROP_IT);
  
}
/*
---------------------------------------------------------------------------
               DMA_ConfigureEmifToRhea                                    -
---------------------------------------------------------------------------
*/
void DMA_ConfigureEmifToRhea(const DMA_ChannelId_t          ChannelId,
			     const DMA_Priority_t           Priority,
			     const UWORD32                  SourceAddress,
			     const RHEA_Strobe0ChipSelect_t DestinationRheaChipSelect ,
			     const UWORD16                  DestinationRheaAddress,
			     const UWORD16                  TransferLength,
			     const RHEA_Access_Size_t       MemoryRheaWidth,
			     const DMA_Autoinit_t           AutoInitToggle,
			     const DMA_HalfBlockTrIE_t      HalfBlockIE)
     
{ 
  DMA_SetBlockCount(ChannelId, TransferLength);
  DMA_SetSourceAddress(ChannelId, DMA_EMIF_SOURCE_PORT, SourceAddress);
  DMA_SetRheaDestAddress(ChannelId, DestinationRheaAddress, DestinationRheaChipSelect);

 DMA_SetControlReg
            (ChannelId,
             Priority,
             DMA_EMIF_SOURCE_PORT,
             DMA_RHEA_DESTINATION_PORT,
             (DMA_TransferWidth_t)MemoryRheaWidth, /* used only with rhea port */
             DMA_SOURCE_ADDRESS_MODE_INCREMENT, /* EMIF source uses fifo */
             DMA_DESTINATION_ADDRESS_MODE_CONSTANT, /* RHEA address mode */
             AutoInitToggle,
             DMA_SYNCHRONISED, /* Transfer initiated by a hard request from rhea peripheral */
             DMA_CHANNEL_DISABLE,
             DMA_ENABLE_TIMEOUT_BUSERROR_IT,
             DMA_ENABLE_BLOCK_TRANSFER_IT,
             HalfBlockIE,
             DMA_ENABLE_DROP_IT);
  
}




/*
---------------------------------------------------------------------------
               DMA_SendLocalToRhea                                        -
---------------------------------------------------------------------------
*/
void DMA_SendLocalToRhea(const DMA_ChannelId_t     ChannelId,
                         const DMA_Priority_t      Priority,
                         const UWORD32             SourceAddress,
                         const UWORD16             DestRheaOffset,
                         const UWORD8              DestRheaChipSelect,
                         const UWORD16             TransferLength,
		  	 const RHEA_Access_Size_t  MemoryRheaWidth,
                         const DMA_Autoinit_t      AutoInitToggle,
                         const DMA_HalfBlockTrIE_t HalfBlockIE)
{
 DMA_SetBlockCount(ChannelId, TransferLength);
 DMA_SetSourceAddress(ChannelId, DMA_LOCAL_IMIF_SOURCE_PORT, SourceAddress);
 DMA_SetRheaDestAddress(ChannelId, DestRheaOffset, (RHEA_Strobe0ChipSelect_t)DestRheaChipSelect);

 DMA_SetControlReg
           (ChannelId,
            Priority,
            DMA_LOCAL_IMIF_SOURCE_PORT,
            DMA_RHEA_DESTINATION_PORT,
            (DMA_TransferWidth_t)MemoryRheaWidth, 
            DMA_SOURCE_ADDRESS_MODE_INCREMENT,
            DMA_DESTINATION_ADDRESS_MODE_CONSTANT, /* Rhea peripheral uses FIFO */
            AutoInitToggle,
            DMA_NOT_SYNCHRONISED, /* Transfer initiated by Enable bit */
            DMA_CHANNEL_ACTIVE, /* start transfer (soft request) from Local to Rhea */
            DMA_ENABLE_TIMEOUT_BUSERROR_IT,
            DMA_ENABLE_BLOCK_TRANSFER_IT,
            HalfBlockIE,
            DMA_ENABLE_DROP_IT);
  
}




/*
-----------------------------------------------------------------------------
               DMA_SendEmifToEmif                                           -
-----------------------------------------------------------------------------
*/

void DMA_SendEmifToEmif(const DMA_ChannelId_t     ChannelId,
                        const DMA_Priority_t      Priority,
                        const UWORD32          SourceAddress,
                        const UWORD32          DestinationAddress,
                        const UWORD16                TransferLength,
                        const DMA_Autoinit_t      AutoInitToggle,
                        const DMA_HalfBlockTrIE_t HalfBlockIE)
{
 DMA_SetBlockCount(ChannelId, TransferLength);
 DMA_SetSourceAddress(ChannelId, DMA_EMIF_SOURCE_PORT     , SourceAddress);
 DMA_SetDestAddress  (ChannelId, DMA_EMIF_DESTINATION_PORT, DestinationAddress);

 DMA_SetControlReg
           (ChannelId,
            Priority,
            DMA_EMIF_SOURCE_PORT,
            DMA_EMIF_DESTINATION_PORT,
            DMA_32BITS_TRANSFER_WIDTH, /* all access to SDRAM/EMIF/LOCAL in 32 bits */
            DMA_SOURCE_ADDRESS_MODE_INCREMENT,
            DMA_DESTINATION_ADDRESS_MODE_INCREMENT, /* address incremented by transfer */
            AutoInitToggle,
            DMA_NOT_SYNCHRONISED, /* Transfer initiated by Enable bit */
            DMA_CHANNEL_ACTIVE,
            DMA_ENABLE_TIMEOUT_BUSERROR_IT,
            DMA_ENABLE_BLOCK_TRANSFER_IT,
            HalfBlockIE,
            DMA_ENABLE_DROP_IT);

  /* Goback to user mode after commit update of Registers */
  
}




/*
-----------------------------------------------------------------------------
               DMA_SendSdramToEmif                                          -
-----------------------------------------------------------------------------
*/
void DMA_SendSdramToEmif(const DMA_ChannelId_t     ChannelId,
                         const DMA_Priority_t      Priority,
                         const UWORD32          SourceAddress,
                         const UWORD32          DestinationAddress,
                         const UWORD16                TransferLength,
                         const DMA_Autoinit_t      AutoInitToggle,
                         const DMA_HalfBlockTrIE_t HalfBlockIE)

{
 DMA_SetBlockCount(ChannelId, TransferLength);
 DMA_SetSourceAddress(ChannelId, DMA_SDRAM_SOURCE_PORT    , SourceAddress);
 DMA_SetDestAddress  (ChannelId, DMA_EMIF_DESTINATION_PORT, DestinationAddress);

 DMA_SetControlReg
           (ChannelId,
            Priority,
            DMA_SDRAM_SOURCE_PORT,
            DMA_EMIF_DESTINATION_PORT,
            DMA_32BITS_TRANSFER_WIDTH, /* all access to SDRAM/EMIF/LOCAL in 32 bits */
            DMA_SOURCE_ADDRESS_MODE_INCREMENT,
            DMA_DESTINATION_ADDRESS_MODE_INCREMENT,
            AutoInitToggle,
            DMA_NOT_SYNCHRONISED, /* Transfer initiated by Enable bit */
            DMA_CHANNEL_ACTIVE,
            DMA_ENABLE_TIMEOUT_BUSERROR_IT,
            DMA_ENABLE_BLOCK_TRANSFER_IT,
            HalfBlockIE,
            DMA_ENABLE_DROP_IT);