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📁 OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器
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gdmatest.c:		Chptr->EventSync = DMA_FRAME_SYNCHRONIZED;//fsgdmatest.c:		Chptr->Priority = DMA_HIGH_PRIORITY;gdmatest.c:		//  Chptr->Enable = ;gdmatest.c:		Chptr->Autoinit = DMA_AUTOINIT_OFF;gdmatest.c:		Chptr->Fifofush = DMA_NO_FLUSH;gdmatest.c:		Chptr->SrcAddressMode = DMA_ADD_POSTINC;gdmatest.c:		Chptr->DestAddressMode = DMA_ADD_POSTINC;gdmatest.c:		Chptr->EltNumber = 25;gdmatest.c:		Chptr->FrameNumber = 3;gdmatest.c:		Chptr->EltIndex = 0;gdmatest.c:		Chptr->FrameIndex = 0;gdmatest.c:		Chptr->TypeSize = DMA_TYPE_8_BITS;gdmatest.c:		Chptr->SrcPack = DMA_NO_PACKING;gdmatest.c:		Chptr->DestPack = DMA_NO_PACKING;gdmatest.c:		Chptr->SrcBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->DestBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->SyncNumb = DMA_NOT_SYNC;gdmatest.c:		Chptr->EventSync = DMA_FRAME_SYNCHRONIZED;//fsgdmatest.c:		Chptr->Priority = DMA_HIGH_PRIORITY;gdmatest.c:		//  Chptr->Enable = ;gdmatest.c:		Chptr->Autoinit = DMA_AUTOINIT_OFF;gdmatest.c:		Chptr->Fifofush = DMA_NO_FLUSH;gdmatest.c:		Chptr->SrcAddressMode = DMA_ADD_SINGLE_INDEX;gdmatest.c:		Chptr->DestAddressMode = DMA_ADD_DOUBINDEX;gdmatest.c:		Chptr->EltNumber = 25;gdmatest.c:		Chptr->FrameNumber = 3;gdmatest.c:		Chptr->EltIndex = 3;gdmatest.c:		Chptr->FrameIndex = 11;gdmatest.c:		Chptr->TypeSize = DMA_TYPE_8_BITS;gdmatest.c:		Chptr->SrcPack = DMA_NO_PACKING;gdmatest.c:		Chptr->DestPack = DMA_NO_PACKING;gdmatest.c:		Chptr->SrcBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->DestBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->SyncNumb = DMA_NOT_SYNC;gdmatest.c:		Chptr->EventSync = DMA_FRAME_SYNCHRONIZED;//fsgdmatest.c:		Chptr->Priority = DMA_HIGH_PRIORITY;gdmatest.c:		//  Chptr->Enable = ;gdmatest.c:		Chptr->Autoinit = DMA_AUTOINIT_OFF;gdmatest.c:		Chptr->Fifofush = DMA_NO_FLUSH;gdmatest.c:		Chptr->SrcAddressMode = DMA_ADD_POSTINC;gdmatest.c:		Chptr->DestAddressMode = DMA_ADD_POSTINC;gdmatest.c:		Chptr->EltNumber = 25;gdmatest.c:		Chptr->FrameNumber = 3;gdmatest.c:		Chptr->EltIndex = 3;gdmatest.c:		Chptr->FrameIndex = 11;gdmatest.c:		Chptr->TypeSize = DMA_TYPE_8_BITS;gdmatest.c:		Chptr->SrcPack = DMA_NO_PACKING;gdmatest.c:		Chptr->DestPack = DMA_NO_PACKING;gdmatest.c:		Chptr->SrcBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->DestBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->SyncNumb = DMA_NOT_SYNC;gdmatest.c:		Chptr->EventSync = DMA_FRAME_SYNCHRONIZED;//fsgdmatest.c:		Chptr->Priority = DMA_HIGH_PRIORITY;gdmatest.c:		//  Chptr->Enable = ;gdmatest.c:		Chptr->Autoinit = DMA_AUTOINIT_OFF;gdmatest.c:		Chptr->Fifofush = DMA_NO_FLUSH;gdmatest.c:		Chptr->SrcAddressMode = DMA_ADD_POSTINC;gdmatest.c:		Chptr->DestAddressMode = DMA_ADD_CONSTANT;gdmatest.c:		Chptr->EltNumber = 25;gdmatest.c:		Chptr->FrameNumber = 3;gdmatest.c:		Chptr->EltIndex = 0;gdmatest.c:		Chptr->FrameIndex = 0;gdmatest.c:		Chptr->TypeSize = DMA_TYPE_8_BITS;gdmatest.c:		Chptr->SrcPack = DMA_NO_PACKING;gdmatest.c:		Chptr->DestPack = DMA_NO_PACKING;gdmatest.c:		Chptr->SrcBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->DestBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->SyncNumb = DMA_NOT_SYNC;gdmatest.c:		Chptr->EventSync = DMA_FRAME_SYNCHRONIZED;//fsgdmatest.c:		Chptr->Priority = DMA_HIGH_PRIORITY;gdmatest.c:		//  Chptr->Enable = ;gdmatest.c:		Chptr->Autoinit = DMA_AUTOINIT_OFF;gdmatest.c:		Chptr->Fifofush = DMA_NO_FLUSH;gdmatest.c:		Chptr->SrcAddressMode = DMA_ADD_CONSTANT;gdmatest.c:		Chptr->DestAddressMode = DMA_ADD_POSTINC;gdmatest.c:		Chptr->EltNumber = 25;gdmatest.c:		Chptr->FrameNumber = 3;gdmatest.c:		Chptr->EltIndex = 0;gdmatest.c:		Chptr->FrameIndex = 0;gdmatest.c:		Chptr->TypeSize = DMA_TYPE_8_BITS;gdmatest.c:		Chptr->SrcPack = DMA_NO_PACKING;gdmatest.c:		Chptr->DestPack = DMA_NO_PACKING;gdmatest.c:		Chptr->SrcBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->DestBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->SyncNumb = DMA_NOT_SYNC;gdmatest.c:		Chptr->EventSync = DMA_FRAME_SYNCHRONIZED;//fsgdmatest.c:		Chptr->Priority = DMA_HIGH_PRIORITY;gdmatest.c:		//  Chptr->Enable = ;gdmatest.c:		Chptr->Autoinit = DMA_AUTOINIT_OFF;gdmatest.c:		Chptr->Fifofush = DMA_NO_FLUSH;gdmatest.c:		Chptr->SrcAddressMode = DMA_ADD_SINGLE_INDEX;gdmatest.c:		Chptr->DestAddressMode = DMA_ADD_SINGLE_INDEX;gdmatest.c:		Chptr->EltNumber = 25;gdmatest.c:		Chptr->FrameNumber = 3;gdmatest.c:		Chptr->EltIndex = 2;gdmatest.c:		Chptr->FrameIndex = 0;gdmatest.c:		Chptr->TypeSize = DMA_TYPE_8_BITS;gdmatest.c:		Chptr->SrcPack = DMA_NO_PACKING;gdmatest.c:		Chptr->DestPack = DMA_NO_PACKING;gdmatest.c:		Chptr->SrcBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->DestBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->SyncNumb = DMA_SYNC_1;gdmatest.c:		Chptr->EventSync = DMA_FRAME_SYNCHRONIZED;//fsgdmatest.c:		Chptr->Priority = DMA_HIGH_PRIORITY;gdmatest.c:		//  Chptr->Enable = ;gdmatest.c:		Chptr->Autoinit = DMA_AUTOINIT_OFF;gdmatest.c:		Chptr->Fifofush = DMA_NO_FLUSH;gdmatest.c:		Chptr->SrcAddressMode = DMA_ADD_POSTINC;gdmatest.c:		Chptr->DestAddressMode = DMA_ADD_POSTINC;gdmatest.c:		Chptr->EltNumber = 25;gdmatest.c:		Chptr->FrameNumber = 3;gdmatest.c:		Chptr->EltIndex = 0;gdmatest.c:		Chptr->FrameIndex = 0;gdmatest.c:		Chptr->TypeSize = DMA_TYPE_8_BITS;gdmatest.c:		Chptr->SrcPack = DMA_NO_PACKING;gdmatest.c:		Chptr->DestPack = DMA_PACKING;gdmatest.c:		Chptr->SrcBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->DestBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->SyncNumb = DMA_NOT_SYNC;gdmatest.c:		Chptr->EventSync = DMA_FRAME_SYNCHRONIZED;//fsgdmatest.c:		Chptr->Priority = DMA_HIGH_PRIORITY;gdmatest.c:		//  Chptr->Enable = ;gdmatest.c:		Chptr->Autoinit = DMA_AUTOINIT_OFF;gdmatest.c:		Chptr->Fifofush = DMA_NO_FLUSH;gdmatest.c:		Chptr->SrcAddressMode = DMA_ADD_POSTINC;gdmatest.c:		Chptr->DestAddressMode = DMA_ADD_POSTINC;gdmatest.c:		Chptr->EltNumber = 26;gdmatest.c:		Chptr->FrameNumber = 3;gdmatest.c:		Chptr->EltIndex = 5;gdmatest.c:		Chptr->FrameIndex = 12;gdmatest.c:		Chptr->TypeSize = DMA_TYPE_8_BITS;gdmatest.c:		Chptr->SrcPack = DMA_NO_PACKING;gdmatest.c:		Chptr->DestPack = DMA_PACKING;gdmatest.c:		Chptr->SrcBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->DestBurst = DMA_SINGLE_BURST;gdmatest.c:		Chptr->SyncNumb = DMA_NOT_SYNC;gdmatest.c:		Chptr->EventSync = DMA_FRAME_SYNCHRONIZED;//fsgdmatest.c:		Chptr->Priority = DMA_HIGH_PRIORITY;gdmatest.c:		//  Chptr->Enable = ;gdmatest.c:		Chptr->Autoinit = DMA_AUTOINIT_OFF;gdmatest.c:		Chptr->Fifofush = DMA_NO_FLUSH;gdmatest.c:		Chptr->SrcAddressMode = DMA_ADD_POSTINC;gdmatest.c:		Chptr->DestAddressMode = DMA_ADD_POSTINC;gdmatest.c:		Chptr->EltNumber = 26;gdmatest.c:		Chptr->FrameNumber = 3;gdmatest.c:		Chptr->EltIndex = 5;gdmatest.c:		Chptr->FrameIndex = 12;gdmatest.c:		Chptr->TypeSize = DMA_TYPE_8_BITS;gdmatest.c:		Chptr->SrcPack = DMA_NO_PACKING;gdmatest.c:		Chptr->DestPack = DMA_PACKING;gdmatest.c:		Chptr->SrcBurst = DMA_BURST_4;gdmatest.c:		Chptr->DestBurst = DMA_BURST_8;gdmatest.c:		Chptr->SyncNumb = DMA_NOT_SYNC;gdmatest.c:		Chptr->EventSync = DMA_FRAME_SYNCHRONIZED;//fsgdmatest.c:		Chptr->Priority = DMA_HIGH_PRIORITY;gdmatest.c:		//  Chptr->Enable = ;gdmatest.c:		Chptr->Autoinit = DMA_AUTOINIT_OFF;gdmatest.c:		Chptr->Fifofush = DMA_NO_FLUSH;gdmatest.c:		Chptr->SrcAddressMode = DMA_ADD_POSTINC;
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