rng.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//===============================================================================
//            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION          
//
//   Property of Texas Instruments 
//   For  Unrestricted  Internal  Use  Only
//   Unauthorized reproduction and/or distribution is strictly prohibited.
//   This product is protected under copyright law and trade secret law 
//   as an unpublished work. 
//   Created 2000, (C) Copyright 2000 Texas Instruments.  All rights reserved.
//
//
//===============================================================================

#include "global_types.h"
#include "rng.h"
#include "errorcodes.h"
#include "testaccess.h"

//---------------------------------------------------------------------
// NAME        : RNG_TestResetValue
//
// DESCRIPTION : Test the reset values of RNG registers
//
// PARAMETERS  : None
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//---------------------------------------------------------------------
void RNG_Test_ResetValue(void)
{
  BEGIN_RESET_MODULE();

    BEGIN_RESET_TEST(RNG_RNG_OUT,32);
    TEST_FIELD_RESET(RNG_RNG_OUT,RNG_OUT,32);
    END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_STAT,32);
    //TEST_FIELD_RESET(RNG_RNG_STAT,RESERVED,32);
    TEST_FIELD_RESET(RNG_RNG_STAT,BUSY,32);
    END_RESET_TEST();

  // RNG_CTRL register is accessible in secure mode Only
  // when device is High Security mode (DT1).
    /*BEGIN_RESET_TEST(RNG_RNG_CTRL,32);
    //TEST_FIELD_RESET(RNG_RNG_CTRL,RESERVED,32);
    TEST_FIELD_RESET(RNG_RNG_CTRL,RESET_LFSRS,32);
    TEST_FIELD_RESET(RNG_RNG_CTRL,TEST_LFSR,32);
    TEST_FIELD_RESET(RNG_RNG_CTRL,TEST_ALARM,32);
    TEST_FIELD_RESET(RNG_RNG_CTRL,SHORT_CYCLE,32);
    TEST_FIELD_RESET(RNG_RNG_CTRL,TEST_COUNTER,32);
    TEST_FIELD_RESET(RNG_RNG_CTRL,DISABLE_ALARM,32);
    TEST_FIELD_RESET(RNG_RNG_CTRL,TEST_RING2,32);
    TEST_FIELD_RESET(RNG_RNG_CTRL,TEST_RING1,32);
    TEST_FIELD_RESET(RNG_RNG_CTRL,TEST_RUN,32);
    TEST_FIELD_RESET(RNG_RNG_CTRL,TEST_MODE,32);
    TEST_FIELD_RESET(RNG_RNG_CTRL,TEST_RING_OUTPUT,32);
    END_RESET_TEST();*/

    BEGIN_RESET_TEST(RNG_RNG_ENTA,32);
    TEST_FIELD_RESET(RNG_RNG_ENTA,RNG_ENTA,32);
    END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_ENTB,32);
    //TEST_FIELD_RESET(RNG_RNG_ENTB,RESERVED,32);
    TEST_FIELD_RESET(RNG_RNG_ENTB,RNG_ENTB,32);
    END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_X0,32);
    TEST_FIELD_RESET(RNG_RNG_X0,X,32);
    END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_X1,32);
    TEST_FIELD_RESET(RNG_RNG_X1,X,32);
    END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_X2,32);
    //TEST_FIELD_RESET(RNG_RNG_X2,RESERVED,32);
    TEST_FIELD_RESET(RNG_RNG_X2,X,32);
    END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_COUNT,32);
    //TEST_FIELD_RESET(RNG_RNG_COUNT,RESERVED,32);
    TEST_FIELD_RESET(RNG_RNG_COUNT,FSM_COUNT,32);
    END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_ALARM,32);
    //TEST_FIELD_RESET(RNG_RNG_ALARM,RESERVED,32);
    //RNG_RNG_ALARM,ALARM_COUNTER of RNG_RNG_ALARM has unknown reset value;
    END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_CONFIG,32);
    //TEST_FIELD_RESET(RNG_RNG_CONFIG,RESERVED,32);
    TEST_FIELD_RESET(RNG_RNG_CONFIG,RESET_COUNT,32);
    TEST_FIELD_RESET(RNG_RNG_CONFIG,RING2_DELAY,32);
    TEST_FIELD_RESET(RNG_RNG_CONFIG,RING1_DELAY,32);
    END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_LFSR1_0,32);
    TEST_FIELD_RESET(RNG_RNG_LFSR1_0,LFSR1,32);
    END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_LFSR1_1,32);
    //TEST_FIELD_RESET(RNG_RNG_LFSR1_1,RESERVED,32);
    TEST_FIELD_RESET(RNG_RNG_LFSR1_1,LFSR1,32);
    END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_LFSR2_0,32);
    TEST_FIELD_RESET(RNG_RNG_LFSR2_0,LFSR2,32);
    END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_LFSR2_1,32);
    //TEST_FIELD_RESET(RNG_RNG_LFSR2_1,RESERVED,32);
    TEST_FIELD_RESET(RNG_RNG_LFSR2_1,LFSR2,32);
    END_RESET_TEST();

    //BEGIN_RESET_TEST(RNG_RNG_REV,32);
    //TEST_FIELD_RESET(RNG_RNG_REV,RESERVED,32);
    //RNG_RNG_REV,REV_NB of RNG_RNG_REV has unknown reset value;
    //END_RESET_TEST();

    BEGIN_RESET_TEST(RNG_RNG_MASK,32);
    //TEST_FIELD_RESET(RNG_RNG_MASK,RESERVED,32);
    TEST_FIELD_RESET(RNG_RNG_MASK,IT_EN,32);
    TEST_FIELD_RESET(RNG_RNG_MASK,SOFTRESET,32);
    TEST_FIELD_RESET(RNG_RNG_MASK,AUTOIDLE,32);
    END_RESET_TEST();

    //BEGIN_RESET_TEST(RNG_RNG_SYSSTATUS,32);
    //TEST_FIELD_RESET(RNG_RNG_SYSSTATUS,RESERVED,32);
    //RNG_RNG_SYSSTATUS,RESETDONE of RNG_RNG_SYSSTATUS has unknown reset value;
    //END_RESET_TEST();

  END_RESET_MODULE();

}

//---------------------------------------------------------------------
// NAME        : RNG_TestRegistersAccess
//
// DESCRIPTION : Test the access to RNG registers
//
// PARAMETERS  : None
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//---------------------------------------------------------------------
void RNG_TestRegistersAccess(void)
{
  BEGIN_ACCESS_MODULE();

  // RNG_CTRL register is accessible in secure mode Only
  // when device is High Security mode (DT1).
    /*BEGIN_RW_TEST(RNG_RNG_CTRL,32);
    //RNG_RNG_CTRL,RESERVED is Read Only
    RW_PREPARE_WRITE(RNG_RNG_CTRL,RESET_LFSRS,32);
    RW_PREPARE_WRITE(RNG_RNG_CTRL,TEST_LFSR,32);
    RW_PREPARE_WRITE(RNG_RNG_CTRL,TEST_ALARM,32);
    RW_PREPARE_WRITE(RNG_RNG_CTRL,SHORT_CYCLE,32);
    RW_PREPARE_WRITE(RNG_RNG_CTRL,TEST_COUNTER,32);
    RW_PREPARE_WRITE(RNG_RNG_CTRL,DISABLE_ALARM,32);
    RW_PREPARE_WRITE(RNG_RNG_CTRL,TEST_RING2,32);
    RW_PREPARE_WRITE(RNG_RNG_CTRL,TEST_RING1,32);
    RW_PREPARE_WRITE(RNG_RNG_CTRL,TEST_RUN,32);
    RW_PREPARE_WRITE(RNG_RNG_CTRL,TEST_MODE,32);
    RW_PREPARE_WRITE(RNG_RNG_CTRL,TEST_RING_OUTPUT,32);
    RW_WRITE(RNG_RNG_CTRL);
    //RNG_RNG_CTRL,RESERVED is Read Only
    RW_TEST_READ(RNG_RNG_CTRL,RESET_LFSRS,32);
    RW_TEST_READ(RNG_RNG_CTRL,TEST_LFSR,32);
    RW_TEST_READ(RNG_RNG_CTRL,TEST_ALARM,32);
    RW_TEST_READ(RNG_RNG_CTRL,SHORT_CYCLE,32);
    RW_TEST_READ(RNG_RNG_CTRL,TEST_COUNTER,32);
    RW_TEST_READ(RNG_RNG_CTRL,DISABLE_ALARM,32);
    RW_TEST_READ(RNG_RNG_CTRL,TEST_RING2,32);
    RW_TEST_READ(RNG_RNG_CTRL,TEST_RING1,32);
    RW_TEST_READ(RNG_RNG_CTRL,TEST_RUN,32);
    RW_TEST_READ(RNG_RNG_CTRL,TEST_MODE,32);
    RW_TEST_READ(RNG_RNG_CTRL,TEST_RING_OUTPUT,32);
    RW_WRITE_PREVIOUS_VALUE(RNG_RNG_CTRL);
    END_RW_TEST();*/

    // ENTA, ENTB and COUNT regisers reading always return 0
    /*BEGIN_RW_TEST(RNG_RNG_ENTA,32);
    RW_PREPARE_WRITE(RNG_RNG_ENTA,RNG_ENTA,32);
    RW_WRITE(RNG_RNG_ENTA);
    RW_TEST_READ(RNG_RNG_ENTA,RNG_ENTA,32);
    RW_WRITE_PREVIOUS_VALUE(RNG_RNG_ENTA);
    END_RW_TEST();

    BEGIN_RW_TEST(RNG_RNG_ENTB,32);
    //RNG_RNG_ENTB,RESERVED is Read Only
    RW_PREPARE_WRITE(RNG_RNG_ENTB,RNG_ENTB,32);
    RW_WRITE(RNG_RNG_ENTB);
    //RNG_RNG_ENTB,RESERVED is Read Only
    RW_TEST_READ(RNG_RNG_ENTB,RNG_ENTB,32);
    RW_WRITE_PREVIOUS_VALUE(RNG_RNG_ENTB);
    END_RW_TEST();

    BEGIN_RW_TEST(RNG_RNG_COUNT,32);
    //RNG_RNG_COUNT,RESERVED is Read Only
    RW_PREPARE_WRITE(RNG_RNG_COUNT,FSM_COUNT,32);
    RW_WRITE(RNG_RNG_COUNT);
    //RNG_RNG_COUNT,RESERVED is Read Only
    RW_TEST_READ(RNG_RNG_COUNT,FSM_COUNT,32);
    RW_WRITE_PREVIOUS_VALUE(RNG_RNG_COUNT);
    END_RW_TEST();*/

    BEGIN_RW_TEST(RNG_RNG_CONFIG,32);
    //RNG_RNG_CONFIG,RESERVED is Read Only
    RW_PREPARE_WRITE(RNG_RNG_CONFIG,RESET_COUNT,32);
    RW_PREPARE_WRITE(RNG_RNG_CONFIG,RING2_DELAY,32);
    RW_PREPARE_WRITE(RNG_RNG_CONFIG,RING1_DELAY,32);
    RW_WRITE(RNG_RNG_CONFIG);
    //RNG_RNG_CONFIG,RESERVED is Read Only
    RW_TEST_READ(RNG_RNG_CONFIG,RESET_COUNT,32);
    RW_TEST_READ(RNG_RNG_CONFIG,RING2_DELAY,32);
    RW_TEST_READ(RNG_RNG_CONFIG,RING1_DELAY,32);
    RW_WRITE_PREVIOUS_VALUE(RNG_RNG_CONFIG);
    END_RW_TEST();

    BEGIN_RW_TEST(RNG_RNG_MASK,32);
    //RNG_RNG_MASK,RESERVED is Read Only
    RW_PREPARE_WRITE(RNG_RNG_MASK,IT_EN,32);
    //RW_PREPARE_WRITE(RNG_RNG_MASK,SOFTRESET,32);
    RW_PREPARE_WRITE(RNG_RNG_MASK,AUTOIDLE,32);
    RW_WRITE(RNG_RNG_MASK);
    //RNG_RNG_MASK,RESERVED is Read Only
    RW_TEST_READ(RNG_RNG_MASK,IT_EN,32);
    //RW_TEST_READ(RNG_RNG_MASK,SOFTRESET,32);
    RW_TEST_READ(RNG_RNG_MASK,AUTOIDLE,32);
    RW_WRITE_PREVIOUS_VALUE(RNG_RNG_MASK);
    END_RW_TEST();

  END_ACCESS_MODULE();

}