rx_chain_test.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//=====================================================================  
//       TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION             
// Property of Texas Instruments -- For Unrestricted Internal Use Only   
// Unauthorized reproduction and/or distribution is strictly prohibited  
// This product is protected under copyright law and trade secret law as 
// an unpublished work.Created 2001,(C) Copyright 2001 Texas Instruments.
// All rights reserved.                                                  
//=====================================================================  

#include "rx_chain_test.h"

static UWORD16* dump_file_ptr = NULL;

//  dump_file_ptr = (UWORD16*)(0x08000000);
//------------------------------------------------------------
// RX Chain test init function (required at beginning of all RX Chain tests)
//------------------------------------------------------------
void RXCH_TestRxInit(void)
{
  // Configure Basestation frame sync pin (CK_SYNC_BTS) for 
  // frame sync mode instead of default GPIO mode
  DCONF_SD = DCONF_MODE_2;

  // Configure RX_CLK_I pin on Dolomites (TSPACT_2/OMAPIO_3) to RX_CLK_I mode
  // This also configures the RX_CLK to be driven from external source (disables loopback from TX_CLK)
  DCONF_TSPACT2 = DCONF_MODE_1;

  // Release reset to peripherals (including modem)
  CLKRST_TogglePeripheralResetPin(ENABLE);

  // Enable all peripheral clocks (including modem)
  CLKRST_SetPeripheralClockEnable(ALL_CK,ENABLE);
  
  // Enable 13 MHz Clock
  ULPD13M_SetAllClockDomains(); 

  // Initialize & enable the WCDMA_MCUINT0 interrupt on level 2A interrupt handler to 
  // generate an IRQ on level2 so that level1 generates an IRQ to the ARM.
  INTH2AB_InitLevel2(WCDMA_MCUINT0_INT, INTH_IRQ, INTH_HIGHEST_PRIORITY, INTH_FALLING_EDGE_SENSITIVE, 
                                        INTH_IRQ, INTH_HIGHEST_PRIORITY, INTH_FALLING_EDGE_SENSITIVE);
  INTH2AB_EnableOneItLevel2(WCDMA_MCUINT0_INT,INTH_IRQ);

  // Setup CKS module (clocks and resets to WCDMA modules)
  WCDMA_CksSetupRXChainTest();

  // Configure OMAP GPIO pins
  // Set the control to the ARM
  GPIO_SET_ALL_BIT_OWNER(0xFFFF);

  // Set bits 10 and 11 as output and the others as input
  GPIO_SET_DATA_DIR(0xF3FF);  
  
  // Write '0' on ARMIO_10 to make sure I/Q Generator Stub is disabled (not needed since default upon reset is disabled)
  // GPIO_DATA_ALL_OUT_BIT(0x0000);
}


void RXCH_IqGenRciFifoInit(void)
{
     // Arm GCC reset line
  WCDMA_ScArmGccReset();

  // Write '1' on ARMIO_10 to start I/Q Generator Stub
  GPIO_DATA_ALL_OUT_BIT(0x0400);

  // Wait for GCC reset (and I/Q data generation)
  WCDMA_ScWaitGccReset();

  // Reset fifo ptr's in RCI to setup I/Q Data
  WCDMA_RciSetupIq();

}

void RXCH_DumpSetLocation(const UWORD32 start_address)
{
  dump_file_ptr = (UWORD16*)(start_address);
}



void RXCH_DumpSet(const UWORD16 data)
{

   *(dump_file_ptr) = data;
   dump_file_ptr++;
}