📄 swap.asm
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;******************************************************************************
; TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
;
; Property of Texas Instruments
; For Unrestricted Internal Use Only
; Unauthorized reproduction and/or distribution is strictly prohibited.
; This product is protected under copyright law and trade secret law
; as an unpublished work.
;
; Created 1999, (C) Copyright 1999 Texas Instruments. All rights reserved.
;
;
; Filename : swap.asm
;
; Description : Swap two memory addresses test
; atomic write/read which must not be interrupted by DSP
;
; Limits : To validate, use the wave signal
; Difficult to make the DSP accessing while the ARM is swapping
;
; Project : Satustar
;
; Author : freygagn@tif.ti.com Francois Reygagne.
;
;*******************************************************************************
.state16 ; thumb mode
.ref edata ;defined by armas
.global $swap
OK .equ 0x0001
BAD .equ 0x0002
;--------------------------------------------------------------
; Swap two memory addresses test -
;--------------------------------------------------------------
; Input : R0 = start address -
; Output: R0 = result (1 for OK, 2 for bad) -
;--------------------------------------------------------------
$swap:
ldr r1,addr_const1 ;R1 = address of const1
ldr r1,[r1,#0] ;R1 = 0xa1a2a3a4
str r1,[r0, #0] ;Store 0xa1a2a3a4 into the RAM
;at the start address given by R0
;[R0] = 0xa1a2a3a4
mov r1,#0 ;Set zero to R1
ldr r2,addr_const2 ;R2 = address of const2
ldr r2,[r2,#0] ;R2 = 0xb1b2b3b4
bx pc ;At Run-Time To Change to 32 bits (ARM mode)
;for swap
nop ;No Operation
.state32 ;32 bits mode assembler directive (Link Time)
swp r2, r2 ,[r0] ;Load R2 with the word addressed by R0
;and Store R2 at R0
;R2 = 0xa1a2a3aa4 and [R0] = 0xb1b2b3b4
add r3, pc, #1 ;R3=PC+1 back to Thumb mode 16 bits mode
bx r3
.state16
;----------------------------------------------------------
; CHECK THAT THE SWAP IS OK --
; 1) Test R2 is 0xa1a2a3aa4 as expected --
; 2) Test RAM 9i.e [R0] is 0xb1b2b3b4 as expected --
;----------------------------------------------------------
;Test R2 is 0xa1a2a3aa4 as expected
ldr r1,addr_const1 ;R1 = address of const1
ldr r1,[r1,#0] ;R1 = 0xa1a2a3a4
cmp r2,r1 ;Compare R1 and R2
bne its_bad ;IF R1 != R2 THEN GOTO its_bad
;Test RAM (i.e. [R0]) is 0xb1b2b3b4
ldr r1,addr_const2 ;R1 = address of const2
ldr r1,[r1,#0] ;R1 = 0xb1b2b3b4
ldr r2,[r0,#0] ;R2 = [R0] must be 0xb1b2b3b4
cmp r2,r1 ;Compare R1 and R2
bne its_bad ;IF R1 != R2 THEN GOTO its_bad
;--------------------------------------------------------------
; ITS_OK -
;--------------------------------------------------------------
; Set result R0 to 1 for OK and goto the_end -
;--------------------------------------------------------------
its_ok:
mov r0,#OK ;Fill result R0=OK=1 test is ok
b the_end
;--------------------------------------------------------------
; ITS_BAD -
;--------------------------------------------------------------
; Set result R0 to 2 for bad and goto the end -
;--------------------------------------------------------------
its_bad:
mov r0,#BAD ;Fill result R0=BAD=2 test is bad
;--------------------------------------------------------------
; THE_END -
;--------------------------------------------------------------
; Set Process Counter to Link Register to return to caller -
;--------------------------------------------------------------
the_end:
mov pc,lr ;PC=Link Register
;-------------------------------------------
; C O N S T A N T S --
;-------------------------------------------
;
addr_const1 .word const1
const1 .word 0xa1a2a3a4
addr_const2 .word const2
const2 .word 0xb1b2b3b4
.end
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