inth2.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//===============================================================================
//            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
//
//   Property of Texas Instruments
//   For  Unrestricted  Internal  Use  Only
//   Unauthorized reproduction and/or distribution is strictly prohibited.
//   This product is protected under copyright law and trade secret law
//   as an unpublished work.
//   Created 2000, (C) Copyright 1999 Texas Instruments.  All rights reserved.
//
//===============================================================================

#include  "test.h"
#include "global_types.h"
#include "result.h"
#include "test.h"
#include "intvecs.h"
#include "inth2.h"
#include "mem.h"
#include "interrupt_mapping.h"
#include "reset.h"
#include "errorcodes.h"


#define SECTION_INDEX 0x0100


//############################################################################
// NAME        : INTH2_InitLevel
//
// DESCRIPTION : Writes Level Register (Mask or Unmask interrupt)
//
// PARAMETERS  : UWORD8   ItIndex        See int_mapping.h
//
//               BOOL     Fiq_or_Irq    INTH_FIQ or INTH_IRQ
//
//               UWORD8   Priority      from 0 to 15
//
//               BOOL     SensitiveEdge FALLING_EDGE_SENSITIVE or LOW_LEVEL_SENSITIVE
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//############################################################################
void INTH2_InitLevel (UWORD8   ItIndex,
                      BOOL     Fiq_or_Irq,
                      UWORD8   Priority,
                      BOOL     SensitiveEdge)
{
  UWORD8 section, It_index_in_section;
  // Point to the  OrderedITNumber
  volatile UWORD32* PtLevelReg;

  if(ItIndex<32) { // First level interrupt handler
    PtLevelReg = (UWORD32*)INTH_IT_LEVEL_REG_SUPERVISOR_ADDR + ItIndex;
    *PtLevelReg = (  (Fiq_or_Irq    << LEV1_INTH_FIQNIRQ_POSBIT)
                   | (Priority      << LEV1_INTH_PRIORITY_POSBIT)
                   | (SensitiveEdge << LEV1_INTH_SENSITIVE_EDGE_POSBIT));
  }
  else {
    section             =  ItIndex/32 - 1;
    It_index_in_section =  ItIndex % 32;
    // Note irq is fixed
    PtLevelReg = (UWORD32*)(SECTION_INDEX*section + LEV2_INTH_IT_LEVEL_REG_SUPERVISOR_ADDR + 4*It_index_in_section);

    *PtLevelReg = (  (Fiq_or_Irq    << LEV2_INTH_FIQNIRQ_POSBIT)
                   | (Priority      << LEV2_INTH_PRIORITY_POSBIT)
                   | (SensitiveEdge << LEV2_INTH_SENSITIVE_EDGE_POSBIT));



    // init irq or fiq on interrupt handler 1 with fix level
    
    if (Fiq_or_Irq == INTH_IRQ) PtLevelReg = (UWORD32*)INTH_IT_LEVEL_REG_SUPERVISOR_ADDR + LEV2_IRQ_INT; // INTH Lev2 IRQ is configured on INTH Lev1 output IRQ
    else PtLevelReg = (UWORD32*)INTH_IT_LEVEL_REG_SUPERVISOR_ADDR + LEV2_FIQ_INT;                        // INTH Lev2 FIQ is configured on INTH Lev1 output FIQ
    
    *PtLevelReg = ((Fiq_or_Irq                 << LEV1_INTH_FIQNIRQ_POSBIT)
                   | (Priority                 << LEV1_INTH_PRIORITY_POSBIT)
                   | (INTH_LOW_LEVEL_SENSITIVE << LEV1_INTH_SENSITIVE_EDGE_POSBIT));


    }
}


//########################################################################################
// NAME        : INTH2_GetCurrentIt
//
// DESCRIPTION : Get the current It and valid the next one
//
//
// PARAMETERS  : Fiq_or_Irq:  INTH_IRQ or INTH_FIQ
//
//
// RETURN VALUE: Number of the active and acknowledged Interrupt
//
// LIMITATIONS : Must be called on Incoming IT
//########################################################################################
UWORD8 INTH2_GetCurrentIt (BOOL Fiq_or_Irq)
{
  UWORD8 ActivItIndex;
  
  if (Fiq_or_Irq == INTH_IRQ)
    ActivItIndex=(*(UWORD32 *)(LEV1_INTH_SOURCE_BIN_IRQ_REG_ADDR))&INTH_SRC_NUM_MASK;
  else// INTH_FIQ
    ActivItIndex=(*(UWORD32 *)(LEV1_INTH_SOURCE_BIN_FIQ_REG_ADDR))&INTH_SRC_NUM_MASK;
  
  //Test if the interrupt comes from the second handler
  if (ActivItIndex==LEV2_IRQ_INT) {
    ActivItIndex=(*(UWORD32 *)(LEV2_INTH_SOURCE_BIN_IRQ_REG_ADDR)) & 0x7F; //((UWORD32) INTH_SRC_NUM_MASK);
    ActivItIndex=ActivItIndex+32;
  } else if (ActivItIndex==LEV2_FIQ_INT) {
    ActivItIndex=(*(UWORD32 *)(LEV2_INTH_SOURCE_BIN_FIQ_REG_ADDR)) & 0x7F; //((UWORD32) INTH_SRC_NUM_MASK);
    ActivItIndex=ActivItIndex+32;
  }

  return(ActivItIndex);
}

//########################################################################################
// NAME        : INTH2_ValidNextInterrupt
//
// DESCRIPTION : Valid the next IT depending on the current one
//
//
// PARAMETERS  : Fiq_or_Irq:  INTH_IRQ or INTH_FIQ
//
//
// RETURN VALUE: None
//
// LIMITATIONS : Must be called on Incoming IT
//########################################################################################
void INTH2_ValidNextInterrupt (BOOL Fiq_or_Irq)
{
UWORD16 ActivItIndex1,ActivItIndex2;

  if (Fiq_or_Irq == INTH_IRQ)
     ActivItIndex1=(*(UWORD32 *)(LEV1_INTH_SOURCE_BIN_IRQ_REG_ADDR))&INTH_SRC_NUM_MASK;
  else
     // INTH_FIQ
     ActivItIndex1=(*(UWORD32 *)(LEV1_INTH_SOURCE_BIN_FIQ_REG_ADDR))&INTH_SRC_NUM_MASK;

  //Test if the interrupt comes from the second handler
  if (ActivItIndex1==LEV2_IRQ_INT)     
    SetBitIndex(REG32(LEV2_INTH_CTRL_REG_SUPERVISOR_ADDR),INTH_IRQ); // Valid next Irq on handler2
  else if (ActivItIndex1==LEV2_FIQ_INT)     
    SetBitIndex(REG32(LEV2_INTH_CTRL_REG_SUPERVISOR_ADDR),INTH_FIQ); // Valid next Fiq on handler2

   //Valid next Irq on handler1
   SetBitIndex(REG32(LEV1_INTH_CTRL_REG_SUPERVISOR_ADDR),Fiq_or_Irq);
}


//########################################################################################
// NAME        : INTH2_ClearInt
//
// DESCRIPTION : Clear the an IT when IT is not enabled (outside of a routine)
//               Prefer use ValidNext in a routine
//
//
// PARAMETERS  : ItNumber
//
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//########################################################################################
void INTH2_ClearInt(UWORD8 ItIndex) {
  UWORD16 ActivItIndex;
  UWORD8 section, It_index_in_section;

  //Test if the interrupt comes from the second handler
  if (ItIndex>31) {
    section		=  ItIndex/32 - 1;
    It_index_in_section =  ItIndex % 32;
    //Clear the ITR register
    ClearBitIndex(REG32(SECTION_INDEX*section + LEV2_INTH_IT_REG),It_index_in_section);
  }
  else {
    //Clear the level1 ITR register
    ClearBitIndex(REG32(LEV1_INTH_IT_REG),ItIndex);
  }
}

//########################################################################################
// NAME        : INTH2_EnableOneIt
//
// DESCRIPTION : Enable one interrupt
//
// PARAMETERS  : UWORD8 ItIndex                      See int_mapping.h
//
//              Fiq_or_Irq:  INTH_IRQ or INTH_FIQ
//
// RETURN VALUE: None
//
// LIMITATIONS : Must be called on Incoming IT
//########################################################################################
void INTH2_EnableOneIt(UWORD8 ItIndex, BOOL Fiq_or_Irq)
{
  UWORD8 section, It_index_in_section;

  if(ItIndex<32)
    {
         //Clear the ITR register
    ClearBitIndex(REG32(LEV1_INTH_IT_REG),(ItIndex));
    ClearBitIndex(REG32(LEV1_INTH_MASK_IT_REG_SUPERVISOR_ADDR),ItIndex);
    }
  else
    {
    section             =  ItIndex/32 - 1;
    It_index_in_section =  ItIndex % 32;
    //Clear the ITR register
    ClearBitIndex(REG32(SECTION_INDEX*section + LEV2_INTH_IT_REG),It_index_in_section);
    ClearBitIndex(REG32(SECTION_INDEX*section + LEV2_INTH_MASK_IT_REG_SUPERVISOR_ADDR),It_index_in_section);

    // UnMask Lev 2 irq or fiq on level 1
    if (Fiq_or_Irq == INTH_IRQ) ClearBitIndex(REG32(LEV1_INTH_MASK_IT_REG_SUPERVISOR_ADDR),LEV2_IRQ_INT);
    else ClearBitIndex(REG32(LEV1_INTH_MASK_IT_REG_SUPERVISOR_ADDR),LEV2_FIQ_INT);
    
    }
}


//########################################################################################
// NAME        : INTH2_DisableOneIt
//
// DESCRIPTION : Disable one interrupt
//
// PARAMETERS  : UWORD8 ItIndex
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//########################################################################################
void INTH2_DisableOneIt(UWORD32 ItIndex)
{
  UWORD8 section, It_index_in_section;

  if(ItIndex<32)
    {
    *(UWORD32*)INTH_MASK_IT_REG_SUPERVISOR_ADDR |= (1 << ItIndex);
    }
  else
    {
    section             =  ItIndex/32 - 1;
    It_index_in_section =  ItIndex % 32;
    *(UWORD32*)(SECTION_INDEX*section + LEV2_INTH_MASK_IT_REG_SUPERVISOR_ADDR) |= (1 << It_index_in_section);
    }
}


//#####################################################################
// NAME         : INTH2_GetAndTestResetLev2Inth
//
// DESCRIPTION  : Test all the register at reset and store the result