camcregacc.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

/********************************************************************/


int CAMCCC_SYSSTATUSResetDoneIsrstComp32(const UWORD32 var)
{
    register UWORD32 data = var;                                                /* COPY from argument into data */                                              
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_SYSSTATUSResetDoneIsrstComp32);           /* Log the call to this function */                                             
    data &= CAMC_CC_SYSSTATUS_ResetDone_MASK;                                   /* Remove other bitfields. */                                                   
    data >>= CAMC_CC_SYSSTATUS_ResetDone_OFFSET;                                /* Align bitfield LSB with word LSB */                                          
    return(CAMCCC_SYSSTATUSResetDonerstComp==(CAMCCC_SYSSTATUSResetDoneE)data);
}


/********************************************************************/


UWORD32 CAMCCC_IRQSTATUSReadRegister32(const UWORD32 baseAddress)
{
    const UWORD32 offset = CAMC_CC_IRQSTATUS_OFFSET;                            /* Register offset from the Base Address */                                     
    register UWORD32 data = RD_MEM_32_VOLATILE(baseAddress+offset);             /* Read the register */                                                         
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_IRQSTATUSReadRegister32);                 /* Log the call to this function */                                             
    return(data);
}


/********************************************************************/


void CAMCCC_IRQSTATUSWriteRegister32(const UWORD32 baseAddress, const UWORD32 value)
{
    const UWORD32 offset = CAMC_CC_IRQSTATUS_OFFSET;                            /* Register offset from the Base Address */                                     
    register UWORD32 newValue = value;                                          /* Copy 'value' into 'newValue' */                                              
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_IRQSTATUSWriteRegister32);                /* Log the call to this function */                                             
    WR_MEM_32_VOLATILE(baseAddress+offset, newValue);                           /* Write value back to the register */                                          
}


/********************************************************************/


UWORD32 CAMCCC_IRQSTATUSFS_IRQRead32(const UWORD32 baseAddress)
{
    const UWORD32 offset = CAMC_CC_IRQSTATUS_OFFSET;                            /* Register offset from the Base Address */                                     
    register UWORD32 data = RD_MEM_32_VOLATILE(baseAddress+offset);             /* Read the register */                                                         
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_IRQSTATUSFS_IRQRead32);                   /* Log the call to this function */                                             
    data &= CAMC_CC_IRQSTATUS_FS_IRQ_MASK;                                      /* Mask off other bitfields. */                                                 
    data >>= CAMC_CC_IRQSTATUS_FS_IRQ_OFFSET;                                   /* Shift bitfield to align LSB with word LSB */                                 
    return(data);
}


/********************************************************************/


int CAMCCC_IRQSTATUSFS_IRQReadIsfase_r32(const UWORD32 baseAddress)
{
    const UWORD32 offset = CAMC_CC_IRQSTATUS_OFFSET;                            /* Register offset from the Base Address */                                     
    register UWORD32 data = RD_MEM_32_VOLATILE(baseAddress+offset);             /* Read the register */                                                         
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_IRQSTATUSFS_IRQReadIsfase_r32);           /* Log the call to this function */                                             
    data &= CAMC_CC_IRQSTATUS_FS_IRQ_MASK;                                      /* Mask off other bitfields. */                                                 
    data >>= CAMC_CC_IRQSTATUS_FS_IRQ_OFFSET;                                   /* Shift bitfield to align LSB with word LSB */                                 
    return(CAMCCC_IRQSTATUSFS_IRQfase_r==(CAMCCC_IRQSTATUSFS_IRQE)data);
}


/********************************************************************/


int CAMCCC_IRQSTATUSFS_IRQReadIstrue_r32(const UWORD32 baseAddress)
{
    const UWORD32 offset = CAMC_CC_IRQSTATUS_OFFSET;                            /* Register offset from the Base Address */                                     
    register UWORD32 data = RD_MEM_32_VOLATILE(baseAddress+offset);             /* Read the register */                                                         
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_IRQSTATUSFS_IRQReadIstrue_r32);           /* Log the call to this function */                                             
    data &= CAMC_CC_IRQSTATUS_FS_IRQ_MASK;                                      /* Mask off other bitfields. */                                                 
    data >>= CAMC_CC_IRQSTATUS_FS_IRQ_OFFSET;                                   /* Shift bitfield to align LSB with word LSB */                                 
    return(CAMCCC_IRQSTATUSFS_IRQtrue_r==(CAMCCC_IRQSTATUSFS_IRQE)data);
}


/********************************************************************/


UWORD32 CAMCCC_IRQSTATUSFS_IRQGet32(const UWORD32 var)
{
    register UWORD32 data = var;                                                /* COPY from argument into data */                                              
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_IRQSTATUSFS_IRQGet32);                    /* Log the call to this function */                                             
    data &= CAMC_CC_IRQSTATUS_FS_IRQ_MASK;                                      /* Mask off other bitfields. */                                                 
    data >>= CAMC_CC_IRQSTATUS_FS_IRQ_OFFSET;                                   /* Shift bitfield to align LSB with word LSB */                                 
    return((UWORD32)data);
}


/********************************************************************/


int CAMCCC_IRQSTATUSFS_IRQIsfase_r32(const UWORD32 var)
{
    register UWORD32 data = var;                                                /* COPY from argument into data */                                              
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_IRQSTATUSFS_IRQIsfase_r32);               /* Log the call to this function */                                             
    data &= CAMC_CC_IRQSTATUS_FS_IRQ_MASK;                                      /* Remove other bitfields. */                                                   
    data >>= CAMC_CC_IRQSTATUS_FS_IRQ_OFFSET;                                   /* Align bitfield LSB with word LSB */                                          
    return(CAMCCC_IRQSTATUSFS_IRQfase_r==(CAMCCC_IRQSTATUSFS_IRQE)data);
}


/********************************************************************/


int CAMCCC_IRQSTATUSFS_IRQIstrue_r32(const UWORD32 var)
{
    register UWORD32 data = var;                                                /* COPY from argument into data */                                              
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_IRQSTATUSFS_IRQIstrue_r32);               /* Log the call to this function */                                             
    data &= CAMC_CC_IRQSTATUS_FS_IRQ_MASK;                                      /* Remove other bitfields. */                                                   
    data >>= CAMC_CC_IRQSTATUS_FS_IRQ_OFFSET;                                   /* Align bitfield LSB with word LSB */                                          
    return(CAMCCC_IRQSTATUSFS_IRQtrue_r==(CAMCCC_IRQSTATUSFS_IRQE)data);
}


/********************************************************************/


void CAMCCC_IRQSTATUSFS_IRQWrite32(const UWORD32 baseAddress, const UWORD32 value)
{
    const UWORD32 offset = CAMC_CC_IRQSTATUS_OFFSET;                            /* Register offset from the Base Address */                                     
    register UWORD32 newValue = value;                                          /* Copy 'value' into 'newValue' */                                              
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_IRQSTATUSFS_IRQWrite32);                  /* Log the call to this function */                                             
    newValue <<= CAMC_CC_IRQSTATUS_FS_IRQ_OFFSET;                               /* Shift new value into position */                                             
    newValue &= CAMC_CC_IRQSTATUS_FS_IRQ_MASK;                                  /* Remove other bitfield data which may be present */                           
    WR_MEM_32_VOLATILE(baseAddress+offset, newValue);                           /* Write value back to the register */                                          
}


/********************************************************************/


void CAMCCC_IRQSTATUSFS_IRQWritestatUc_w32(const UWORD32 baseAddress)
{
    const UWORD32 offset = CAMC_CC_IRQSTATUS_OFFSET;                            /* Register offset from the Base Address */                                     
    const UWORD32 newValue = (UWORD32)CAMCCC_IRQSTATUSFS_IRQstatUc_w <<
                               CAMC_CC_IRQSTATUS_FS_IRQ_OFFSET;                                                                                                 
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_IRQSTATUSFS_IRQWritestatUc_w32);          /* Log the call to this function */                                             
    WR_MEM_32_VOLATILE(baseAddress+offset, newValue);                           /* Write value back to the register */                                          
}


/********************************************************************/


void CAMCCC_IRQSTATUSFS_IRQWritestatrst_w32(const UWORD32 baseAddress)
{
    const UWORD32 offset = CAMC_CC_IRQSTATUS_OFFSET;                            /* Register offset from the Base Address */                                     
    const UWORD32 newValue = (UWORD32)CAMCCC_IRQSTATUSFS_IRQstatrst_w <<
                               CAMC_CC_IRQSTATUS_FS_IRQ_OFFSET;                                                                                                 
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_IRQSTATUSFS_IRQWritestatrst_w32);         /* Log the call to this function */                                             
    WR_MEM_32_VOLATILE(baseAddress+offset, newValue);                           /* Write value back to the register */                                          
}


/********************************************************************/


UWORD32 CAMCCC_IRQSTATUSFS_IRQSet32(const UWORD32 var, const UWORD32 value)
{
    register UWORD32 data = var;                                                /* Copy from argument into data */                                              
    register UWORD32 newValue = value;                                          /* Copy 'value' into 'newValue' */                                              
    _DEBUG_LEVEL_1_EASI(EASIL1_CAMCCC_IRQSTATUSFS_IRQSet32);                    /* Log the call to this function */                                             
    data &= ~(CAMC_CC_IRQSTATUS_FS_IRQ_MASK);                                   /* Clear existing bitfield value */                                             
    newValue <<= CAMC_CC_IRQSTATUS_FS_IRQ_OFFSET;                               /* Shift new value into position */                                             
    newValue &= CAMC_CC_IRQSTATUS_FS_IRQ_MASK;                                  /* Remove other bitfield data which may be present */                           
    newValue |= data;                                                           /* Or-in new bitfield data */                                                   
    return((UWORD32)newValue);                                                                                                                                  
}


/********************************************************************/


UWORD32 CAMCCC_IRQSTATUSLE_IRQRead32(const UWORD32 baseAddress)
{
    const UWORD32 offset = CAMC_CC_IRQSTATUS_OFFSET;