triton_pm.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//########################################################################################
void PM_Freeze_SEQ_Stable(void)
{
  UWORD8 SEQ_CFG_MODE;
  MSI2C_AccessPage(PMC_MASTER_page);  //Page 1  
  SEQ_CFG_MODE = MSI2C_MasterPollingReceiveAbb(PMC_MASTER_SEQ_CFG_MODE);
  MSI2C_MasterPollingSendAbb(PMC_MASTER_SEQ_CFG_MODE, SEQ_CFG_MODE | SEQ_FREEZE);
  // Check State Stable
  while ( (MSI2C_MasterPollingReceiveAbb(PMC_MASTER_SEQ_CFG_MODE) & STS_P123_STATE_STABLE) != STS_P123_STATE_STABLE );
}

//########################################################################################
// NAME        : PM_UnFreeze_SEQ
//
// DESCRIPTION : UnFreeze transitions on P1/2/3
//
// PARAMETERS  : None
//
//
//
// RETURN VALUE: None
//
// LIMITATIONS : You must enable PKEY before
//########################################################################################
void PM_UnFreeze_SEQ(void)
{
  UWORD8 SEQ_CFG_MODE;
  MSI2C_AccessPage(PMC_MASTER_page);  //Page 1  
  SEQ_CFG_MODE = MSI2C_MasterPollingReceiveAbb(PMC_MASTER_SEQ_CFG_MODE);
  MSI2C_MasterPollingSendAbb(PMC_MASTER_SEQ_CFG_MODE, SEQ_CFG_MODE & ~(SEQ_FREEZE));
}

//########################################################################################
// NAME        : PM_Assign_DEVGRP_P1
//
// DESCRIPTION : SW assign Ressource in DEV_GRP P1
//
// PARAMETERS  : Address of Target Ressource Cfg_Reg
//
//
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//########################################################################################
void PM_Assign_DEVGRP_P1(UWORD8 PMC_SLAVE_RESSOURCE_CFG_STS)
{
  MSI2C_AccessPage(PMC_SLAVE_page);  //Page 1  
  MSI2C_MasterPollingSendAbb(PMC_SLAVE_RESSOURCE_CFG_STS,DEV_GRP_MODEM);
}

//########################################################################################
// NAME        : PM_Active_P1_LDO_SW
//
// DESCRIPTION : SW active LDO SW Ressource in DEV_GRP P1
//
// PARAMETERS  :
//
//
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//########################################################################################
void PM_Active_P1_LDO_SW(void)
{
  MSI2C_AccessPage(PMC_MASTER_page);  //Page 1
  MSI2C_MasterPollingSendAbb(PMC_MASTER_PB_CFG_I2C,0x01);  //enable PB via I2C + length 16bits
  MSI2C_MasterPollingSendAbb(PMC_MASTER_PB_I2C_WORD_C,0x33); // DevG MT ResG ResTy  State
  MSI2C_MasterPollingSendAbb(PMC_MASTER_PB_I2C_WORD_D,0x0F); //  001 1  001  10000  1111
}

//########################################################################################
// NAME        : PM_Check_Active_P1_LDO_SW
//
// DESCRIPTION : SW check activation of LDO SW Ressource in DEV_GRP P1
//
// PARAMETERS  : 
//
//
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//########################################################################################
void PM_Check_Active_P1_LDO_SW(void)
{
  MSI2C_AccessPage(PMC_SLAVE_page);  //Page 1  
  if(  MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VRSIM_CFG_STS) ==  (DEV_GRP_MODEM | STS_ACTIVE) )
          RES_Set(0x8000);
  else 
          RES_Set(0xDD01);
  if(  MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VRMMC_CFG_STS) ==  (DEV_GRP_MODEM | STS_ACTIVE) )
          RES_Set(0x8000);
  else 
          RES_Set(0xDD02);
  if(  MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VRUSB_CFG_STS) ==  (DEV_GRP_MODEM | STS_ACTIVE) )
          RES_Set(0x8000);
  else 
          RES_Set(0xDD03);
  if(  MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VRVBUS_CFG_STS) ==  (DEV_GRP_MODEM | STS_ACTIVE) )
          RES_Set(0x8000);
  else 
          RES_Set(0xDD04);
}

//########################################################################################
// NAME        : PM_Check_Active_LDO_SW
//
// DESCRIPTION : SW check activation of LDO SW Ressource
//
// PARAMETERS  : 
//
//
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//########################################################################################
void PM_Check_Active_LDO_SW(void)
{
  MSI2C_AccessPage(PMC_SLAVE_page);  //Page 1  
  if(  (MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VRSIM_CFG_STS) & STS_ACTIVE) ==  STS_ACTIVE )
          RES_Set(0x8000);
  else 
          RES_Set(0xDD01);
  if(  (MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VRMMC_CFG_STS) & STS_ACTIVE) == STS_ACTIVE )
          RES_Set(0x8000);
  else 
          RES_Set(0xDD02);
  if(  (MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VRUSB_CFG_STS) & STS_ACTIVE) == STS_ACTIVE )
          RES_Set(0x8000);
  else 
          RES_Set(0xDD03);
  if(  (MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VRVBUS_CFG_STS) & STS_ACTIVE) == STS_ACTIVE )
          RES_Set(0x8000);
  else 
          RES_Set(0xDD04);
}

//########################################################################################
// NAME        : PM_Check_Sleep_LDO_SW
//
// DESCRIPTION : SW check  LDO SW Ressource sleep
//
// PARAMETERS  : 
//
//
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//########################################################################################
void PM_Check_Sleep_LDO_SW(void)
{
  MSI2C_AccessPage(PMC_SLAVE_page);  //Page 1  
  if(  (MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VRSIM_CFG_STS) & STS_ACTIVE) ==  STS_SLEEP )
          RES_Set(0x8000);
  else 
          RES_Set(0xDD01);
  if(  (MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VRMMC_CFG_STS) & STS_ACTIVE) == STS_SLEEP )
          RES_Set(0x8000);
  else 
          RES_Set(0xDD02);
  if(  (MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VRUSB_CFG_STS) & STS_ACTIVE) == STS_SLEEP )
          RES_Set(0x8000);
  else 
          RES_Set(0xDD03);
  if(  (MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VRVBUS_CFG_STS) & STS_ACTIVE) == STS_SLEEP )
          RES_Set(0x8000);
  else 
          RES_Set(0xDD04);
}

//########################################################################################
// NAME        : PM_Conf_For_Vmod
//
// DESCRIPTION : put Triton in VMODE mode, and configure corresponding registers
//
// PARAMETERS  : UWORD8 vroof_level, UWORD8 vfloor_level, UWORD8 VRDBB_change_time
//
//
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//########################################################################################
void PM_Conf_For_Vmod(UWORD8 vroof_level, UWORD8 vfloor_level, UWORD8 VRDBB_change_time)
{
  UWORD8 vcore_cfg_vfloor_value = ( vfloor_level & VFLOOR_LEVEL_MASK);// configure vfloor level

  MSI2C_AccessPage(PMC_SLAVE_page); // set page number of triton memory for PMC_SLAVE use

  MSI2C_MasterPollingSendAbb(PMC_SLAVE_VCORE_CFG_ROOF,vroof_level);  // configure vroof level

  //MSI2C_MasterPollingSendAbb(PMC_SLAVE_VCORE_CFG_FLOOR,0x1011);
  MSI2C_MasterPollingSendAbb(PMC_SLAVE_VCORE_CFG_FLOOR, vcore_cfg_vfloor_value);  // configure vfloor level

  MSI2C_MasterPollingSendAbb(PMC_SLAVE_VCORE_CFG_VMODE,( VMODE_ENABLE_MASK | (VRDBB_change_time & VMODE_STEP_NUMBER_MASK) )); //VRDBB Voltage controlled by VMODE pin and time between each voltage step (when VRDBB voltage changes between VROOF and VFLOOR values) set to VRDBB_change_time

}


//########################################################################################
// NAME        : PM_VRDBB_voltage_controled_by_software
//
// DESCRIPTION : VRDBB voltage is controlled by software through VRDBB_VSEL register 
//               set output voltage via VRDBB_VSEL
//
// PARAMETERS  : UWORD8 VRDBB_voltage_output_value
//
//
//
// RETURN VALUE: None
//
// LIMITATIONS : None
//########################################################################################
void PM_VRDBB_voltage_controled_by_software(UWORD8 VRDBB_voltage_output_value)
{
  MSI2C_AccessPage(PMC_SLAVE_page); // set page number of triton memory for PMC_SLAVE use

  MSI2C_MasterPollingSendAbb(PMC_SLAVE_VCORE_CFG_VSEL, ( (VRDBB_voltage_output_value & VRDBB_VSEL_MASK) | 0x60 ) ); //set output voltage via VRDBB_VSEL
  
  MSI2C_MasterPollingSendAbb(PMC_SLAVE_VCORE_CFG_VMODE, 0x00); // VRDBB voltage is controlled by software through VRDBB_VSEL register

}

//########################################################################################
// NAME        : PM_VRDDB_To_VFLOOR_Status
//
// DESCRIPTION : 
//
// PARAMETERS  : 
//
//
//
// RETURN VALUE: UWORD8
//
// LIMITATIONS : None
//########################################################################################
UWORD8 PM_VRDDB_To_VFLOOR_Status(void)
{
  MSI2C_AccessPage(PMC_SLAVE_page); // set page number of triton memory for PMC_SLAVE use
    if( ( MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VCORE_CFG_FLOOR) & STS_FLOOR_MASK  ) ==  STS_FLOOR_MASK  )
      return VFLOOR_LEVEL_REACHED;
    else 
      return VFLOOR_LEVEL_NOT_REACHED;      
}

//########################################################################################
// NAME        : PM_VRDDB_To_VROOF_Status
//
// DESCRIPTION : 
//
// PARAMETERS  : 
//
//
//
// RETURN VALUE: UWORD8
//
// LIMITATIONS : None
//########################################################################################
UWORD8 PM_VRDDB_To_VROOF_Status(void)
{
  MSI2C_AccessPage(PMC_SLAVE_page); // set page number of triton memory for PMC_SLAVE use
    if( ( MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VCORE_CFG_ROOF)& STS_ROOF_MASK ) ==  STS_ROOF_MASK )
      return VROOF_LEVEL_REACHED;
    else 
      return VROOF_LEVEL_NOT_REACHED;      
}


//########################################################################################
// NAME        : PM_VRDDB_To_VFLOOR_Wait
//
// DESCRIPTION : 
//
// PARAMETERS  : 
//
//
//
// RETURN VALUE: UWORD8
//
// LIMITATIONS : None
//########################################################################################
UWORD8 PM_VRDDB_To_VFLOOR_Wait(void)
{
  UWORD8 wait;
  wait =0;
  MSI2C_AccessPage(PMC_SLAVE_page); // set page number of triton memory for PMC_SLAVE use

  while( ( ( MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VCORE_CFG_FLOOR) & STS_FLOOR_MASK  ) !=  STS_FLOOR_MASK  ) && (wait++ < 10000));
  if ( wait != 10000 ) 
    return VFLOOR_LEVEL_REACHED;
  else 
    return VFLOOR_LEVEL_NOT_REACHED;      
}

//########################################################################################
// NAME        : PM_VRDDB_To_VROOF_Wait
//
// DESCRIPTION : 
//
// PARAMETERS  : 
//
//
//
// RETURN VALUE: UWORD8
//
// LIMITATIONS : None
//########################################################################################
UWORD8 PM_VRDDB_To_VROOF_Wait(void)
{
  UWORD8 wait;
  wait =0;
  MSI2C_AccessPage(PMC_SLAVE_page); // set page number of triton memory for PMC_SLAVE use

  while( ( ( MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VCORE_CFG_ROOF) & STS_ROOF_MASK  ) !=  STS_ROOF_MASK  ) && (wait++ < 10000));
  if ( wait != 10000 ) 
    return VROOF_LEVEL_REACHED;
  else 
    return VROOF_LEVEL_NOT_REACHED;      
}


//########################################################################################
// NAME        : PM_VRDBB_Applied_Voltage_Read
//
// DESCRIPTION : 
//
// PARAMETERS  : 
//
//
//
// RETURN VALUE: UWORD8
//
// LIMITATIONS : None
//########################################################################################
UWORD8 PM_VRDBB_Applied_Voltage_Read(void)
{
  MSI2C_AccessPage(PMC_SLAVE_page); // set page number of triton memory for PMC_SLAVE use
  return  ( MSI2C_MasterPollingReceiveAbb(PMC_SLAVE_VCORE_CFG_VSEL) & VRDBB_VSEL_MASK  );   
}