mcbsp3.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//===============================================================================
//            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION           
//                                                                             
//   Property of Texas Instruments 
//   For  Unrestricted  Internal  Use  Only 
//   Unauthorized reproduction and/or distribution is strictly prohibited.  
//   This product is protected under copyright law and trade secret law 
//   as an unpublished work.  
//   Created 1999, (C) Copyright 1999 Texas Instruments.  All rights reserved.
//
//
//   Filename       	: mcbsp.c
//
//   Description    	: Header of the library driving the GPIOs
//
//   Project        	: HELEN
//
//   Author         	: Jean-Louis Masseau for Perseus
//   Modified by     : Jean-Philippe Ulpiano for Helen
//
//===============================================================================

#include "mcbsp3.h"



//---------------------------------------------------------------------------
// NAME        : MCBSP3_SetPinControlRegister
// DESCRIPTION : Configure McBSP Interface pin to the dedicated configuration
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void  MCBSP3_SetPinControlRegister(MCBSP3_ClkPol_t RXClkPol,
                                  MCBSP3_ClkPol_t TXClkPol,
                                  MCBSP3_FSActive_t RXFSActive,
                                  MCBSP3_FSActive_t TXFSActive,
                                  MCBSP3_ClockMode_t RXClockMode,
                                  MCBSP3_ClockMode_t TXClockMode,
                                  MCBSP3_FSSync_t RXFSSync,
                                  MCBSP3_FSSync_t TXFSSync,
                                  MCBSP3_GPIOInput_t RXPin,
                                  MCBSP3_GPIOInput_t TXPin)
{
// Read the Pin Control Register
UWORD16 value = REG16(MCBSP3_PCR_REG);

// Clear all bits
value = 0;

// Set all bits
value |= RXClkPol << (CLKRP - CLKRP_SZ + 1);
value |= TXClkPol << (CLKXP - CLKXP_SZ + 1);
value |= RXFSActive << (FSRP - FSRP_SZ + 1);
value |= TXFSActive << (FSXP - FSXP_SZ + 1);
value |= RXClockMode << (CLKRM - CLKRM_SZ + 1);
value |= TXClockMode << (CLKXM - CLKXM_SZ + 1);
value |= RXFSSync << (FSRM - FSRM_SZ + 1);
value |= TXFSSync << (FSXM - FSXM_SZ + 1);
value |= RXPin << (RIOEN - RIOEN_SZ + 1);
value |= TXPin << (XIOEN - XIOEN_SZ + 1);

// Write the Pin Control Register
REG16(MCBSP3_PCR_REG) = value;
}


//---------------------------------------------------------------------------
// NAME        : MCBSP3_SetRX1ControlRegister
// DESCRIPTION : Configure the Receive Control Register 1
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void  MCBSP3_SetRX1ControlRegister(MCBSP3_WordLength_t RXWordLength,
                                  MCBSP3_FrameLength_t RXFrameLength)
{
// Read the Receive Control Register 1
UWORD16 value = REG16(MCBSP3_RCR1_REG);

// Clear all bits
value = 0;

// Set all bits
value |= RXWordLength << (RWDLEN1 - RWDLEN1_SZ + 1);
value |= RXFrameLength << (RFRLEN1 - RFRLEN1_SZ + 1);

// Write the Receive Control Register 1
REG16(MCBSP3_RCR1_REG) = value;
}


//---------------------------------------------------------------------------
// NAME        : MCBSP3_SetRX2ControlRegister
// DESCRIPTION : Configure the Receive Control Register 2
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void  MCBSP3_SetRX2ControlRegister(MCBSP3_DataDelay_t RXDataDelay,
                                  MCBSP3_FrameIgnore_t RXFrameIgnore,
                                  MCBSP3_Companding_t RXCompanding,
                                  MCBSP3_WordLength_t RXWordLength,
                                  MCBSP3_FrameLength_t RXFrameLength,
                                  MCBSP3_Phase_t RXPhase)
{
// Read the Receive Control Register 2
UWORD16 value = REG16(MCBSP3_RCR2_REG);

// Clear all bits
value = 0;

// Set all bits
value |= RXDataDelay << (RDATDLY - RDATDLY_SZ + 1);
value |= RXFrameIgnore << (RFIG - RFIG_SZ + 1);
value |= RXCompanding << (RCOMPAND - RCOMPAND_SZ + 1);
value |= RXWordLength << (RWDLEN2 - RWDLEN2_SZ + 1);
value |= RXFrameLength << (RFRLEN2 - RFRLEN2_SZ + 1);
value |= RXPhase << (RPHASE - RPHASE_SZ + 1);

// Write the Receive Control Register 2
REG16(MCBSP3_RCR2_REG) = value;
}


//---------------------------------------------------------------------------
// NAME        : MCBSP3_SetTX1ControlRegister
// DESCRIPTION : Configure the Transmit Control Register 1
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void  MCBSP3_SetTX1ControlRegister(MCBSP3_WordLength_t TXWordLength,
                                  MCBSP3_FrameLength_t TXFrameLength)
{
// Read the Transmit Control Register 1
UWORD16 value = REG16(MCBSP3_XCR1_REG);

// Clear all bits
value = 0;

// Set all bits
value |= TXWordLength << (XWDLEN1 - XWDLEN1_SZ + 1);
value |= TXFrameLength << (XFRLEN1 - XFRLEN1_SZ + 1);

// Write the Transmit Control Register 1
REG16(MCBSP3_XCR1_REG) = value;
}


//---------------------------------------------------------------------------
// NAME        : MCBSP3_SetTX2ControlRegister
// DESCRIPTION : Configure the Transmit Control Register 2
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void  MCBSP3_SetTX2ControlRegister(MCBSP3_DataDelay_t TXDataDelay,
                                  MCBSP3_FrameIgnore_t TXFrameIgnore,
                                  MCBSP3_Companding_t TXCompanding,
                                  MCBSP3_WordLength_t TXWordLength,
                                  MCBSP3_FrameLength_t TXFrameLength,
                                  MCBSP3_Phase_t TXPhase)
{
// Read the Transmit Control Register 2
UWORD16 value = REG16(MCBSP3_XCR2_REG);

// Clear all bits
value = 0;

// Set all bits
value |= TXDataDelay << (XDATDLY - XDATDLY_SZ + 1);
value |= TXFrameIgnore << (XFIG - XFIG_SZ + 1);
value |= TXCompanding << (XCOMPAND - XCOMPAND_SZ + 1);
value |= TXWordLength << (XWDLEN2 - XWDLEN2_SZ + 1);
value |= TXFrameLength << (XFRLEN2 - XFRLEN2_SZ + 1);
value |= TXPhase << (XPHASE - XPHASE_SZ + 1);

// Write the Transmit Control Register 2
REG16(MCBSP3_XCR2_REG) = value;
}


//---------------------------------------------------------------------------
// NAME        : MCBSP3_SetSampleRegister1
// DESCRIPTION : Configure the Sample Rate Generator Configuration Register 1
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void  MCBSP3_SetSampleRegister1(MCBSP3_ClockDivider_t ClockDivider,
                               MCBSP3_FrameWidth_t FrameWidth)
{
// Read the Sample Rate Generator Configuration Register 1
UWORD16 value = REG16(MCBSP3_SRGR1_REG);

// Clear all bits
value = 0;

// Set all bits
value |= ClockDivider << (CLKGDV - CLKGDV_SZ + 1);
value |= FrameWidth << (FWID - FWID_SZ + 1);

// Write the Sample Rate Generator Configuration Register 1
REG16(MCBSP3_SRGR1_REG) = value;
}


//---------------------------------------------------------------------------
// NAME        : MCBSP3_SetSampleRegister2
// DESCRIPTION : Configure the Sample Rate Generator Configuration Register 2
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void  MCBSP3_SetSampleRegister2(MCBSP3_FramePeriod_t FramePeriod,
                               MCBSP3_FSMode_t FSMode,
                               MCBSP3_SampleMode_t SampleMode,
                               MCBSP3_CLKSPol_t CLKSPol,
                               MCBSP3_SampleSync_t SampleSync)
{
// Read the Sample Rate Generator Configuration Register 2
UWORD16 value = REG16(MCBSP3_SRGR2_REG);

// Clear all bits
value = 0;

// Set all bits
value |= FramePeriod << (FPER - FPER_SZ + 1);
value |= FSMode << (FSGM - FSGM_SZ + 1);
value |= SampleMode << (CLKSM - CLKSM_SZ + 1);
value |= CLKSPol << (CLKSP - CLKSP_SZ + 1);
value |= SampleSync << (GSYNC - GSYNC_SZ + 1);

// Write the Sample Rate Generator Configuration Register 2
REG16(MCBSP3_SRGR2_REG) = value;
}


//---------------------------------------------------------------------------
// NAME        : MCBSP3_EnableRX
// DESCRIPTION : Configure the Serial Port Control Register 1 to reset and enable the receiver
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void  MCBSP3_EnableRX(void)
{
// Read the Serial Port Control Register 1
UWORD16 value = REG16(MCBSP3_SPCR1_REG);

// Clear RRST bit
value &= ~(RRST_MASK << (RRST - RRST_SZ + 1));

// Set bit RRST
value |= MCBSP3_Enable << (RRST - RRST_SZ + 1);

// Write the Serial Port Control Register 1
REG16(MCBSP3_SPCR1_REG) = value;
}


//---------------------------------------------------------------------------
// NAME        : MCBSP3_EnableTX
// DESCRIPTION : Configure the Serial Port Control Register 2 to reset and enable the transmitter
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void  MCBSP3_EnableTX(void)
{
// Read the Serial Port Control Register 2
UWORD16 value = REG16(MCBSP3_SPCR2_REG);

// Clear XRST bit
value &= ~(XRST_MASK << (XRST - XRST_SZ + 1));

// Set bit RRST
value |= MCBSP3_Enable << (XRST - XRST_SZ + 1);

// Write the Serial Port Control Register 2
REG16(MCBSP3_SPCR2_REG) = value;
}


//---------------------------------------------------------------------------
// NAME        : MCBSP3_ReadData
// DESCRIPTION : Read Received Data from Data Receive Register 2 and 1
// RETURN VALUE: Data read
// LIMITATIONS : None
//---------------------------------------------------------------------------
UWORD16 MCBSP3_ReadData(MCBSP3_DataRegister_t DataRegister)
{
UWORD16 value;

  switch (DataRegister)
  {
    case MCBSP3_DRR2:
      // Read the Data Receive Register 2
      value = REG16(MCBSP3_DRR2_REG);
      break;
    case MCBSP3_DRR1:
      // Read the Data Receive Register 1
      value = REG16(MCBSP3_DRR1_REG);
      break;
    default :
      break;
  }
  return (value);
}


//---------------------------------------------------------------------------
// NAME        : MCBSP3_WriteData
// DESCRIPTION : Write Data to transmit in Data Transmit Register 2 and 1
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void MCBSP3_WriteData(MCBSP3_DataRegister_t DataRegister, UWORD16 Data)
{
UWORD16 value;

  switch (DataRegister)
  {
    case MCBSP3_DXR2:
      // Write the Data Transmit Register 2
      REG16(MCBSP3_DXR2_REG) = Data;
      break;
    case MCBSP3_DXR1:
      // Write the Data Transmit Register 1
      REG16(MCBSP3_DXR1_REG) = Data;
      break;
    default :
      break;
  }
}

//---------------------------------------------------------------------------
// NAME        : MCBSP_EnableSpiMode
// DESCRIPTION : Configure the Serial Port Control Register 1 to reset and enable the receiver
// RETURN VALUE: None
// LIMITATIONS : None
//---------------------------------------------------------------------------
void  MCBSP3_EnableSpiMode(MCBSP3_CLKSTP_t Clock_Stop_Mode)
{
// Read the Serial Port Control Register 1
UWORD16 value = REG16(MCBSP3_SPCR1_REG);

// Set bit RRST
value |= Clock_Stop_Mode << (CLKSTP - CLKSTP_SZ + 1);

// Write the Serial Port Control Register 1
REG16(MCBSP3_SPCR1_REG) = value;
}