digrf_if.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//===============================================================================
//            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
//
//   Property of Texas Instruments
//   For  Unrestricted  Internal  Use  Only
//   Unauthorized reproduction and/or distribution is strictly prohibited.
//   This product is protected under copyright law and trade secret law
//   as an unpublished work.
//   Created 1999, (C) Copyright 2000 Texas Instruments.  All rights reserved.
//
//   Filename       	: digrf_if.c
//
//   Description    	: Functions for digital RF interface module
//
//   Project        	: Neptune
//
//   Author         	: [e-mail]
//
//==================================================================================

#include "result.h"
#include "reset.h"
#include "mapping.h"
#include "digrf_if.h"


inline UWORD32 DRFI_ReadDigRfIfRev(void)
{
  return DIGRF_IF_REV_32;
}


inline UWORD32 DRFI_ReadDigRfIfScr(void)
{
  return DIGRF_IF_SCR_32;
}

inline void DRFI_WriteDigRfIfScr(UWORD32 value)
{
  DIGRF_IF_SCR_32 = value;
}


inline UWORD32 DRFI_ReadDigRfIfSsr(void)
{
  return DIGRF_IF_SSR_32;
}


inline UWORD32 DRFI_ReadDigRfIfIsr(void)
{
  return DIGRF_IF_ISR_32;
}

inline void DRFI_WriteDigRfIfIsr(UWORD32 value)
{
  DIGRF_IF_ISR_32 = value;
}


inline UWORD32 DRFI_ReadDigRfIfIer(void)
{
  return DIGRF_IF_IER_32;
}


inline void DRFI_WriteDigRfIfIer(UWORD32 value)
{
  DIGRF_IF_IER_32 = value;
}


inline UWORD32 DRFI_ReadDigRfIfSet1(void)
{
  return DIGRF_IF_SET1_32;
}

inline void DRFI_WriteDigRfIfSet1(UWORD32 value)
{
  DIGRF_IF_SET1_32 = value;
}


inline UWORD32 DRFI_ReadDigRfIfSet2(void)
{
  return DIGRF_IF_SET2_32;
}

inline void DRFI_WriteDigRfIfSet2(UWORD32 value)
{
  DIGRF_IF_SET2_32 = value;
}


inline UWORD32 DRFI_ReadDigRfIfCtrl1(void)
{
  return DIGRF_IF_CTRL1_32;
}

inline void DRFI_WriteDigRfIfCtrl1(UWORD32 value)
{
  DIGRF_IF_CTRL1_32 = value;
}


inline UWORD32 DRFI_ReadDigRfIfCtrl2(void)
{
  return DIGRF_IF_CTRL2_32;
}

inline void DRFI_WriteDigRfIfCtrl2(UWORD32 value)
{
  DIGRF_IF_CTRL2_32 = value;
}


inline void DRFI_WriteDigRfIfCtrl2Fields(UWORD16 ActWords, UWORD16 Words, UWORD16 NbBits)
{
  DIGRF_IF_CTRL2_32 = (UWORD32) ((UWORD32) (ActWords & 0x00FF) << 24) | (UWORD32) ((UWORD32) (Words & 0x0FFF) << 12) | (UWORD32) ((UWORD32) NbBits & 0x0FFF);
}


inline UWORD32 DRFI_ReadDigRfIfTx(void)
{
  return DIGRF_IF_TX_32;
}

inline void DRFI_WriteDigRfIfTx(UWORD32 value)
{
  DIGRF_IF_TX_32 = value;
}


inline UWORD32 DRFI_ReadDigRfIfRx(void)
{
  return DIGRF_IF_RX_32;
}

inline void DRFI_WriteDigRfIfRx(UWORD32 value)
{
  DIGRF_IF_RX_32 = value;
}


inline void DRFI_DoSoftReset(void)
{
  DIGRF_IF_SCR_32 |= 2;
}


inline void DRFI_SetAutoIdle(void)
{
  DIGRF_IF_SCR_32 |= DIGRF_IF_AUTOIDLE;
}


inline void DRFI_ResetAutoIdle(void)
{
  DIGRF_IF_SCR_32 &= ~DIGRF_IF_AUTOIDLE;
}


inline void DRFI_ReleaseAllIt(void)
{
  DIGRF_IF_ISR_32 = DIGRF_IF_ALL_IT_MASK;
}


inline void DRFI_ReleaseEndTxIt(void)
{
  DIGRF_IF_ISR_32 |= DIGRF_IF_END_TX;
}


inline void DRFI_ReleaseTxUdfIt(void)
{
  DIGRF_IF_ISR_32 |= DIGRF_IF_TX_UDF;
}


inline void DRFI_ReleaseRxOvfIt(void)
{
  DIGRF_IF_ISR_32 |= DIGRF_IF_RX_OVF;
}


inline void DRFI_ReleaseTxEmptyIt(void)
{
  DIGRF_IF_ISR_32 |= DIGRF_IF_TX_EMPTY;
}


inline void DRFI_ReleaseRxFullIt(void)
{
  DIGRF_IF_ISR_32 |= DIGRF_IF_RX_FULL;
}


inline void DRFI_EnableEndTxIt(void)
{
  DIGRF_IF_IER_32 |= DIGRF_IF_END_TX;
}


inline void DRFI_EnableTxUdfIt(void)
{
  DIGRF_IF_IER_32 |= DIGRF_IF_TX_UDF;
}


inline void DRFI_EnableRxOvfIt(void)
{
  DIGRF_IF_IER_32 |= DIGRF_IF_RX_OVF;
}


inline void DRFI_EnableTxEmptyIt(void)
{
  DIGRF_IF_IER_32 |= DIGRF_IF_TX_EMPTY;
}


inline void DRFI_EnableRxFullIt(void)
{
  DIGRF_IF_IER_32 |= DIGRF_IF_RX_FULL;
}


inline void DRFI_EnableAllIt(void)
{
  DIGRF_IF_IER_32 = DIGRF_IF_ALL_IT_MASK;
}


inline void DRFI_DisableEndTxIt(void)
{
  DIGRF_IF_IER_32 &= ~DIGRF_IF_END_TX;
}


inline void DRFI_DisableTxUdfIt(void)
{
  DIGRF_IF_IER_32 &= ~DIGRF_IF_TX_UDF;
}


inline void DRFI_DisableRxOvfIt(void)
{
  DIGRF_IF_IER_32 &= ~DIGRF_IF_RX_OVF;
}


inline void DRFI_DisableTxEmptyIt(void)
{
  DIGRF_IF_IER_32 &= ~DIGRF_IF_TX_EMPTY;
}


inline void DRFI_DisableRxFullIt(void)
{
  DIGRF_IF_IER_32 &= ~DIGRF_IF_RX_FULL;
}



inline void DRFI_DisableAllIt(void)
{
  DIGRF_IF_IER_32 = 0;
}


inline void DRFI_EnableClk(void)
{
  DIGRF_IF_SET1_32 |= DIGRF_IF_EN_CLK_ON;
}


inline void DRFI_DmaEnable(void)
{
  DIGRF_IF_SET1_32 |= (DIGRF_IF_DMA_EN_DMA << 1);
}


inline void DRFI_Slave(void)
{
  DIGRF_IF_SET1_32 |= (DIGRF_IF_SLAVE << 2);
}


inline void DRFI_Master(void)
{
  DIGRF_IF_SET1_32 &= ~(DIGRF_IF_SLAVE << 2);
}


inline void DRFI_DisableClk(void)
{
  DIGRF_IF_SET1_32 &= ~DIGRF_IF_EN_CLK_ON;
}


inline void DRFI_DmaDisable(void)
{
  DIGRF_IF_SET1_32 &= ~(DIGRF_IF_DMA_EN_DMA << 1);
}


inline void DRFI_EnableLvlReset(void)
{
  DIGRF_IF_SET2_32 &= ~DIGRF_IF_EN_LVL_ACT_HIGH;
}


inline void DRFI_TxEnableOnRisingEdge(void)
{
  DIGRF_IF_SET2_32 &= ~(DIGRF_IF_TX_EN_EDGE_FALLING << 1);
}


inline void DRFI_TxDataOnRisingEdge(void)
{
  DIGRF_IF_SET2_32 &= ~(DIGRF_IF_TX_DATA_EDGE_FALLING << 2);
}


inline void DRFI_RxDataOnRisingEdge(void)
{
  DIGRF_IF_SET2_32 &= ~(DIGRF_IF_RX_DATA_EDGE_FALLING << 3);
}


inline void DRFI_EnableLvlSet(void)
{
  DIGRF_IF_SET2_32 |= DIGRF_IF_EN_LVL_ACT_HIGH;
}


inline void DRFI_TxEnableOnFallingEdge(void)
{
  DIGRF_IF_SET2_32 |= (DIGRF_IF_TX_EN_EDGE_FALLING << 1);
}


inline void DRFI_TxDataOnFallingEdge(void)
{
  DIGRF_IF_SET2_32 |= (DIGRF_IF_TX_DATA_EDGE_FALLING << 2);
}


inline void DRFI_RxDataOnFallingEdge(void)
{
  DIGRF_IF_SET2_32 |= (DIGRF_IF_RX_DATA_EDGE_FALLING << 3);
}


inline void DRFI_StartTx(void)
{
  DIGRF_IF_CTRL1_32 |= DIGRF_IF_START_TX;
}


inline void DRFI_EnableRx(void)
{
  DIGRF_IF_CTRL1_32 |= (DIGRF_IF_RCV_EN << 1);
}


inline void DRFI_DisableRx(void)
{
  DIGRF_IF_CTRL1_32 &= ~(DIGRF_IF_RCV_EN << 1);
}

inline void DRFI_PerformReset(void)
{
  DIGRF_IF_SCR_32 |= 2;
  while(DRFI_ReadDigRfIfSsr() == 0);
}