flashaccess.asm

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

;******************************************************************************
;            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION           
;                                                                             
;   Property of Texas Instruments 
;   For  Unrestricted  Internal  Use  Only
;   Unauthorized reproduction and/or distribution is strictly prohibited.  
;   This product is protected under copyright law and trade secret law 
;   as an unpublished work.	
; 
;   Created 1999, (C) Copyright 1999 Texas Instruments.  All rights reserved.
;
;
;   Filename     : TestFlashPair.asm
;
;   Description : Test of flashpair access by word  half word and word 
;                 (no byte inversion)
;
;   Project     : arm925st
;
;   Author      : Daniel BLANC
; 
;******************************************************************************* 
       	.state16		; thumb mode

	.ref	edata		;defined by armas
	.global $ReadFlashPairRegister
	.global $WriteFlashPairRegister
	.global $ReadFlashRegister
	.global $WriteFlashRegister
	.global $WriteFlash
	.global $ReadFlash
	.global $WriteFlashPair
	.global $ReadFlashPair
 	.global $Read4wordFlashPair
 	.global $SwitchIntelFlash2burstmode
 	.global $SwitchIntelFlash2burstmodeCS
 	.global $SwitchIntelFlash2burst
	.ref    etext

;;======================================================== 
;; 
;; ReadFlashPairRegister(  AddCycle1, DataCycle1, AddCycle2)
;; 
;;      AddCycle1  ------> R0
;;      DataCycle1 ------> R1
;;      AddCycle2  ------> R2
;; 
;;      return value in R0 -----> Value of the register 
;; 
;;======================================================== 
$ReadFlashPairRegister:		; 
	push	{r4,lr}
	str	r1, [r0]	;  write the flash command contained in r1
	ldr    r4, [r2]        ;  read the flash value and put it in r2
	mov	r0,r4
	pop 	{r4,pc}		; Return to caller

;;======================================================== 
;; 
;; ReadFlashRegister(  AddCycle1, DataCycle1, AddCycle2)
;; 
;;      AddCycle1  ------> R0
;;      DataCycle1 ------> R1
;;      AddCycle2  ------> R2
;; 
;;      return value in R0 -----> Value of the register 
;; 
;;======================================================== 
$ReadFlashRegister:		; 
	push	{r4,lr}
	strh	r1, [r0]	;  write the flash command contained in r1
	ldrh    r4, [r2]        ;  read the flash value and put it in r2
	mov	r0,r4
	pop 	{r4,pc}		; Return to caller
	

;;======================================================== 
;; 
;; $WriteFlashPairRegister(  AddCycle1, DataCycle1, AddCycle2, DataCycle2)
;; 
;;      AddCycle1  ------> R0
;;      DataCycle1 ------> R1
;;      AddCycle2  ------> R2
;;      DataCycle1 ------> R3
;; 
;;======================================================== 
$WriteFlashPairRegister:
	push	{lr}
	str	r1, [r0]	;  write the flash command contained in r1 at the r0 address
	str	r3, [r2]	;  write the flash command contained in r3 at the r2 address
	pop 	{pc}		; Return to caller
	

 ;;======================================================== 
;; 
;; $WriteFlashRegister(  AddCycle1, DataCycle1, AddCycle2, DataCycle2)
;; 
;;      AddCycle1  ------> R0
;;      DataCycle1 ------> R1
;;      AddCycle2  ------> R2
;;      DataCycle1 ------> R3
;; 
;;======================================================== 
$WriteFlashRegister:
	push	{lr}
	strh	r1, [r0]	;  write the flash command contained in r1 at the r0 address
	strh	r3, [r2]	;  write the flash command contained in r3 at the r2 address
	pop 	{pc}		; Return to caller

		
;;======================================================== 
;; 
;; $WriteFlash(  AddCycle1, DataCycle1)
;; 
;;      AddCycle1  ------> R0
;;      DataCycle1 ------> R1
;; 
;;======================================================== 
$WriteFlash:
	push	{lr}
	strh	r1, [r0]	;  write the flash command contained in r1 at the r0 address
	pop 	{pc}		; Return to caller
	
      
;;======================================================== 
;; 
;; $ReadFlash(  AddCycle1)
;; 
;;      AddCycle1  ------> R0
;;     
;; 
;;======================================================== 
$ReadFlash:
	push	{r4,lr}
	ldrh    r4, [r0]        ;  read the flash value and put it in r4
	mov	r0,r4
	pop 	{r4,pc}		; Return to caller
	
      

;;======================================================== 
;; 
;; $WriteFlashPair(  AddCycle1, DataCycle1)
;; 
;;      AddCycle1  ------> R0
;;      DataCycle1 ------> R1
;; 
;;======================================================== 
$WriteFlashPair:
	push	{lr}
	str	r1, [r0]	;  write the flash command contained in r1 at the r0 address
	pop 	{pc}		; Return to caller
	
      
;;======================================================== 
;; 
;; $ReadFlash(  AddCycle1)
;; 
;;      AddCycle1  ------> R0
;;     
;; 
;;======================================================== 
$ReadFlashPair:
	push	{r4,lr}
	ldr    r4, [r0]        ;  read the flash value and put it in r4
	mov	r0,r4
	pop 	{r4,pc}		; Return to caller
	
;;======================================================== 
;; 
;; $ReadFlash(  AddCycle1)
;; 
;;      AddCycle1  ------> R0
;;     
;; 
;;======================================================== 
$Read4wordFlashPair:
	push	{r2-r5,lr}
	ldmia   r0!,{r2-r5}     ;  read 4 words in the flash at 4 consecutiv address
	stmia	r1!,{r2-r5}	;  write 4 words at the address specified by r1
	pop 	{r2-r5,pc}		; Return to caller
	

;======================================================== 
; 
; SwitchIntelFlash2burstmode(Flash_Address_Rcd, SlowCs0value)
; 
;     RCD value     ------> R0
;     SlowCs0 value ------> R1
; 
;======================================================== 
;
;  Input : r0 = address of flash memory | read config regirster definition 
;
;     Output : None.
;======================================================== 
; DESCRIPTION :
; -----------
; set supervisor mode
; validate instruction cache
; set condition ne to false
; fill the instruction cache memories with sequence to set up RCD register Flash
; because we can't fetch code from flash and in the same time setup RCD register
; set condition ne to True
; execute (from cache instruction) instructions which setup flash
; return in user mode
;======================================================== 
;
$SwitchIntelFlash2burstmode: 
	push	{r2-r7,lr}         
	adr	r7, into_32_bis_mode
	bx		r7
	.state32

;---------------------------------------------------
; set supervisor mode
;---------------------------------------------------
into_32_bis_mode
	mrs	r2, cpsr	; contains copy of Current Program Status Register
	and	r7, r2, #0x1f		; keep only the mode bits
	cmp	r7, #0x13
	beq	set_instr_cache		; if supervisor mode, go to main function
	
	adr	r7, into_16_bis_tmp_mode + 1
	bx	r7
	.state16
into_16_bis_tmp_mode
	swi	#0xFA			; if not supervisor mode, set svc mode
	adr	r7, set_instr_cache
	bx	r7
	.state32

; set instruction cache
set_instr_cache:	
	mrc	p15,#0,r3,c1,c0		; r5 keeps value of cp15 register 1
	orr   r7, r3, #0x1000
	mcr   p15,#0,r7,c1,c0      ; Enable the I_Cache


; Setup flash read configuration command and 
; configure EMIF slow CS0 config register value
;----------------------------------------------------
	ldr	r5,ADD_SLOW_CS0

	mov	r6, #0x60
	mov	r7, #0x03
	
	movs  r9, #0 ; <=> mov r9,#0, cmp r9,0 => condition Flag z (zero) = true

; The first time we pass here instruction are not executed
; due to condition z which is false

set_flash_mode:    
	strneh r6, [r0]  ; write RCD,0x60 (executed if z = false)
	strneh r7, [r0]  ; write RCD,0x03 (executed if z = false)
	strne	 r1, [r5]  ; set the emif slow cs0 register (executed if z = false)

	add 	r9, r9, #1
	cmp 	r9, #2      ; change condition flag z to execute the previous instructions
	BNE 	set_flash_mode
       
;---------------------------------------------------
;restore mode
;---------------------------------------------------
	mcr 	p15,#0,r3,c1,c0		; restore value of cp15 register 1
	msr 	cpsr, r2		; restore cpsr value

	adr 	r7,into_16_bis_mode + 1
	bx		r7
	.state16
into_16_bis_mode   
	pop	{r2-r7,pc}     

ADD_SLOW_CS0	   .word   0xFFFECC10 

;======================================================== 
; 
; SwitchIntelFlash2burstmodeCS(Flash_Address_Rcd, SlowCsvalue, MIF base address)
; 
;     RCD value     ------> R0
;     Slow CS value ------> R1
;     EMIF base address --> R2
;======================================================== 
;
;  Input : r0 = address of flash memory | read config regirster definition 
;
;     Output : None.
;======================================================== 
; DESCRIPTION :
; -----------
; set supervisor mode
; validate instruction cache
; set condition ne to false
; fill the instruction cache memories with sequence to set up RCD register Flash
; because we can't fetch code from flash and in the same time setup RCD register
; set condition ne to True
; execute (from cache instruction) instructions which setup flash
; return in user mode
;======================================================== 
;
$SwitchIntelFlash2burstmodeCS: 
	push	{r3-r7,lr}         
	adr	r7, into_32_ter_mode
	bx		r7
	.state32

;---------------------------------------------------
; set supervisor mode
;---------------------------------------------------
into_32_ter_mode
	mrs	r3, cpsr                ; contains copy of Current Program Status Register
	and	r7, r3, #0x1f           ; keep only the mode bits
	cmp	r7, #0x13
	beq	set_instr_cache_cs      ; if supervisor mode, go to main function
	
	adr	r7, into_16_ter_tmp_mode + 1
	bx	r7
	.state16
	
into_16_ter_tmp_mode
	swi	#0xFA			; if not supervisor mode, set svc mode
	adr	r7, set_instr_cache_cs
	bx	r7
	.state32

; set instruction cache
set_instr_cache_cs:	
	mrc   p15,#0,r4,c1,c0      ; r4 keeps value of cp15 register 1
	orr   r7, r4, #0x1000
	mcr   p15,#0,r7,c1,c0      ; Enable the I_Cache


; Setup flash read configuration command and 
; configure EMIF slow CS config register value
	mov	r6, #0x60
	mov	r7, #0x03
	
	movs    r9, #0 ; <=> mov r9,#0, cmp r9,0 => condition Flag z (zero) = true

; The first time we pass here instruction are not executed
; due to condition z which is false

set_flash_mode_cs:    
	strneh r6, [r0]  ; write RCD,0x60 (executed if z = false)
	strneh r7, [r0]  ; write RCD,0x03 (executed if z = false)
	strne  r1, [r2]  ; set the emif slow cs0 register (executed if z = false)

	add 	r9, r9, #1
	cmp 	r9, #2      ; change condition flag z to execute the previous instructions
	BNE 	set_flash_mode_cs
       
;---------------------------------------------------
;restore mode
;---------------------------------------------------
	mcr 	p15,#0,r4,c1,c0		; restore value of cp15 register 1
	msr 	cpsr, r3		; restore cpsr value

	adr 	r7,into_16_ter_mode + 1
	bx		r7
	.state16
into_16_ter_mode   
	pop	{r3-r7,pc}     

	.end