camcor.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

ReturnCode_t CAMCOR_CcpConfigure(
                      const UWORD32            baseAddress,
                      const UWORD32            ccpLineStartCode,
                      const UWORD32            ccpLineEndCode,
                      const UWORD32            ccpFrameStartCode,
                      const UWORD32            ccpFrameEndCode,
                      const CAMCOR_CcpMode_t   ccpDataFormat,
                      const UWORD32            ccpAlphaParameter 
                    )
{ 
    ReturnCode_t returnCode = TEST_OK;
    UWORD32 reg;
   
    /*Check the input Parameters*/
    CHECK_INPUT_PARAM(baseAddress,0,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);
    CHECK_INPUT_PARAM(ccpDataFormat,CAMCOR_CCPMODE_RESERVED1,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);

    /* Write framing codes registers */
    /* Write CCP Line Start Code in CCPLSCR register */
    CAMCCC_CCPLSCRWriteRegister32(baseAddress, ccpLineStartCode);
    /* Write CCP Line End Code in CCPLECR register */
    CAMCCC_CCPLECRWriteRegister32(baseAddress, ccpLineEndCode);
    /* Write CCP Frame Start Code in CCPFSCR register */
    CAMCCC_CCPFSCRWriteRegister32(baseAddress, ccpFrameStartCode);
    /* Write CCP Frame End Code in CCPFECR register */
    CAMCCC_CCPFECRWriteRegister32(baseAddress, ccpFrameEndCode);

    /* Write CCPDFR register */
    /* Read current reg contents */
    reg = CAMCCC_CCPDFRReadRegister32(baseAddress);

    /* Set CCP Alpha Parameter */
    reg = CAMCCC_CCPDFRAlphaSet32(reg, ccpAlphaParameter);
    /* Set CCP selected Data Format */
    reg = CAMCCC_CCPDFRDataFormatSelectSet32(reg, ccpDataFormat);
    /* Write back CCPDFR register*/

    CAMCCC_CCPDFRWriteRegister32(baseAddress, reg);

    /* read ctrl cc register */
    reg = CAMCCC_CTRLReadRegister32(baseAddress);

    /* switch on CCP mode */
    reg = CAMCCC_CTRLCCP_MODESet32(reg, CAMCOR_SET);
    /* TODO: extra setup because new bit (19) is added to CC_CTRL, no beach for it yet */
    reg = reg & 0xfff7ffff;

    /* write back ctrl cc register */
    CAMCCC_CTRLWriteRegister32(baseAddress, reg);

    return returnCode; 
}

 
/*==================== Function Separator =============================*/

/*
-----------------------------------------------------------------------------
 NAME        : CAMCOR_ParCamConfigure

-----------------------------------------------------------------------------
*/

ReturnCode_t CAMCOR_ParCamConfigure(
                      const UWORD32                 baseAddress,
                      const CAMCOR_ParallelMode_t   parMode,
                      const UWORD32                 nobtVsPol,
                      const UWORD32                 nobtHsPol,
                      const UWORD32                 parClkPol,
                      const UWORD32                 parOrdercam,
                      const UWORD32                 btCorrect 
                    )
{ 
    ReturnCode_t returnCode = TEST_OK;
    UWORD32 reg;
   
    /*Check the input Parameters*/
    CHECK_INPUT_PARAM(baseAddress,0,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);
    CHECK_INPUT_PARAM(parMode,CAMCOR_PARMODE_FIFO_TEST,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);
    CHECK_INPUT_PARAM(parMode,CAMCOR_PARMODE_RESERVED1,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);
    CHECK_INPUT_PARAM(parMode,CAMCOR_PARMODE_RESERVED2,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);

    /* read ctrl cc register */
    reg = CAMCCC_CTRLReadRegister32(baseAddress);

    /* Write the selected Protocol for the Parallel Camera */
    reg = CAMCCC_CTRLPAR_MODESet32(reg, parMode);
    /* Sets the Polarity of the Vertical Synchronization Signal */
    reg = CAMCCC_CTRLNOBT_VS_POLSet32(reg, nobtVsPol);
    /* Sets the Polarity of the Horizontal Synchronization Signal */
    reg = CAMCCC_CTRLNOBT_HS_POLSet32(reg, nobtHsPol);
    /* Sets the Polarity of the Clock Signal for the Parallel Camera */
    reg = CAMCCC_CTRLPAR_CLK_POLSet32(reg, parClkPol);
    /* Enable the swap between image data */
    reg = CAMCCC_CTRLPAR_ORDERCAMSet32(reg, parOrdercam);
    /* Enables the correction within the sync code in the BT mode */
    reg = CAMCCC_CTRLBT_CORRECTSet32(reg, btCorrect);
    /* TODO: extra setup because new bit (13) is added to CC_CTRL, no beach for it yet */
    reg = reg | 0x00002000;
    /* TODO: extra setup because new bit (19) is added to CC_CTRL, no beach for it yet */
    reg = reg & 0xfff7ffff;
    /* switch off CCP mode */
    reg = CAMCCC_CTRLCCP_MODESet32(reg, CAMCOR_CLEAR);
    
    /* write back ctrl cc register */
    CAMCCC_CTRLWriteRegister32(baseAddress, reg);

    return returnCode; 
}


/*==================== Function Separator =============================*/

/*
-----------------------------------------------------------------------------
 NAME        : CAMCOR_FifoTestModeConfigure

-----------------------------------------------------------------------------
*/

ReturnCode_t CAMCOR_FifoTestModeConfigure(
                      const UWORD32   baseAddress
                    )
{ 
    ReturnCode_t returnCode = TEST_OK;
    UWORD32 reg;
   
    /*Check the input Parameters*/
    CHECK_INPUT_PARAM(baseAddress,0,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);

    /* read ctrl cc register */
    reg = CAMCCC_CTRLReadRegister32(baseAddress);

    /* Write the FIFO test mode indicator to the PAR_MODE field */
    reg = CAMCCC_CTRLPAR_MODESet32(reg, CAMCOR_PARMODE_FIFO_TEST);
    /* switch off CCP mode */
    reg = CAMCCC_CTRLCCP_MODESet32(reg, CAMCOR_CLEAR);

    /* write back ctrl cc register */
    CAMCCC_CTRLWriteRegister32(baseAddress, reg);

    return returnCode; 
}


/*==================== Function Separator =============================*/

/*
-------------------------------------------------------------------------------
 NAME		: CAMCOR_DmaRequestConfigure

-------------------------------------------------------------------------------
  */ 
  
ReturnCode_t CAMCOR_DmaRequestConfigure(
                      const UWORD32   baseAddress,
                      const UWORD32   fifoThreshold,
                      const UWORD32   dmaReqEnable
                    )
{ 
    ReturnCode_t returnCode = TEST_OK;
   
    /*Check the input Parameters*/
    CHECK_INPUT_PARAM(baseAddress,0,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);

    /* Sets the FIFO Threshold above which the the Camera core asserts a HW DMA request */
    CAMCCC_CTRL_DMAFIFO_THRESHOLDWrite32(baseAddress, fifoThreshold);
    /* Enables the assertion of the HW DMA request when FIFO thresold is exceeded  */
    CAMCCC_CTRL_DMADMA_ENWrite32(baseAddress, dmaReqEnable);
   
    return returnCode; 
}

/*==================== Function Separator =============================*/

/*
-------------------------------------------------------------------------------
 NAME		: CAMCOR_ClockDivider

-------------------------------------------------------------------------------
*/ 
  
ReturnCode_t CAMCOR_ClockDivider(
                      const UWORD32   baseAddress,
                      const UWORD32   xclkDiv
                    )
{ 
    ReturnCode_t returnCode = TEST_OK;
   
    /*Check the input Parameters*/
    CHECK_INPUT_PARAM(baseAddress,0,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);

    /* Sets the ratio of the XCLK frequency */
    CAMCCC_CTRL_XCLKXCLK_DIVWrite32(baseAddress, xclkDiv);
   
    return returnCode; 
}


/*==================== Function Separator =============================*/

/*
-------------------------------------------------------------------------------
 NAME		: CAMCOR_SmReset

-------------------------------------------------------------------------------
*/ 

ReturnCode_t CAMCOR_SmReset(
                      const UWORD32 baseAddress
                    )
{
    ReturnCode_t returnCode = TEST_OK;
   
    /*Check the input Parameters*/
    CHECK_INPUT_PARAM(baseAddress,0,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);

    /* set the 'reset FSMs' bit */
    CAMCCC_CTRLCC_RSTWrite32(baseAddress, 0x1);

    return returnCode;   
}


/*==================== Function Separator =============================*/

/*
-------------------------------------------------------------------------------
 NAME		: CAMCOR_FrameTrigSetClear

-------------------------------------------------------------------------------
*/ 

ReturnCode_t CAMCOR_FrameTrigSetClear(
                      const UWORD32      baseAddress,
                      const CAMCOR_SetClear_t  setClear 
                    )
{
    ReturnCode_t returnCode = TEST_OK;
   
    /*Check the input Parameters*/
    CHECK_INPUT_PARAM(baseAddress,0,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);

    /* check if to set or clear frame trig bit */
    switch(setClear)
    {
        case CAMCOR_SET:
            CAMCCC_CTRLCC_FRAME_TRIGWrite32(baseAddress, 0x1);
        break;
        
        case CAMCOR_CLEAR:
        default:
            CAMCCC_CTRLCC_FRAME_TRIGWrite32(baseAddress, 0x0);
        break;
    }

    return returnCode; 
}                     


/*==================== Function Separator =============================*/

/*
-------------------------------------------------------------------------------
 NAME		: CAMCOR_FifoRead

-------------------------------------------------------------------------------
*/ 

ReturnCode_t CAMCOR_FifoRead(
                      const UWORD32      baseAddress,
                      UWORD32 * const    fifoWord 
                    )
{
    ReturnCode_t returnCode = TEST_OK;
   
    /*Check the input Parameters*/
    CHECK_INPUT_PARAM(baseAddress,0,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);
    CHECK_INPUT_PARAM(fifoWord,NULL,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);

    *fifoWord = CAMCCC_FIFODATAReadRegister32(baseAddress);

    return returnCode; 
}


/*==================== Function Separator =============================*/

/*
-------------------------------------------------------------------------------
 NAME		: CAMCOR_FifoWrite

-------------------------------------------------------------------------------
*/ 

ReturnCode_t CAMCOR_FifoWrite(
                      const UWORD32      baseAddress,
                      const UWORD32      fifoWord 
                    )
{
    ReturnCode_t returnCode = TEST_OK;
   
    /*Check the input Parameters*/
    CHECK_INPUT_PARAM(baseAddress,0,RET_BAD_NULL_PARAM,RES_CAMCOR_BASE + RES_INVALID_INPUT_PARAM);

    CAMCCC_FIFODATAWriteRegister32(baseAddress, fifoWord);

    return returnCode; 
}



/* ============================================================================
* LOCAL FUNCTIONS
* =============================================================================
*/

/* EOF */