juno_comm.inc

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

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;; Copyright 1999, 2000 by Texas Instruments Incorporated. All rights reserved.
;; Property of Texas Instruments Incorporated. Restricted rights to use,
;; duplicate or disclose this code are granted through contract.
;;
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;;
;; $Workfile: juno_comm.inc
;; $Modtime: 9/15/00 5:50p $
;; $Author: A0187334 $
;; $Revision: 5 $
;;
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;;
;; $Description: $
;;
;; Assembly include file for Juno Testing.
;;
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DEVICE_BASE            .equ   0x08100000  ; ARM925DC Peripherals Registers
EVM_REGISTER_BASE      .equ   0x11000000  ; EVM HIO FPGA Registers

; HID Constants 
; FPGA HID Register Bit Patterns 
MOSI_CLK_HI            .equ    0x3
HID_HOST_ACTIVE        .equ    0x80
ATN_ACTIVE             .equ    0x20
SS_ACTIVE              .equ    0x04
SS_INACTIVE            .equ    0xfb

CLK_LOW                .equ    0xfe
CLK_LOW_MOSI_LOW       .equ    0xfc
CLK_HIGH               .equ    0x1      

MISO_BIT               .equ    0x10

; Packet Values 
SIMP_HDR            .equ    0x80
WRITE_REG               .equ    0x83
READ_REG            .equ    0x84
WRITE_BLOCK                     .equ    0x85
INIT_CMD            .equ    0x0
LRC_INIT            .equ    0x40 

INIT_CMPLT          .equ    0x1 
LRC_CMPLT           .equ    0x41


; TIMER Offsets PerseusDC 

READ_TIM_OFFSET     .equ    2
LOAD_TIM_OFFSET     .equ    2 
CNTL_TIM_OFFSET     .equ    0

WD_TIMER_ENABLE     .equ    0x80
WD_AUTO_RELOAD      .equ    0x0100
WD_ONE_SHOT         .equ    0x0
WD_TIMER_FREE       .equ    0x02
WD_TICK_VAL         .equ    463 
MAX_NO_PRESCALE     .equ    141

; HID SPI register offset

HID_OFFSET                      .equ    8 

; Peripheral Register offset for the PerseusDC FPGA

PERIPH_RESET                    .equ    1
HID_ACTIVE                      .equ    0x4

; Synchronous Communications Timing Parameters 

Tmac                            .equ    100
Tslow                           .equ    2
Tmib                            .equ    150
Tmnext                          .equ    120
Tssc                .equ    100
Tsna                            .equ    100  

; Read/Write Register Macros 
; Macros that function as wrappers around the _packet_write and READ Functions
; Since C code will call the _packet_write, _packet_read functions most of the
; time these macros are provided for calling these functions via assembly code.
; The simply reduce the amount of text in the assembly source file.  

; Packet Write, Read Macro where label is the address (label) of the byte array 
; that gets passed to _packet_write and number is the number of bytes in the array.
; fpga_ptr is a pointer to the FPGA (physical address 0x11000000) that contains
; the HID SPI register, timer_ptr is a pointer to the TI925DC or MM's(Perseus) 
; timer 0 register (physical address 0x810A000 on the DC), MHz is the speed in 
; MHz of the processor   
  
packet_writem16   .macro   label, number, fpga_ptr, timer_ptr, MHz   
                                bx      pc
                                nop 
                                .state32             
                                stmdb    sp!, {r0, r1, r2, r3}
                                mov     r3, MHz                 
                                sub     sp, sp, #4
                                str     r3, [sp]
                                mov     r2, fpga_ptr 
                                mov     r3, timer_ptr  
                                mov     r1, #number
                                adr             r0, label
                                bl      $packet_write
                                add     sp, sp, #4 
                                add     r3, pc, #1
                                bx      r3
                                nop
                                .state16
                                pop    {r0, r1, r2, r3}
                                .endm

packet_readm16    .macro   label, fpga_ptr, timer_ptr, MHz
                                bx      pc
                                nop 
                                .state32             
                                stmdb    sp!, {r0, r1, r2, r3}
                                mov     r3, MHz    
                                mov     r2, timer_ptr
                                mov     r1, fpga_ptr            
                                ldr     r0, label
                                ldr     r0, [r0]
                                bl      $packet_read
                                add     r3, pc, #1
                                bx      r3
                                nop
                                .state16
                                pop    {r0, r1, r2, r3}
                                .endm

; With this macro we are writing to a C array (r1) so we don't
; have to calculate (via adr) the address of the label 

packet_read2    .macro   fpga_ptr, timer_ptr, MHz
                                stmdb    sp!, {r0, r1, r2, r3}
                                mov     r3, MHz    
                                mov     r2, timer_ptr
                                mov     r0, r1            ; r1 has the response_array pointer 
                                mov     r1, fpga_ptr            
                                bl      _packet_read
                                ldmia    sp!, {r0, r1, r2, r3}
                                .endm


; Pause Macro
; This Macro functions as a wrapper around the PAUSE function.  It is meant to be used
; to calling the PAUSE function via assembly code.

; Packet Write, Read Macro where label is the address (label) of the byte array 
; that gets passed to _packet_write and number is the number of bytes in the array.
  
pausem  .macro   clock_freq, delay_time, timer_reg_ptr
                
                                stmdb    sp!, {r0, r1, r2, r3}
                                mov     r0, clock_freq
                                mov     r2, timer_reg_ptr                                   
                                mov     r1, #delay_time

                                bl      PAUSE 
                                ldmia    sp!, {r0, r1, r2, r3}
                                .endm

pausem16   .macro   clock_freq, delay_time, timer_reg_ptr
                                
                                bx      pc
                                nop 
                                .state32             
                                stmdb    sp!, {r0, r1, r2, r3}
                                mov     r0, clock_freq
                                mov     r2, timer_reg_ptr               
                                mov     r1, #delay_time
                                bl      PAUSE 
                                add     r3, pc, #1
                                bx      r3
                                nop
                                .state16
                                pop    {r0, r1, r2, r3}
                                .endm

; Wait Macro
; This Macro functions as a wrapper around the Wait function.  It is meant to be used
; to calling the WAIT function via assembly code.

; clock_freq is frequency (in MHZ) delay_time is the delay time in milliseonds
; timer_reg_ptr is the pointer to the timer register 
; that gets passed to _packet_write and number is the number of bytes in the array.
  
waitm  .macro   clock_freq, delay_time, timer_reg_ptr
                
                                stmdb    sp!, {r0, r1, r2, r3}
                                mov     r0, clock_freq
                                mov     r2, timer_reg_ptr                                   
                                mov     r1, #delay_time

                                bl      _wait
                                ldmia    sp!, {r0, r1, r2, r3}
                                .endm