tmp.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

                MSG_RI_FAIL_FIVES(r.regType, r.address, regVal32);
            }

            // write AAAAS32

            MSG_RI_AAAAS(r.regType, r.address);

            WR_MEM_32_VOLATILE(r.address + baseAddress, AAAAS32);

            // now change data bus

            DUMMY_WRITE(FIVES32);

            // now check back value of register

            regVal32 = RD_MEM_32_VOLATILE(r.address + baseAddress);

            if ( (regVal32 & r.readMask) != (((AAAAS32 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                MSG_RI_FAIL_AAAAS(r.regType, r.address, regVal32);
            }

            // write ZEROS32

            MSG_RI_ZEROS(r.regType, r.address);

            WR_MEM_32_VOLATILE(r.address + baseAddress, ZEROS32);

            // now change data bus

            DUMMY_WRITE(ONES32);

            // now check back value of register

            regVal32 = RD_MEM_32_VOLATILE(r.address + baseAddress);

            if ( (regVal32 & r.readMask) != (((ZEROS32 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                MSG_RI_FAIL_ZEROS(r.regType, r.address, regVal32);
            }

            break;
        }

        case ACC_16BIT:
        {
            // write ONES16

            MSG_RI_ONES(r.regType, r.address);

            WR_MEM_16_VOLATILE(r.address + baseAddress, ONES16);

            // now change data bus

            DUMMY_WRITE(ZEROS16);

            // now check back value of register

            regVal16 = RD_MEM_16_VOLATILE(r.address + baseAddress);

            if ( (regVal16 & r.readMask) != (((ONES16 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                 MSG_RI_FAIL_ONES(r.regType, r.address, regVal16);
            }

            // write FIVES16
            
            MSG_RI_FIVES(r.regType, r.address);

            WR_MEM_16_VOLATILE(r.address + baseAddress, FIVES16);

            // now change data bus

            DUMMY_WRITE(AAAAS16);

            // now check back value of register

            regVal16 = RD_MEM_16_VOLATILE(r.address + baseAddress);

            if ( (regVal16 & r.readMask) != (((FIVES16 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                 MSG_RI_FAIL_FIVES(r.regType, r.address, regVal16);
            }

            // write AAAAS16

            MSG_RI_AAAAS(r.regType, r.address);

            WR_MEM_16_VOLATILE(r.address + baseAddress, AAAAS16);

            // now change data bus

            DUMMY_WRITE(FIVES16);

            // now check back value of register

            regVal16 = RD_MEM_16_VOLATILE(r.address + baseAddress);

            if ( (regVal16 & r.readMask) != (((AAAAS16 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                 MSG_RI_FAIL_AAAAS(r.regType, r.address, regVal16);
            }

            // write ZEROS16

            MSG_RI_ZEROS(r.regType, r.address);

            WR_MEM_16_VOLATILE(r.address + baseAddress, ZEROS16);

            // now change data bus

            DUMMY_WRITE(ONES16);

            // now check back value of register

            regVal16 = RD_MEM_16_VOLATILE(r.address + baseAddress);

            if ( (regVal16 & r.readMask) != (((ZEROS16 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                 MSG_RI_FAIL_ZEROS(r.regType, r.address, regVal16);
            }

            break;
        }

        case ACC_8BIT:
        {
            // write ONES8

            MSG_RI_ONES(r.regType, r.address);

            WR_MEM_8_VOLATILE(r.address + baseAddress, ONES8);

            // now change data bus

            DUMMY_WRITE(ZEROS8);

            // now check back value of register

            regVal8 = RD_MEM_8_VOLATILE(r.address + baseAddress);

            if ( (regVal8 & r.readMask) != (((ONES8 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                 MSG_RI_FAIL_ONES(r.regType, r.address, regVal8);
            }

            // write FIVES8

            MSG_RI_FIVES(r.regType, r.address);

            WR_MEM_8_VOLATILE(r.address + baseAddress, FIVES8);

            // now change data bus

            DUMMY_WRITE(AAAAS8);

            // now check back value of register

            regVal8 = RD_MEM_8_VOLATILE(r.address + baseAddress);

            if ( (regVal8 & r.readMask) != (((FIVES8 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                 MSG_RI_FAIL_FIVES(r.regType, r.address, regVal8);
            }

            // write AAAAS8

            MSG_RI_AAAAS(r.regType, r.address);

            WR_MEM_8_VOLATILE(r.address + baseAddress, AAAAS8);

            // now change data bus

            DUMMY_WRITE(FIVES8);

            // now check back value of register

            regVal8 = RD_MEM_8_VOLATILE(r.address + baseAddress);

            if ( (regVal8 & r.readMask) != (((AAAAS8 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                 MSG_RI_FAIL_AAAAS(r.regType, r.address, regVal8);
            }

            // write ZEROS8

            MSG_RI_ZEROS(r.regType, r.address);

            WR_MEM_8_VOLATILE(r.address + baseAddress, ZEROS8);

            // now change data bus

            DUMMY_WRITE(ONES8);

            // now check back value of register

            regVal8 = RD_MEM_8_VOLATILE(r.address + baseAddress);

            if ( (regVal8 & r.readMask) != (((ZEROS8 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                 MSG_RI_FAIL_ZEROS(r.regType, r.address, regVal8);
            }

            break;
        }

        default:
            break;
        }
    }

    MSG_END_RI_TESTS;
}

void CAM1RegisterIntegrityRW0ToSetTest(const UWORD32 baseAddress)
{
}

void CAM1RegisterIntegrityRW1ToSetTest(const UWORD32 baseAddress)
{
}

void CAM1RegisterIntegrityRW0ToClrTest(const UWORD32 baseAddress)
{
}

void CAM1RegisterIntegrityRW1ToClrTest(const UWORD32 baseAddress)
{
}

void CAM1RegisterIntegrityRW1TogPerBitTest(const UWORD32 baseAddress)
{
}

void CAM1RegisterROWOTest(const UWORD32 baseAddress)
{
    UWORD32 i;
    registerROWOStruct r;
    
    UWORD32 regValueFirst32;
    UWORD32 regValueSecond32;
    
    UWORD16 regValueFirst16;
    UWORD16 regValueSecond16;
    
    UWORD8 regValueFirst8;
    UWORD8 regValueSecond8;
    
    UWORD32 FIVES32;
    UWORD32 AAAAS32;
    
    UWORD16 FIVES16;
    UWORD16 AAAAS16;
    
    UWORD8 FIVES8;
    UWORD8 AAAAS8;   
   
    MSG_START_RO_TESTS;

    for( i = 0 ; i < CAM1_RO_REGISTERS ; i++ )
    {
        r = CAM1RegisterROData[i];

        MSG_RO_TEST(r.regType, r.address);

        switch( r.regType )
        {

        case ACC_32BIT:
        {
            // get Register

            regValueFirst32 = RD_MEM_32_VOLATILE(r.address + baseAddress);

            // invert Register value and write back

            WR_MEM_32_VOLATILE(r.address + baseAddress, (UWORD32)~regValueFirst32);

            // now check back value of Register

            regValueSecond32 = RD_MEM_32_VOLATILE(r.address + baseAddress);

            if( (((regValueFirst32 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) != (((regValueSecond32 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                MSG_RO_FAIL(r.regType, r.address, regValueFirst32, regValueSecond32);
            }

            break;

        }

        case ACC_16BIT:
        {
            UWORD16 regValueFirst16;
            UWORD16 regValueSecond16;

            // get Register

            regValueFirst16 = RD_MEM_16_VOLATILE(r.address + baseAddress);

            // invert Register value and write back

            WR_MEM_16_VOLATILE(r.address + baseAddress, (UWORD16)~regValueFirst16);

            // now check back value of Register

            regValueSecond16 = RD_MEM_16_VOLATILE(r.address + baseAddress);

            if( (((regValueFirst16 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) != (((regValueSecond16 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                MSG_RO_FAIL(r.regType, r.address, regValueFirst16, regValueSecond16);
            }

            break;

        }

        case ACC_8BIT:
        {
            UWORD8 regValueFirst8;
            UWORD8 regValueSecond8;

            // get Register

            regValueFirst8 = RD_MEM_8_VOLATILE(r.address + baseAddress);

            // invert Register value and write back

            WR_MEM_8_VOLATILE(r.address + baseAddress, (UWORD8)~regValueFirst8);

            // now check back value of Register

            regValueSecond8 = RD_MEM_8_VOLATILE(r.address + baseAddress);

            if( (((regValueFirst8 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) != (((regValueSecond8 & r.rsrvdReturnZerosMask) | r.rsrvdReturnOnesMask) & r.readMask) )
            {
                MSG_RO_FAIL(r.regType, r.address, regValueFirst8, regValueSecond8);
            }

            break;

        }

        default:
            break;
        }
    }

    MSG_END_RO_TESTS;

}

/* EOF */