elcd.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

 
}


//---------------------------------------------------------
//NAME        : ELCD_DisableRXDMAreq
//DESCRIPTION : To disable the ELCD Rx DMA requests generation from ELCD I/F
//
//RETURN VALUE:
//LIMITATIONS :
//---------------------------------------------------------
void ELCD_DisableRXDMAreq(void){  
  
  UWORD32 register_value = ELCD_DMAIT_REG;
  
  register_value &= ~( 1 << ELCD_DMAIT_REG_DMA_RX_EN_POS );
  ELCD_DMAIT_REG = register_value;
 
}


//---------------------------------------------------------
//NAME        : ELCD_SetTXMode
//DESCRIPTION : To select OCP Bus or DMA-LCD TX dedicated bus only to fill the TX FIFO
//
//RETURN VALUE:
//LIMITATIONS :
//---------------------------------------------------------
void ELCD_SetTXMode(ELCD_tx_mode_t tx_mode){

  UWORD32 register_value = ELCD_DMAIT_REG;
  
  register_value &= ~(1 << ELCD_DMAIT_REG_TX_MODE_POS); // to reset tx_mode bit 
  register_value |= ( tx_mode << ELCD_DMAIT_REG_TX_MODE_POS );
  ELCD_DMAIT_REG = register_value;
  
}


//---------------------------------------------------------
//NAME        : ELCD_Start
//DESCRIPTION : 
//PARAMETERS  : CS on which transfer will be performed (nCS1 or nCS0)
//RETURN VALUE: 
//LIMITATIONS : 
//---------------------------------------------------------
void ELCD_Start(ELCD_cs_type cs){

  ELCD_ELCDCTL_REG &= ~(UWORD32)(cs); // To activate the desired CS 
   
}


//---------------------------------------------------------
//NAME        : ELCD_Stop
//DESCRIPTION : 
//PARAMETERS  :
//RETURN VALUE: 
//LIMITATIONS : 
//---------------------------------------------------------
void ELCD_Stop(void){

  UWORD32 register_value = ELCD_ELCDCTL_REG;
  
  // We must wait for the fsm to come back into idle before releasing the CS & DnC
  while ( !GetGroupBits32(ELCD_STATUS_REG, ELCD_STATUS_REG_IDLE_POS, ELCD_STATUS_REG_IDLE_NUMB) );
  
  // Release the CS & DnC
  register_value |= (UWORD32)( (1 << ELCD_ELCDCTL_REG_ELCD_NCS1_POS) | (1 << ELCD_ELCDCTL_REG_ELCD_NCS0_POS) );
  register_value |= (1 << ELCD_ELCDCTL_REG_ELCD_DNC_POS);
  
  ELCD_ELCDCTL_REG = register_value;    

}



//---------------------------------------------------------
//NAME        : ELCD_Stop
//DESCRIPTION : 
//PARAMETERS  :
//RETURN VALUE: 
//LIMITATIONS : 
//---------------------------------------------------------
void ELCD_SetPixelSize(UWORD8 pixel_size){

  SetField32(ELCD_PIXELPOS_REG, PIXEL_SIZE, pixel_size - 1);

}




//---------------------------------------------------------
//NAME        : ELCD_SetCycleMapping
//DESCRIPTION : 
//PARAMETERS  :
//RETURN VALUE: 
//LIMITATIONS : 
//---------------------------------------------------------
void ELCD_SetPixelAndCycleMapping(UWORD8 pixel_size, 
				  UWORD8 Ncycle, 
				  ELCD_nb_pixel_t Nb_pixel_per_data,
				  UWORD8 Pix4_RP, 
				  UWORD8 Pix3_RP, 
				  UWORD8 Pix2_RP, 
				  UWORD8 Pix1_RP, 
				  UWORD8 cycle1_mapping[CYCLE1_CAPABILITY], 
				  UWORD8 cycle2_mapping[CYCLE2_CAPABILITY], 
				  UWORD8 cycle3_mapping[CYCLE3_CAPABILITY],
				  UWORD32 Nb_pixel_2_send){
  
  UWORD32 cycle1_reg[5] = {0x0, 0x0, 0x0, 0x0, 0x0}; // 5 cycle1 registers into ELCD module so that cycle1_reg[0] value will be cycle1_reg1 one, cycle1_reg[1] value will be cycle1_reg2 one and so on for the others ones

  UWORD32 cycle2_reg[3] = {0x0, 0x0, 0x0}; // 3 cycle2 registers into ELCD module so that cycle2_reg[0] value will be cycle2_reg1 one, cycle2_reg[1] value will be cycle2_reg2 one and so on for the last one

  UWORD32 cycle3_reg[2] = {0x0, 0x0}; // 2 cycle3 registers into ELCD module so that cycle3_reg[0] value will be cycle3_reg1 one, cycle3_reg[1] value will be cycle3_reg2 one



  int i, j;
  
  ELCD_PIXELPOS_REG = ( ((pixel_size - 1)  << ELCD_PIXELPOS_REG_PIXEL_SIZE_POS) | // Set the pixel size
			(Nb_pixel_per_data << ELCD_PIXELPOS_REG_NPIXELS_POS)    | // Set the pixel number per data 
			(Pix4_RP           << ELCD_PIXELPOS_REG_PIX4_RP_POS)    | // Set the 4th pixel right position
			(Pix3_RP           << ELCD_PIXELPOS_REG_PIX3_RP_POS)    | // Set the 3rd pixel right position
			(Pix2_RP           << ELCD_PIXELPOS_REG_PIX2_RP_POS)    | // Set the 2nd pixel right position
			(Pix1_RP           << ELCD_PIXELPOS_REG_PIX1_RP_POS) );   // Set the 1st pixel right position
 
  SetField32(ELCD_ELCDCTL_REG, NCYCLE, Ncycle);               // Set the number of cycle per pixel
  SetField32(ELCD_COUNTERTX_REG, COUNTERTX, Nb_pixel_2_send); // Set the total number of pixel to send  
  
  for (i = 1; i <= Ncycle; i++){ // for each cycle
    
    switch (i)
      {
	
      case 1 : // 1st cycle
	
	for (j = 0; j < CYCLE1_CAPABILITY; j++){
	  if (cycle1_mapping[j] != UNUSUED) 
	    cycle1_reg[(int)(j/5)] |= ( (cycle1_mapping[j] | (0x1<<5)) << (6*(j%5)) ); // compute CYCLE1_REGy value (1<<5 is needed to set the STS field)
	}
	break; 
	
      case 2 : // 2nd cycle
	for (j = 0; j < CYCLE2_CAPABILITY; j++){
	  if (cycle2_mapping[j] != UNUSUED) 
	    cycle2_reg[(int)(j/5)] |= ( (cycle2_mapping[j] | (0x1<<5)) << (6*(j%5)) ); // compute CYCLE2_REGy value
	}
	break; 
	
      case 3 : // 3rd cycle
	for (j = 0; j < CYCLE3_CAPABILITY; j++){
	  if (cycle3_mapping[j] != UNUSUED) 
	    cycle3_reg[(int)(j/5)] |= ( (cycle3_mapping[j] | (0x1<<5)) << (6*(j%5)) ); // compute CYCLE3_REGy value
	}
	break; 
	
      } 
    
  }
 
  // Set the CYCLEx_REGy registers
  for (i = 0; i < 5; i++)
    REG32(ELCD_BASE_ADDR_ARM+ELCD_CYCLE1_REG1_OFFSET+i*0x4) = cycle1_reg[i];
  for (i = 0; i < 3; i++)
    REG32(ELCD_BASE_ADDR_ARM+ELCD_CYCLE2_REG1_OFFSET+i*0x4) = cycle2_reg[i];
  for (i = 0; i < 2; i++)
    REG32(ELCD_BASE_ADDR_ARM+ELCD_CYCLE3_REG1_OFFSET+i*0x4) = cycle3_reg[i];

}



//---------------------------------------------------------
//NAME        : ELCD_SetCycleMapping
//DESCRIPTION : Define the number of consecutive read access.
//              A call to this procedure starts the read access 
//              on the EXLCD for the RX counter value. 
//PARAMETERS  : RX counter value & CS that will be used to perform the access
//RETURN VALUE: 
//LIMITATIONS : 
//---------------------------------------------------------
void ELCD_StartReadAccess(UWORD32 rx_counter_value, ELCD_cs_type cs){

  SetField32(ELCD_COUNTERRX_REG, COUNTERRX, rx_counter_value);
  
  ELCD_ELCDCTL_REG &= ~(UWORD32)(cs); // To activate the desired CS 

}



//---------------------------------------------------------
//NAME        : ELCD_DisableHWSync
//DESCRIPTION : To disable the ELCD DMA requests generation on LCD Channel
//
//RETURN VALUE:
//LIMITATIONS :
//---------------------------------------------------------
void ELCD_DisableHWSync(void){  
  
  SetField32(ELCD_TE_REG, MODE, NO_HW_SYNC_MODE);
 
}




//---------------------------------------------------------
//NAME        : ELCD_DisableHWSync
//DESCRIPTION : To disable the ELCD DMA requests generation on LCD Channel
//
//RETURN VALUE:
//LIMITATIONS :
//---------------------------------------------------------
void ELCD_SetTearingEffect(UWORD8 vs_counter, 
			   ELCD_te_polarity_t te_polarity, 
			   ELCD_te_mode_t te_mode, 
			   UWORD16 hs_match, 
			   UWORD16 vs_detect, 
			   UWORD8 pulse_detect){

  UWORD32 temp;

  SetGroupBits(temp, ELCD_TE_REG_VS_COUNTER_POS, ELCD_TE_REG_VS_COUNTER_NUMB, vs_counter);
  SetGroupBits(temp, ELCD_TE_REG_TE_INVERTED_POS, ELCD_TE_REG_TE_INVERTED_NUMB, te_polarity);
  SetGroupBits(temp, ELCD_TE_REG_MODE_POS, ELCD_TE_REG_MODE_NUMB, te_mode);
  SetGroupBits(temp, ELCD_TE_REG_HS_MATCH_POS, ELCD_TE_REG_HS_MATCH_NUMB, hs_match);
  SetGroupBits(temp, ELCD_TE_REG_VS_DETECT_POS, ELCD_TE_REG_VS_DETECT_NUMB, vs_detect);
  SetGroupBits(temp, ELCD_TE_REG_PULSE_DETECT_POS, ELCD_TE_REG_PULSE_DETECT_NUMB, pulse_detect);

  ELCD_TE_REG = temp;

}


//---------------------------------------------------------
//NAME        : ELCD_DMA_LCD_WakeUp
//DESCRIPTION : DMA-LCD WAKEUP Controls the ELCD_DMA_WAKEUP pin
//
//RETURN VALUE:
//LIMITATIONS :
//---------------------------------------------------------
void ELCD_DMA_LCD_WakeUp(void){

  SetField32(ELCD_CONTROL_REG, DMALCD_WU, 1);

} 

//---------------------------------------------------------
//NAME        : ELCD_SetCounterTX
//DESCRIPTION : To set the pixel number to send
//
//RETURN VALUE:
//LIMITATIONS :
//---------------------------------------------------------
void ELCD_SetCounterTX(UWORD32 nb_pixels){

  SetField32(ELCD_COUNTERTX_REG, COUNTERTX, nb_pixels);

} 


//---------------------------------------------------------
//NAME        : ELCD_SetUnusuedBitsRule
//DESCRIPTION : To set the Unusued bits rule
//
//RETURN VALUE:
//LIMITATIONS :
//---------------------------------------------------------
void ELCD_SetUnusuedBitsRule(ELCD_unusued_bits_t rule){

  SetField32(ELCD_ELCDCTL_REG, UNUSUED_BITS, rule);

}



//------------------------------------------------------
// ELCD_DisableSwapping : Disable the swapping logic to output the data as 
//                        it comes
//------------------------------------------------------
void ELCD_DisableSwapping(void){

  SetField32(ELCD_ELCDCTL_REG, SWAP_DISABLE, SWAP_LOGIC_DISABLE); 

}


//------------------------------------------------------
// ELCD_SetNbPixel2send : Set the total number of pixel to send  
//------------------------------------------------------
void ELCD_SetNbPixel2send(UWORD32 nb_pixels){

  SetField32(ELCD_COUNTERTX_REG, COUNTERTX, nb_pixels);
  
}



//------------------------------------------------------
// ELCD_SetWriteEdge : To define the edge the data will be stable on   
//------------------------------------------------------
void ELCD_SetWriteEdge(ELCD_write_edge_t wedge){

  SetField32(ELCD_ONOFFTIME_REG, WEDGE, wedge);
  
}


//                                          Palladium dedicated section


//------------------------------------------------------
// LCD : Write instruction data
//       Wait FIFO empty before setting data type
//------------------------------------------------------
void ELCD_WriteSetInstruction(UWORD32 command){

  UWORD32 register_value = ELCD_ELCDCTL_REG;  
  
  register_value &= (UWORD32)~( (1 << ELCD_ELCDCTL_REG_ELCD_DNC_POS) ); // To clear the DnC field to select Control instead of Data 
  ELCD_ELCDCTL_REG = register_value;

  ELCD_CMDTX_REG = command; // Command value 
  
  // waiting loop for CMD_TX register to be ready to accept the next command data
  while ( !GetGroupBits32(ELCD_STATUS_REG, ELCD_STATUS_REG_CMDTX_END_POS, ELCD_STATUS_REG_CMDTX_END_NUMB)  );   

  register_value |= (1 << ELCD_ELCDCTL_REG_ELCD_DNC_POS);
  
  ELCD_ELCDCTL_REG = register_value;  


}


//------------------------------------------------------
// LCD : Write display data
//       Wait FIFO empty before exiting
//       ELCD CS must be activated before calling this procedure
//------------------------------------------------------
void ELCD_WriteSetDisplay(UWORD32 data)
{

  // Write the data into the FIFO
  ELCD_DATATX_REG = data;

  // waiting loop for the TX FIFO to be empty
  while ( !GetField32(ELCD_STATUS_REG, TXFIFOEMPTY)  );   

}