flash_nor_intel.h

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

/******************************************************************************\
*           Copyright (C) 2005 COMMIT Incorporated.
*                           All Rights Reserved
*------------------------------------------------------------------------------
* Project................NEPTUNE Test 
* MODULE NAME............NEPTUNE Memory Test interface on Poseidon
* Confidential Level.....Test    
* FILENAME...............flash_nor_intel.h			
* AUTHOR.................Zhenghy
* Department.............HW Circuit 
*------------------------------------------------------------------------------
* HISTORY:
* Oct 14st, 2005, created by Zhenghongying for Poseidon Memory Intel BR28F128L18T85 test module
\******************************************************************************/
/*
* ============================================================================
*
*            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
*
*   Property of Texas Instruments
*   For Unrestricted Internal Use Only
*   Unauthorized reproduction and/or distribution is strictly prohibited.
*   This product is protected under copyright law and trade secret law as an unpublished work.
*   Created 2004, (C) Copyright 2004 Texas Instruments.  All rights reserved.
*
*    test: flash
*
*    project: NEPTUNE SILICON VALIDATION
*
* =============================================================================*/

#ifndef flash_arm_h
#define flash_arm_h

/* ============================================================================
* INCLUDE FILES 
* =============================================================================*/

#include <stdlib>
//#include "monolithic_neptune_a9.h"
#include "monolithic_neptune_a9.h"
#include "result.h"
#include "errorcodes.h"

#include "flashintel.h"
#include "mif.h"

/* ============================================================================
* GLOBAL DEFINITIONS
* =============================================================================*/


/* ============================================================================
*  FUNCTIONS PROTOTYPES
* =============================================================================*/


/* Commands values */
#define INTEL_STRATA_FLASH_L18_LOCK_SETUP         0x0060
#define INTEL_STRATA_FLASH_L18_UNLOCK_BLOCK       0x00D0

/*zhy add for erase command*/
#define FLASH_ERASEBLOCK         0x0020
#define FLASH_ERASEBLOCKCONFIRM  0x00D0
/*end*/


/* Device Labels */
#define INTEL_STRATA_FLASH_L18_256Mb_TOP_DEVICE_ID    0x880D
#define INTEL_STRATA_FLASH_L18_256Mb_NB_BLOCK_64KW	    255
#define INTEL_STRATA_FLASH_L18_256Mb_NB_BLOCK_16KW	    4
#define INTEL_STRATA_FLASH_L18_BLOCK_SIZE_64KW        0x20000    /* in Bytes */
#define INTEL_STRATA_FLASH_L18_BLOCK_SIZE_16KW        0x8000     /* in Bytes */

/* Application Labels */
//jc test mode3 #define INTEL_STRATA_FLASH_L18_ADDRESS       MEM_MIF_CS3_ADDRESS
#define INTEL_STRATA_FLASH_L18_ADDRESS       0x0E000000		//Jcv test mode 3//zhy 
//#define INTEL_STRATA_FLASH_L18_ADDRESS       0x0c000000		//Jcv test mode 3//zhy 



#define INTEL_STRATA_FLASH_L18_LENGTH_32MO   0x02000000     /* in Bytes */
#define INTEL_STRATA_FLASH_L18_LENGTH_16MO   0x01000000     /* in Bytes */


/* driver functions */
extern void flash_intel_28f256l18top_read_id(UWORD32 Flash_base_address,UWORD32 * ManufactureId, UWORD32 * DeviceId);
extern WORD16 flash_intel_28f256l18top_unlock_one_block(UWORD32 unlock_address);
extern WORD16 flash_intel_28f256l18top_erase_one_block(UWORD32 erase_address);
//zhy add begin
extern WORD16 flash_erase_test_a9_zhy(UWORD32 erase_address);
//zhy add end

/* Test functions */
extern WORD16 flash_intel_28f256l18top_display_id_a9(void);
extern WORD16 flash_intel_28f256l18top_erase_a9(void);
extern WORD16 flash_intel_28f256l18top_linear_first_block_a9(void);
extern WORD16 flash_intel_28f256l18top_linear_all_block_a9(void);
extern WORD16 flash_intel_28f256l18top_copy_sdram_a9(void);

extern UWORD16 test_arm_template(void);
extern void WriteFlashRegister_I(UWORD32 Address1, UWORD16 Data1, UWORD32 Address2, UWORD16 Data2);

extern void flash_amd_s29pl127j_read_id(void);//ahuo2006.6.7
extern void flash_amd_s29pl127j_read_device_id(void);//ahuo2006.6.7

extern void flash_amd_s29pl127j_write(void);
#endif /* test_name_arm_h */