usim.h

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//========================================================================
//          TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION  
//   Property of Texas Instruments
//   For Unrestricted Internal Use Only
//   Unauthorized reprofuction and/or distribution is strictly prohibited.
//   This product is protected under copyright law and trade secret law
//   as an unpublished work
//   Created 2000,  (C) Copyright 2000 Texas Instruments. All rights reserved
//
//
//   Filename           :dolomites1_usim.h
//
//   Date of Module Modification:8/21/02
//   Date of Generation :8/21/02
//
//
//========================================================================
#ifndef _USIM__H
#define _USIM__H
#include "global_types.h"
#include "mapping.h"
#include "errorcodes.h"
#include "global_types.h"
#include "test.h"
#include "testaccess.h"
#include "triton_ldo_test.h"
#include "kbc.h"

//BEGIN INC GENERATION
//--------------------------------------


//Register Offset
//-------------------
#define            USIM_USIMCMD_OFFSET             0x00
#define            USIM_USIMSTAT_OFFSET            0x02
#define            USIM_USIMCONF1_OFFSET           0x04
#define            USIM_USIMCONF2_OFFSET           0x06
#define            USIM_USIMCONF3_OFFSET          0x08
#define            USIM_USIMMASK_IT_OFFSET        0x10
#define            USIM_USIMFIFOS_OFFSET          0x12
#define            USIM_USIMCGT_OFFSET            0x14
#define            USIM_USIMCWT_OFFSET            0x16
#define            USIM_USIMBWT_LSB_OFFSET        0x18
#define            USIM_USIMBWT_MSB_OFFSET        0x1A
#define            USIM_DEBUG_REG_OFFSET           0x1C
#define            USIM_CONF_SAM1_DIV_OFFSET       0x1E
#define            USIM_CONF4_REG_OFFSET           0x20
#define            USIM_ATR_CLK_PRD_NBS_OFFSET     0x22
#define            USIM_CONF_ETU_DIV_OFFSET        0x24
#define            USIM_CONF5_REG_OFFSET           0x26
#define            USIM_USIMIT_OFFSET             0xA
#define            USIM_USIMDRX_OFFSET            0xC
#define            USIM_USIMDTX_OFFSET            0xE


/*usim registers addr*/

#define USIM_USIMCMD_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMCMD_OFFSET)
#define USIM_USIMSTAT_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMSTAT_OFFSET)
#define USIM_USIMCONF1_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMCONF1_OFFSET)
#define USIM_USIMCONF2_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMCONF2_OFFSET)
#define USIM_USIMCONF3_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMCONF3_OFFSET)
#define USIM_USIMMASK_IT_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMMASK_IT_OFFSET)
#define USIM_USIMFIFOS_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMFIFOS_OFFSET)
#define USIM_USIMCGT_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMCGT_OFFSET)
#define USIM_USIMCWT_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMCWT_OFFSET)
#define USIM_USIMBWT_LSB_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMBWT_LSB_OFFSET)
#define USIM_USIMBWT_MSB_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMBWT_MSB_OFFSET)
#define USIM_DEBUG_REG_ADDR  	(MAP_USIM_ADDR+USIM_DEBUG_REG_OFFSET)
#define USIM_CONF_SAM1_DIV_REG_ADDR  	(MAP_USIM_ADDR+USIM_CONF_SAM1_DIV_OFFSET)
#define USIM_CONF4_REG_ADDR  	(MAP_USIM_ADDR+USIM_CONF4_REG_OFFSET)
#define USIM_ATR_CLK_PRD_NBS_REG_ADDR  	(MAP_USIM_ADDR+USIM_ATR_CLK_PRD_NBS_OFFSET)
#define USIM_CONF_ETU_DIV_REG_ADDR  	(MAP_USIM_ADDR+USIM_CONF_ETU_DIV_OFFSET)
#define USIM_CONF5_REG_ADDR  	(MAP_USIM_ADDR+USIM_CONF5_REG_OFFSET)
#define USIM_USIMIT_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMIT_OFFSET)
#define USIM_USIMDRX_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMDRX_OFFSET)
#define USIM_USIMDTX_REG_ADDR  	(MAP_USIM_ADDR+USIM_USIMDTX_OFFSET)


//***********************************************************************/
//USIM_USIMCMD Register 
/***********************************************************************/
/*typedef union
{
	U16 Data;
	struct
	{
    	U16  	 CMDIFRST :1;
       	U16      CMDSTOP :1;
       	U16      CMDSTART :1;
       	U16      MODULE_CLK_EN :1;
       	U16      WARM_RESET_CMD :1;
       	U16      CLOCK_STOP_CMD :1;
       	U16      STOP_EMV_ATR_LENGTH_TIMER :1;	
      	U16      Reserved :9;
    }Bits;
}USIMCMD_REG_STRUCT;
#define USIM_USIMCMD_REG     (*(USIMCMD_REG_STRUCT*)(USIM_USIMCMD_REG_ADDR))
*/


//***********************************************************************/
//USIM_USIMSTAT Register 
/***********************************************************************/
/*typedef union
{
	U16 Data;
	struct
	{
    	U16  	 Reserved :1;
       	U16      STATXPAR :1;
       	U16      STATLRC :1;
       	U16      CONFCODCONV :1;
       	U16      X_MODE :1;
       	U16      Reserved :11;
    }Bits;
}USIMSTAT_REG_STRUCT;
#define USIM_USIMSTAT_REG     (*(USIMSTAT_REG_STRUCT*)(USIM_USIMSTAT_REG_ADDR))
*/
#define USIM_USIMCMD_REG 			REG16(USIM_USIMCMD_REG_ADDR)
#define USIM_USIMSTAT_REG  			REG16(USIM_USIMSTAT_REG_ADDR)
#define USIM_USIMCONF1_REG  		REG16(USIM_USIMCONF1_REG_ADDR)
#define USIM_USIMCONF2_REG 		 	REG16(USIM_USIMCONF2_REG_ADDR)
#define USIM_USIMCONF3_REG  		REG16(USIM_USIMCONF3_REG_ADDR)
#define USIM_USIMMASK_IT_REG	  	REG16(USIM_USIMMASK_IT_REG_ADDR)
#define USIM_USIMFIFOS_REG  		REG16(USIM_USIMFIFOS_REG_ADDR)
#define USIM_USIMCGT_REG  			REG16(USIM_USIMCGT_REG_ADDR)
#define USIM_USIMCWT_REG 		 	REG16(USIM_USIMCWT_REG_ADDR)
#define USIM_USIMBWT_LSB_REG  		REG16(USIM_USIMBWT_LSB_REG_ADDR)
#define USIM_USIMBWT_MSB_REG  		REG16(USIM_USIMBWT_MSB_REG_ADDR)
#define USIM_DEBUG_REG  			REG16(USIM_DEBUG_REG_ADDR)
#define USIM_CONF_SAM1_DIV_REG  	REG16(USIM_CONF_SAM1_DIV_REG_ADDR)
#define USIM_CONF4_REG  			REG16(USIM_CONF4_REG_ADDR)
#define USIM_ATR_CLK_PRD_NBS_REG  	REG16(USIM_ATR_CLK_PRD_NBS_REG_ADDR)
#define USIM_CONF_ETU_DIV_REG  		REG16(USIM_CONF_ETU_DIV_REG_ADDR)
#define USIM_CONF5_REG  			REG16(USIM_CONF5_REG_ADDR)
#define USIM_USIMIT_REG		  	REG16(USIM_USIMIT_REG_ADDR)
#define USIM_USIMDRX_REG		  	REG16(USIM_USIMDRX_REG_ADDR)
#define USIM_USIMDTX_REG		  	REG16(USIM_USIMDTX_REG_ADDR)


//Prototypes declaration
void USIM_TestResetValue(void);
void USIM_TestRegistersAccess(void);
void USIM_InthProcess();

#endif