fm_tea5761.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

/*------------------------------------------------------------------------------
Philip TEA5760 TEST SOFTWARE


Main Function : Frequency SET, Seek Frequency
                Freq(7600~10800) = freq_pll_value(0x2458~0x339b)
                
                freq_pll_value=(4*(Freq*10000+225000)/32768);
                Freq=((freq_pll_value-9304)*8192+75993368)/10000;
                
------------------------------------------------------------------------------*/
#include "UART_IrDA.h"
#include "mem.h"
#include "FM_TEA5761.h"
#include "msi2c.h"
#include "global_types.h"
#include "mapping.h"
#include "triton_mapping.h"

extern UWORD16 AbbDeviceAddress ;


 UWORD8 Write_buffer[7];
 int Read_buffer[16];
 UWORD8  ReadData[16];

#define LIMIT_CYCLENUMB 500
void TEA5761_test(void)
{

 AbbDeviceAddress = 0x11 ;
 /* I2c interface initialization */
  MSI2C_InitConnectionGPIO();
GPIO_direction_output(gpio_18,1);
gpio_dataout_high(1,18);

Init_TEA5761();
delay_ms(15);
freq_set(8800);
freq_set(8800);
freq_set(8800);
freq_set(8800);
freq_set(8800);
freq_set(8800);
Triton_Amp_open();

}


void Init_TEA5761(void)
{
	int number,i;
  	Write_buffer[0]=0x00;	//INTREG	7Bit:X,		6bit:X,		5bit:X,		4bit:X,  
          					//INTREG	3(IFMSK):0,	2(LEVMSK):0,1(FRMSK):0, 0(BLMSK):0

    Write_buffer[1]=0x2b;	//FRQSET	7(SUD):0,	6(SM):0,	5(FR_13):1,	4(FR_12):0
							//FRQSET	3(FR_11):1,	2(FR_10):0,	1(FR_09):0,	0(FR_08):1
							//FRQ_HIGH_BYTE

    Write_buffer[2]=0xed;	//FRQSET	7(FR_07):1,	6(FR_06):1,	5(FR_05):0,	4(FR_04):1
							//FRQSET	3(FR_03):1,	2(FR_02):0,	1(FR_01):1,	0(FR_00):1
							//FRQ_LOW_BYTE
							//BASE-->MBCFM4U 

    Write_buffer[3]=0x40;	//TNCTRL	7:X,		6(PUPD_0):1,5(BLIM):0,	4(SWPM):0	
							//TNCTRL	3(IFCTC):0,	2(AFM):0,	1(SMUTE):0, 0(SNC):0

	Write_buffer[4]=0x10;	//TNCTRL	7(MU):0,	6(SSL_1):0,	5(SSL_0):0,	4(HLSI):1	
							//TNCTRL	3(MST):0,	2(SWP):0,	1(DTC):0,	0(AHLSI):0

	Write_buffer[5]=0x00;	//TESTREG	7(LHM):0,	6(RHM):0,	5:X,		4(LHSW):0	
							//TESTREG	3(TRIGFR):0,2(LDX):0,	1(RFAGC):0,	0(INTCTRL):0

    Write_buffer[6]=0x00;



    MSI2C_MasterPollingSendFM (TEA5761_I2C_adress,Write_buffer,7);
while(1)
{
	number = 16;

 		MSI2C_MasterPollingReceiveFM(TEA5761_I2C_adress,number);
		UART_Printf(UART2, "\r\n");
		UART_Printf(UART2,"REGISTER Value in TEA5760 is [%d]:  \r\n", number);
		for(i=0;i<number;i++)
		{
			UART_Printf(UART2,"ReadData[%d]=0x%x ",i,ReadData[i]);
			if(i%5==0)
			UART_Printf(UART2, "\r\n");
		}

 		if( ReadData[14]==0x57 && ReadData[15]==0x60)
			UART_Printf(UART2,"REGISTER Value is Right!  \r\n");
		else
			UART_Printf(UART2,"REGISTER Value is Error!   \r\n");
 }

}

void freq_set(UWORD16 Freq )
{
unsigned long fi;
unsigned short freq_pll_value;
fi=Freq*10000;
freq_pll_value = (int)(4*(fi+225000)/32768);
Write_buffer[1]=freq_pll_value>>8;
Write_buffer[2]=freq_pll_value&0xff;
Write_buffer[3]=0x40;    
if (Freq<8800) Write_buffer[3] |=0x20;
Write_buffer[4]=0x70;

 MSI2C_MasterPollingSendFM ( TEA5761_I2C_adress ,Write_buffer,7);
 MSI2C_MasterPollingReceiveFM(TEA5761_I2C_adress,12 );
 
}

/*
void Seek_Freq(void)
{unsigned short Freq;
Freq = 8800;


freq_set(Freq);

}
*/



void delay_ms(UWORD8 milisec)
{
    int i,j;
    for(i=0;i<milisec;i++)
    {
    for(j=0;j<100;j++)
	;
    }
}




///////////////////////////////////////////////////////////////////////////
void MSI2C_MasterPollingSendFM ( UWORD8 device_adress,
				  UWORD8  *data_array8,UWORD8 data_number)
{
  UWORD16 msi2c_stat_save;
  UWORD16 data16[4];
  UWORD16 wait,i,j;
  
 
 i=0;

  data16[0] = ( ((UWORD16 )data_array8[0]) | (((UWORD16 )data_array8[1])<<8));
  data16[1] = ( ((UWORD16 )data_array8[2]) | (((UWORD16 )data_array8[3])<<8));
  data16[2] = ( ((UWORD16 )data_array8[4]) | (((UWORD16 )data_array8[5])<<8));
  data16[3] =  ((UWORD16 )data_array8[6]);	 
  //configure the number of data to send
  MSI2C_CNT(MSI2C_1_BASE_ADDR_ARM)= 7;

  //configure slave_adress
  MSI2C_SAR(MSI2C_1_BASE_ADDR_ARM)= device_adress;

  wait = 0;
  
  //wait for bus free
  while(   (wait < LIMIT_CYCLENUMB) &&  ( MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & MSI2C_STAT_BB_MASK))
  {
    wait++;
  } 

  // Start transmission 
  //configuration of i2c transmission : master , tranmit, no repeat, stop bit and start bit
  MSI2C_CON(MSI2C_1_BASE_ADDR_ARM) = 0x8603; //I2C_EN=1,BE = 0,STB= 0, MST = 1 , TRX = 1 , XA= 0 , RM = 0 , STP = 1, STT = 1


  wait = 0;
  while( wait < LIMIT_CYCLENUMB && (( MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & MSI2C_STAT_ARDY_MASK)!=MSI2C_STAT_ARDY_MASK) )
    {
      wait++;

	  for(i=0;i<4;i++)
	  	{
	//	while(( MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & 0x16) != 0x10);
	      	 while(( MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & MSI2C_STAT_NACK_MASK) != 0x00);
		  	 while ((MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & MSI2C_STAT_ARDY_MASK) != 0x00);
		     while ((MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & MSI2C_STAT_XRDY_MASK) != MSI2C_STAT_XRDY_MASK)
		     {
		     	if((MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & MSI2C_STAT_ARDY_MASK) == MSI2C_STAT_ARDY_MASK)
				{                  
	  				// End of transmission 
	  			MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) &= MSI2C_STAT_ARDY_MASK;
	  			return;          
				}
		    } 
			 MSI2C_DATA(MSI2C_1_BASE_ADDR_ARM) = data16[i];
		     MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) &= MSI2C_STAT_XRDY_MASK;
     		if((MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & MSI2C_STAT_ARDY_MASK) == MSI2C_STAT_ARDY_MASK)
			{                  
	  		// End of transmission 
	  		MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) &= MSI2C_STAT_ARDY_MASK;
	  		return;          
			}
		}
	//	for(j=0;j<100;j++);

	
    }  // while
	  MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) &= MSI2C_STAT_ARDY_MASK;

}
//---------------------------------------------------------------------
// NAME        : MSI2C_MasterPollingReceiveAbb
//
// DESCRIPTION :  data read of one data (for 8 bits register) from Abb
//
// PARAMETERS  : UWORD8 register_adress : 7bit slave device adress (NOTE : Fill MSB bits with 0)
//              
//
// RETURN VALUE: data read
//               Error
//
// LIMITATIONS : None
//---------------------------------------------------------------------

 
void MSI2C_MasterPollingReceiveFM(UWORD8 device_adress,UWORD8 data_number)
{
 
	UWORD16 data16;
	UWORD16 wait,i;
	i=0;
  	wait = 0;
	for(i=0;i<16;i++)
	{
		ReadData[i] = 0;
	}

	//data_number 
	MSI2C_CNT(MSI2C_1_BASE_ADDR_ARM)= data_number;
	MSI2C_SAR(MSI2C_1_BASE_ADDR_ARM) = device_adress;
/////ahuo add

	while((MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & 0x1000) == 0x1000);
  //configuration of i2c transmission : master , Receive, no repeat, stop bit and start bit
  MSI2C_CON(MSI2C_1_BASE_ADDR_ARM) = 0x8403; //I2C_EN=1,BE = 0,STB= 0, MST = 1 , TRX = 0 , XA= 0 , RM = 0 , STP = 1, STT = 1


  while( (wait < LIMIT_CYCLENUMB) &&  ((MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM)& MSI2C_STAT_ARDY_MASK) != MSI2C_STAT_ARDY_MASK ) )
    {
      wait++;

	  for(i=0;i<data_number/2;i++)
	  	{
	  //    	while ((MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & 0x0e) != 0x08);
	      	while ((MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & MSI2C_STAT_NACK_MASK) != 0x00);
			while ((MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & MSI2C_STAT_ARDY_MASK) != 0x00 );
		    while ((MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & MSI2C_STAT_RRDY_MASK) == 0x00)
			{
				if((MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) & MSI2C_STAT_ARDY_MASK) == MSI2C_STAT_ARDY_MASK)
				{                  
	  				// End of transmission 
	  			MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) &= MSI2C_STAT_ARDY_MASK;
	  			return;          
				}
			
			}
			data16 = MSI2C_DATA(MSI2C_1_BASE_ADDR_ARM);
			ReadData[i*2]=data16 & 0x00ff;

			ReadData[i*2+1]=(data16 & 0xff00)>>8;
			
			 //Clear RRDY bit
			 MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) &= MSI2C_STAT_RRDY_MASK;
		}
    }  // while

  // End of transmission 
  MSI2C_STAT(MSI2C_1_BASE_ADDR_ARM) &= MSI2C_STAT_ARDY_MASK;
//  return(ReadData);
} 








void GPIO_direction_output(UWORD8 gpio_num,UWORD8 level)
{
int temp1,temp2;

temp1=gpio_num/32;
temp2=gpio_num-temp1*32;

switch(temp1)
{case 0:
   *(unsigned int *)0xfffbe434 &= ~(0x00000001<<temp2);
    if( level=1)
	{*(unsigned int *)0xfffbe43c |= 0x00000100<<temp2;}
    if(level=0)
    	{*(unsigned int *)0xfffbe43c &= ~(0x00000001<<temp2);}
   break;
   case 1:
  *(unsigned int *)0xfffbec34 &= ~(0x00000001<<temp2);
    if( level=1)
	{*(unsigned int *)0xfffbec3c |= 0x00000001<<temp2;}
    if(level=0)
    	{*(unsigned int *)0xfffbec3c &= ~(0x00000001<<temp2);}	
  break; 	


}


}









void Triton_Amp_open(void)
{
  Triton_Audio_Outputs_Charge_Settings(AUDIO_CARKIT_CHARGE_AUTO, AUDIO_AUXO_CHARGE_AUTO, AUDIO_EAR_CHARGE_AUTO, AUDIO_HSO_CHARGE_AUTO);
  Triton_PLL_Settings(AUDIO_STEREO_PLL_POWER_OFF, AUDIO_STEREO_PLL_SPEEDUP_INACTIVE, AUDIO_VOICE_PLL_POWER_ON);
  Triton_Analog_Settings(AUDIO_VMID_1_35V, AUDIO_VMID_LOW_PASS_RC_FILTER_RESISTANCE_NOT_BYPASSED, AUDIO_MIC_BIAS_2V, AUDIO_MIC_BIAS_ACTIVE);
 
  Triton_Audio_Outputs_Enabling_And_Mixing (AUDIO_HF_VOICE_SPEECH_AND_FM_MONO, AUDIO_CAR_KIT_NONE, AUDIO_AUXO_NONE, AUDIO_EAR_NONE, AUDIO_HSOL_NONE, AUDIO_HSOR_NONE);
  Triton_Audio_Inputs_Selection(0x01);
  Triton_Voice_Filter_Bypass_Settings(AUDIO_WHOLE_VOICE_DOWNLINK_FILTER_BYPASSED);
  Triton_Voice_Speech_Path_Settings(AUDIO_VCK_BURST_MODE, AUDIO_VCK_FREQ_2MHz_WIDE_BAND);
//  Triton_Audio_Outputs_OPEN_SPK();
  Triton_Voice_Gain_Settings(AUDIO_VOICE_DOWNLINK_VOLUME_0dB, AUDIO_VOICE_DOWNLINK_DIG_GAIN_6, AUDIO_VOICE_DOWNLINK_DIG_GAIN_6, AUDIO_VOICE_SIDETONE__5);
//  Triton_Voice_Gain_Settings(AUDIO_VOICE_DOWNLINK_VOLUME__12dB, AUDIO_VOICE_DOWNLINK_DIG_GAIN__6, AUDIO_VOICE_UPLINK_DIG_GAIN__6, AUDIO_VOICE_SIDETONE__5);
  Triton_Audio_Power(AUDIO_STEREO_DOWNLINK_PATH_ENABLE, AUDIO_VOICE_UPLINK_PATH_ENABLE, AUDIO_VOICE_DOWNLINK_PATH_ENABLE);


}