crpm.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

CLKM13_ARM_RSTCT2_REG_RST_VALUE ^= reg_temp_long;
reg_temp_long = CLKM13_ARM_SYSST_REG;
CLKM13_ARM_SYSST_REG_RST_VALUE ^= reg_temp_long;
reg_temp_long = CLKM13_ARM_CKOUT1_REG;
CLKM13_ARM_CKOUT1_REG_RST_VALUE ^= reg_temp_long;
reg_temp_long = CLKM13_ARM_IDLECT3_REG;
CLKM13_ARM_IDLECT3_REG_RST_VALUE ^= reg_temp_long;
reg_temp_long = CLKM13_ARM_RETCTL_REG;
CLKM13_ARM_RETCTL_REG_RST_VALUE ^= reg_temp_long;

reg_temp_short = CLKM2_DSP_CKCTL_REG;
CLKM2_DSP_CKCTL_REG_RST_VALUE ^= reg_temp_short;
reg_temp_short = CLKM2_DSP_IDLECT1_REG;
CLKM2_DSP_IDLECT1_REG_RST_VALUE ^= reg_temp_short;
reg_temp_short = CLKM2_DSP_IDLECT2_REG;
CLKM2_DSP_IDLECT2_REG_RST_VALUE ^= reg_temp_short;
reg_temp_short = CLKM2_DSP_RSTCT2_REG;
CLKM2_DSP_RSTCT2_REG_RST_VALUE ^= reg_temp_short;
reg_temp_short = CLKM2_DSP_SYSST_REG;
CLKM2_DSP_SYSST_REG_RST_VALUE ^= reg_temp_short;

reg_temp_short = ADPLL1_REG0_REG;
ADPLL1_REG0_REG_RST_VALUE ^= reg_temp_short; //TI internal data[7:0]
ADPLL1_REG0_REG_RST_VALUE &= 0xff00;
reg_temp_short = ADPLL1_REG1_REG;
ADPLL1_REG1_REG_RST_VALUE ^= reg_temp_short;
reg_temp_short = ADPLL1_REG2_REG;
ADPLL1_REG2_REG_RST_VALUE ^= reg_temp_short;
reg_temp_short = ADPLL1_REG3_REG;
ADPLL1_REG3_REG_RST_VALUE ^= reg_temp_short;

UART_Initialize(UART2);

reg_temp_long = 0x00000000;
reg_temp_short = 0x0000;
UART_Printf(UART2, "\r\n");
if(ULPDR_COUNTER_32_LSB_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_COUNTER_32_LSB_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_COUNTER_32_MSB_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_COUNTER_32_MSB_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_COUNTER_HIGH_FREQ_LSB_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_COUNTER_HIGH_FREQ_LSB_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_COUNTER_HIGH_FREQ_MSB_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_COUNTER_HIGH_FREQ_MSB_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_GAUGING_CTRL_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_GAUGING_CTRL_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_IT_STATUS_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_IT_STATUS_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_SETUP_ULPD1_CELL2_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_SETUP_ULPD1_CELL2_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_SETUP_ULPD1_CELL3_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_SETUP_ULPD1_CELL3_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_SETUP_ULPD1_CELL4_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_SETUP_ULPD1_CELL4_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_SOFT_REQ_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_SOFT_REQ_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_STATUS_REQ_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_STATUS_REQ_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_SLEEP_STATUS_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_SLEEP_STATUS_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_APLL_CTRL_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_APLL_CTRL_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_PWR_CTRL_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_PWR_CTRL_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_SOFT_DISABLE_REQ_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_SOFT_DISABLE_REQ_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_RESET_STATUS_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_RESET_STATUS_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_REVISION_NUMBER_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_REVISION_NUMBER_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_CLK_IO_CTRL_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_CLK_IO_CTRL_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_ENA_MEMORY_RETENTION_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_ENA_MEMORY_RETENTION_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_INC_FRAC_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_INC_FRAC_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_INC_SIXTEENTH_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_INC_SIXTEENTH_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_SETUP_FRAME_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_SETUP_FRAME_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_GSM_TIMER_INIT_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_GSM_TIMER_INIT_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_GSM_TIMER_IT_STATUS_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_GSM_TIMER_IT_STATUS_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_GSM_TIMER_VALUE_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_GSM_TIMER_VALUE_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_GSM_TIMER_CTRL_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_GSM_TIMER_CTRL_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_CLOCK_GSM_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_CLOCK_GSM_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ULPDR_CLOCK_26M_CTRL_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ULPDR_CLOCK_26M_CTRL_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}

//if(CLKM13_ARM_CKCTL_REG_RST_VALUE != 0x00000000)
if((CLKM13_ARM_CKCTL_REG_RST_VALUE & 0x00001111) != 0x00000000)
{
  UART_Printf(UART2, "CLKM13_ARM_CKCTL_REG has a changed reset value!  \r\n");
  reg_temp_long = 0x11111111;
}
//if(CLKM13_ARM_IDLECT1_REG_RST_VALUE != 0x00000000)
if((CLKM13_ARM_IDLECT1_REG_RST_VALUE & 0x00001111) != 0x00000000)
{
  UART_Printf(UART2, "CLKM13_ARM_IDLECT1_REG has a changed reset value!  \r\n");
  reg_temp_long = 0x11111111;
}
//if(CLKM13_ARM_IDLECT2_REG_RST_VALUE != 0x00000000)
if((CLKM13_ARM_IDLECT2_REG_RST_VALUE & 0x00001111) != 0x00000000)
{
  UART_Printf(UART2, "CLKM13_ARM_IDLECT2_REG has a changed reset value!  \r\n");
  reg_temp_long = 0x11111111;
}
//if(CLKM13_ARM_EWUPCT_REG_RST_VALUE != 0x00000000)
if((CLKM13_ARM_EWUPCT_REG_RST_VALUE & 0x00001111) != 0x00000000)
{
  UART_Printf(UART2, "CLKM13_ARM_EWUPCT_REG has a changed reset value!  \r\n");
  reg_temp_long = 0x11111111;
}
//if(CLKM13_ARM_RSTCT1_REG_RST_VALUE != 0x00000000)
if((CLKM13_ARM_RSTCT1_REG_RST_VALUE & 0x00001111) != 0x00000000)
{
  UART_Printf(UART2, "CLKM13_ARM_RSTCT1_REG has a changed reset value!  \r\n");
  reg_temp_long = 0x11111111;
}
//if(CLKM13_ARM_RSTCT2_REG_RST_VALUE != 0x00000000)
if((CLKM13_ARM_RSTCT2_REG_RST_VALUE & 0x00001111) != 0x00000000)
{
  UART_Printf(UART2, "CLKM13_ARM_RSTCT2_REG has a changed reset value!  \r\n");
  reg_temp_long = 0x11111111;
}
//if(CLKM13_ARM_SYSST_REG_RST_VALUE != 0x00000000)
if((CLKM13_ARM_SYSST_REG_RST_VALUE & 0x00001111) != 0x00000000)
{
  UART_Printf(UART2, "CLKM13_ARM_SYSST_REG has a changed reset value!  \r\n");
  reg_temp_long = 0x11111111;
}
//if(CLKM13_ARM_CKOUT1_REG_RST_VALUE != 0x00000000)
if((CLKM13_ARM_CKOUT1_REG_RST_VALUE & 0x00001111) != 0x00000000)
{
  UART_Printf(UART2, "CLKM13_ARM_CKOUT1_REG has a changed reset value!  \r\n");
  reg_temp_long = 0x11111111;
}
//if(CLKM13_ARM_IDLECT3_REG_RST_VALUE != 0x00000000)
if((CLKM13_ARM_IDLECT3_REG_RST_VALUE & 0x00001111) != 0x00000000)
{
  UART_Printf(UART2, "CLKM13_ARM_IDLECT3_REG has a changed reset value!  \r\n");
  reg_temp_long = 0x11111111;
}
//if(CLKM13_ARM_RETCTL_REG_RST_VALUE != 0x00000000)
if((CLKM13_ARM_RETCTL_REG_RST_VALUE & 0x00001111) != 0x00000000)
{
  UART_Printf(UART2, "CLKM13_ARM_RETCTL_REG has a changed reset value!  \r\n");
  reg_temp_long = 0x11111111;
}

if(CLKM2_DSP_CKCTL_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "CLKM2_DSP_CKCTL_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(CLKM2_DSP_IDLECT1_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "CLKM2_DSP_IDLECT1_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(CLKM2_DSP_IDLECT2_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "CLKM2_DSP_IDLECT2_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(CLKM2_DSP_RSTCT2_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "CLKM2_DSP_RSTCT2_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(CLKM2_DSP_SYSST_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "CLKM2_DSP_SYSST_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}

if(ADPLL1_REG0_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ADPLL1_REG0_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ADPLL1_REG1_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ADPLL1_REG1_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ADPLL1_REG2_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ADPLL1_REG2_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}
if(ADPLL1_REG3_REG_RST_VALUE != 0x0000)
{
  UART_Printf(UART2, "ADPLL1_REG3_REG has a changed reset value!  \r\n");
  reg_temp_short = 0x1111;
}

if((reg_temp_long == 0x00000000) && (reg_temp_short == 0x0000))
  UART_Printf(UART2, "All CRPM registers have right values!  \r\n");
}