📄 uart.c
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//=====================================================================//
// company: COMMIT Incorporated //
// department: HW //
// author: LiYuan //
// version: 1.0 //
// create date: 09/13/2005 //
// release date: //
// final revise date: //
// reviser: //
// file descript: //
//=====================================================================//
#include <stdarg.h>
#include "UART_IrDA.h"
#include "CRPM.h"
#include "config.h"
#include "inter_connect.h"
//=====================================================================//
//UART initialize //
//=====================================================================//
void UART_Initialize(int dev_num)
{
UART_IOMultiplex(dev_num);
UART_Open(dev_num);
UART_Configure(dev_num);
}
//=====================================================================//
//IO multiplex //
//=====================================================================//
void UART_IOMultiplex(int dev_num)
{
switch(dev_num)
{
case UART1:
break;
case UART2:
Pin_Configure(CONF_UART2_RX_REG_Addr, PIN_PULLNO, PIN_MODE0);
Pin_Configure(CONF_UART2_TX_REG_Addr, PIN_PULLNO, PIN_MODE0);
break;
case UART3:
/*
Pin_Configure(CONF_MMC1_DAT0_REG_Addr, PIN_PULLNO, PIN_MODE2);
Pin_Configure(CONF_MMC1_DAT1_REG_Addr, PIN_PULLNO, PIN_MODE2);
Pin_Configure(CONF_MMC1_DAT2_REG_Addr, PIN_PULLNO, PIN_MODE2);
Pin_Configure(CONF_MMC1_DAT3_REG_Addr, PIN_PULLNO, PIN_MODE1);
*/
Pin_Configure(CONF_UART3_RX_REG_Addr, PIN_PULLNO, PIN_MODE0);
Pin_Configure(CONF_UART3_TX_REG_Addr, PIN_PULLNO, PIN_MODE0);
Pin_Configure(CONF_UART3_CTS_REG_Addr, PIN_PULLNO, PIN_MODE0);
Pin_Configure(CONF_UART3_RTS_REG_Addr, PIN_PULLNO, PIN_MODE0);
break;
default:
break;
}
}
//=====================================================================//
//UART open //
//=====================================================================//
void UART_Open(int dev_num)
{
unsigned char reg_temp;
reg_temp = CLKM13_ARM_IDLECT2_REG;
if((reg_temp & 0x0004) == 0) //ARM_PERCK not enable
CLKM13_ARM_IDLECT2_REG |= 0x0004; //enable ARM_PERCK
reg_temp = CLKM13_ARM_RSTCT2_REG;
if((reg_temp & 0x0001) == 0) //MPU peripherals not enable
CLKM13_ARM_RSTCT2_REG |= 0x0001; //enables MPU peripherals
//enable the UART hardware clock request
switch(dev_num)
{
case UART1:
ULPDR_SOFT_REQ_REG |= 0x0020;
OCP_UART1_SSW_MPU_CONF_REG |= 0x0001;
break;
case UART2:
ULPDR_SOFT_REQ_REG |= 0x0040;
OCP_UART2_SSW_MPU_CONF_REG |= 0x0001;
break;
case UART3:
ULPDR_SOFT_REQ_REG |= 0x0080;
OCP_UART3_SSW_MPU_CONF_REG |= 0x0001;
break;
default:
break;
}
}
//=====================================================================//
//UART close //
//=====================================================================//
void UART_Close(int dev_num)
{
//disable the UART hardware clock request
switch(dev_num)
{
case UART1:
ULPDR_SOFT_REQ_REG &= ~0x0020;
break;
case UART2:
ULPDR_SOFT_REQ_REG &= ~0x0040;
break;
case UART3:
ULPDR_SOFT_REQ_REG &= ~0x0080;
break;
default:
break;
}
}
//=====================================================================//
//UART configure //
//=====================================================================//
void UART_Configure(int dev_num)
{
UART_LCR_REG(dev_num) = 0xbf; //first write to the LCR register
UART_EFR_REG(dev_num) |= 0x10; //when LCR = 0xbf enable the enhanced feature register
UART_LCR_REG(dev_num) &= ~0x80; //here, access to IER and MCR is allowed
UART_IER_REG(dev_num) = 0x00; //disable interrupt
//UART_IER_REG(dev_num) = 0x02; //open RHR and THR interrupt
UART_MCR_REG(dev_num) = 0x00; //force control signals inactive
UART_LCR_REG(dev_num) &= ~0x40; //here, UART breaks are removed
UART_MDR1_REG(dev_num) |= 0x07; //here, UART is in reset or disabled
UART_CharLenConfigure(dev_num, CHAR_LEN_8BITS);
UART_StopBitConfigure(dev_num, STOP_BIT_1);
UART_ParityConfigure(dev_num, PARITY_NO);
UART_BaudRateConfigure(dev_num, BAUD_RATE_921600, UART_AUTO_BAUD_OFF);
UART_FIFOConfigure(dev_num, UART_FIFO_OFF);
UART_DMAConfigure(dev_num, UART_DMA_OFF);
UART_FlowCtrlConfigure(dev_num, UART_FLOW_CTRL_AUTO);
}
//=====================================================================//
//character lengch //
//=====================================================================//
void UART_CharLenConfigure(int dev_num, int char_len)
{
switch(char_len)
{
case CHAR_LEN_5BITS:
break;
case CHAR_LEN_6BITS:
UART_LCR_REG(dev_num) |= 0x1;
break;
case CHAR_LEN_7BITS:
UART_LCR_REG(dev_num) |= 0x2;
break;
case CHAR_LEN_8BITS:
UART_LCR_REG(dev_num) |= 0x3;
break;
default:
UART_LCR_REG(dev_num) |= 0x3;
break;
}
}
//=====================================================================//
//stop bit //
//=====================================================================//
void UART_StopBitConfigure(int dev_num, int stop_bit)
{
switch(stop_bit)
{
case STOP_BIT_1:
break;
case STOP_BIT_1P5OR2:
UART_LCR_REG(dev_num) |= 0x4;
break;
default:
break;
}
}
//=====================================================================//
//parity //
//=====================================================================//
void UART_ParityConfigure(int dev_num, int parity)
{
switch(parity)
{
case PARITY_NO:
break;
case PARITY_ODD:
UART_LCR_REG(dev_num) |= 0x8;
break;
case PARITY_EVEN:
UART_LCR_REG(dev_num) |= 0x18;
break;
case PARITY_FORCED_0:
UART_LCR_REG(dev_num) |= 0x38;
break;
case PARITY_FORCED_1:
UART_LCR_REG(dev_num) |= 0x28;
break;
default:
break;
}
}
//=====================================================================//
//baud_rate //
//=====================================================================//
void UART_BaudRateConfigure(int dev_num, int baud_rate, int auto_baud)
{
UART_LCR_REG(dev_num) |= 0x80;
switch(baud_rate)
{
case BAUD_RATE_300:
UART_DLH_REG(dev_num) |= 0x27;
UART_DLL_REG(dev_num) |= 0x10;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_600:
UART_DLH_REG(dev_num) |= 0x13;
UART_DLL_REG(dev_num) |= 0x88;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_1200:
UART_DLH_REG(dev_num) |= 0x09;
UART_DLL_REG(dev_num) |= 0xc4;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_2400:
UART_DLH_REG(dev_num) |= 0x04;
UART_DLL_REG(dev_num) |= 0xe2;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_4800:
UART_DLH_REG(dev_num) |= 0x02;
UART_DLL_REG(dev_num) |= 0x71;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_9600:
UART_DLH_REG(dev_num) |= 0x01;
UART_DLL_REG(dev_num) |= 0x38;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_14400:
UART_DLH_REG(dev_num) |= 0x00;
UART_DLL_REG(dev_num) |= 0xd0;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_19200:
UART_DLH_REG(dev_num) |= 0x00;
UART_DLL_REG(dev_num) |= 0x9c;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_28800:
UART_DLH_REG(dev_num) |= 0x00;
UART_DLL_REG(dev_num) |= 0x68;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_38400:
UART_DLH_REG(dev_num) |= 0x00;
UART_DLL_REG(dev_num) |= 0x4e;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_57600:
UART_DLH_REG(dev_num) |= 0x00;
UART_DLL_REG(dev_num) |= 0x34;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_115200:
UART_DLH_REG(dev_num) |= 0x00;
UART_DLL_REG(dev_num) |= 0x1a;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_230400:
UART_DLH_REG(dev_num) |= 0x00;
UART_DLL_REG(dev_num) |= 0x0d;
UART_MDR1_REG(dev_num) &= ~0x07;
break;
case BAUD_RATE_460800:
UART_DLH_REG(dev_num) |= 0x00;
UART_DLL_REG(dev_num) |= 0x08;
UART_MDR1_REG(dev_num) &= ~0x04;
UART_MDR1_REG(dev_num) |= 0x03;
break;
case BAUD_RATE_921600:
UART_DLH_REG(dev_num) |= 0x00;
UART_DLL_REG(dev_num) |= 0x04;
UART_MDR1_REG(dev_num) &= ~0x04;
UART_MDR1_REG(dev_num) |= 0x03;
break;
case BAUD_RATE_1834200:
UART_DLH_REG(dev_num) |= 0x00;
UART_DLL_REG(dev_num) |= 0x02;
UART_MDR1_REG(dev_num) &= ~0x04;
UART_MDR1_REG(dev_num) |= 0x03;
break;
case BAUD_RATE_3686400:
UART_DLH_REG(dev_num) |= 0x00;
UART_DLL_REG(dev_num) |= 0x01;
UART_MDR1_REG(dev_num) &= ~0x04;
UART_MDR1_REG(dev_num) |= 0x03;
break;
default:
UART_DLH_REG(dev_num) |= 0x00;
UART_DLL_REG(dev_num) |= 0x1a;
UART_MDR1_REG(dev_num) &= ~0x04;
UART_MDR1_REG(dev_num) |= 0x03;
break;
}
UART_LCR_REG(dev_num) &= ~0x80;
switch(auto_baud)
{
case UART_AUTO_BAUD_OFF:
break;
case UART_AUTO_BAUD_ON:
UART_MDR1_REG(dev_num) &= ~0x07;
UART_MDR1_REG(dev_num) |= 0x02;
default:
break;
}
}
//=====================================================================//
//FIFO configuration //
//=====================================================================//
void UART_FIFOConfigure(int dev_num, int FIFO)
{
switch(FIFO)
{
case UART_FIFO_OFF:
UART_FCR_REG(dev_num) &= ~0x01;
break;
case UART_FIFO_ON:
UART_LCR_REG(dev_num) = 0xBF; //LCR = 0xbf
UART_EFR_REG(dev_num) |= 0x10; //EFR[4] = 1
UART_LCR_REG(dev_num) |= 0x80; //LCR[7] = 0
UART_MCR_REG(dev_num) |= 0x40; //MCR[6] = 1
UART_TCR_REG(dev_num) |= 0x88; //set TCR
UART_TLR_REG(dev_num) |= 0x88; //set TLR
UART_FCR_REG(dev_num) |= 0x01; //FCR[0] = 1
UART_LCR_REG(dev_num) = 0xBF; //LCR = 0xbf
UART_EFR_REG(dev_num) |= 0x10; //EFR[4] = 0
UART_LCR_REG(dev_num) |= 0x80; //LCR[7] = 0
UART_MCR_REG(dev_num) &= ~0x40; //MCR[6] = 0
break;
default:
UART_FCR_REG(dev_num) &= ~0x01;
break;
}
FIFO_status = FIFO;
}
//=====================================================================//
//DMA configuration //
//=====================================================================//
void UART_DMAConfigure(int dev_num, int DMA)
{
switch(DMA)
{
case UART_DMA_OFF:
break;
case UART_DMA_ON:
break;
default:
break;
}
DMA_status = DMA;
}
//=====================================================================//
//flow control configuration //
//=====================================================================//
void UART_FlowCtrlConfigure(int dev_num, int flow_ctrl)
{
switch(flow_ctrl)
{
case UART_FLOW_CTRL_OFF:
break;
case UART_FLOW_CTRL_SW:
break;
case UART_FLOW_CTRL_AUTO:
UART_EFR_REG(dev_num) |= 0xd0;
break;
default:
break;
}
}
//=====================================================================//
//UART transmit //
//=====================================================================//
void UART_Transmit(int dev_num, char *data)
{
int length = 0;
int i = 0;
while(data[length] != '\0')
length++;
if(FIFO_status == UART_FIFO_OFF && DMA_status == UART_DMA_OFF)
{
UART_LCR_REG(dev_num) &= 0x7f;
for(i = 0; i<length; i++)
{
UART_THR_REG(dev_num) = data[i];
while((UART_LSR_REG(dev_num) & 0x40) == 0); //wait for transmit shift register empty
}
}
else if(FIFO_status == UART_FIFO_ON && DMA_status == UART_DMA_OFF)
;
else if(FIFO_status == UART_FIFO_OFF && DMA_status == UART_DMA_ON)
;
else if(FIFO_status == UART_FIFO_ON && DMA_status == UART_DMA_ON)
;
}
//=====================================================================//
//UART receive //
//=====================================================================//
char *UART_Receive(int dev_num)
{
int i = 0;
static char data[256];
if(FIFO_status == UART_FIFO_OFF && DMA_status == UART_DMA_OFF)
{
UART_LCR_REG(dev_num) &= 0x7f;
UART_MCR_REG(dev_num) |= 0x02; //active the RTS pin to permit receiving
do
{
while((UART_LSR_REG(dev_num) & 0x01) == 0); //wait for data in
data[i] = UART_RHR_REG(dev_num);
i++;
}
while((data[i-1] != '\n') && (data[i-1] != '\r'));
UART_MCR_REG(dev_num) &= ~0x2; //disable external transferring
}
else if(FIFO_status == UART_FIFO_ON && DMA_status == UART_DMA_OFF)
;
else if(FIFO_status == UART_FIFO_OFF && DMA_status == UART_DMA_ON)
;
else if(FIFO_status == UART_FIFO_ON && DMA_status == UART_DMA_ON)
;
return data;
}
//=====================================================================//
//UART Printf //
//=====================================================================//
void UART_Printf(int dev_num, char *data, ...)
{
char data_temp[256];
va_list _ap;
va_start(_ap, data);
vsprintf(data_temp, data, _ap);
UART_Transmit(dev_num, data_temp);
va_end(_ap);
}
//=====================================================================//
//UART get number //
//=====================================================================//
int UART_GetNum(int dev_num)
{
char *data;
unsigned int number = 0;
int i =0;
data = UART_Receive(dev_num);
while(data[i] != '\n' && data[i] != '\r')
{
if((data[0] == '0') && ((data[1] == 'x') || (data[1] == 'X')))
{
if((data[i] >= '0') && (data[i] <= '9'))
number = (int)(data[i] - 0x30) + number * 16;
else if((data[i] >= 'a') && (data[i] <= 'f'))
number = (int)(data[i] - 0x57) + number * 16;
else if((data[i] >= 'A') && (data[i] <= 'F'))
number = (int)(data[i] - 0x37) + number * 16;
}
else
{
if((data[i] >= '0') && (data[i] <= '9'))
number = (int)(data[i] - 0x30) + number * 10;
}
i++;
}
return number;
}
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