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📄 flash_nor_intel_br28f128l18t8501.c

📁 OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器
💻 C
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/******************************************************************************\
*           Copyright (C) 2005 COMMIT Incorporated.
*                           All Rights Reserved
*------------------------------------------------------------------------------
* Project................NEPTUNE Test 
* MODULE NAME............NEPTUNE Memory Test interface on Poseidon
* Confidential Level.....Test    
* FILENAME...............flash_nor_intel.c			
* 
* Department.............HW Circuit 
*------------------------------------------------------------------------------
* HISTORY:
* Oct 14st, 2005, created by Zhenghongying for Poseidon Memory Intel BR28F128L18T85 test module
\******************************************************************************/


#include "flash_nor_intel.H"
#include "led_bootled.h"



/*-----------------------------------------------------
 * GROUP 	: System Validation
 * Name		: flash_erase_test_a9
 * return valu : Flase if succeed
				 True if failed
*-----------------------------------------------------*/
static WORD16 flash_erase_test_a9_zhy(UWORD32 flash_size_in_bytes)
{
    unsigned short Result = 0;
    unsigned short writeNum;
    unsigned int write_address;

    write_address  = 0x0e000000;     //for new nor flash TYAX 16MBYTE.
	 

    /* program the 64kword blocks */
    for (writeNum=0; writeNum </* INTEL_STRATA_FLASH_L18_256Mb_NB_BLOCK_64KW */127; writeNum++) {
      
        /* Unlock the written block */
    	if (flash_intel_28f256l18top_unlock_one_block(write_address)) {
		    UART_Printf(UART2,"\n\r Unlock Failed \n\r");
		    Result = -1;
		    break;
	    }

        /* Erase the block */
   	    if (flash_intel_28f256l18top_erase_one_block(write_address)) {
	       UART_Printf(UART2,"\n\r Erase Failed \n\r");
	       Result = -1;
	       break;
	    }

	    write_address += INTEL_STRATA_FLASH_L18_BLOCK_SIZE_64KW;
	}

    /* program the 16kW blocks */
    for (writeNum=0; writeNum < INTEL_STRATA_FLASH_L18_256Mb_NB_BLOCK_16KW ; writeNum++) {

        /* If an error occured, break the loop */
        if (Result) 
        break;
       
        /* Unlock the written block */
    	if (flash_intel_28f256l18top_unlock_one_block(write_address)) {
		    UART_Printf(UART2," \n\r Unlock Failed \n\r");
		    Result = -1;
		    break;
	    }

        /* Erase the block */
   	    if (flash_intel_28f256l18top_erase_one_block(write_address)) {
	       UART_Printf(UART2,"\n\r Erase Failed \n\r");
	       Result = -1;
	       break;
	    }
        /* Update adress of the written block */
	    write_address += INTEL_STRATA_FLASH_L18_BLOCK_SIZE_16KW;
	}

    return Result;    
}

 extern UWORD16 Read_FlashRegister(UWORD32 Address1, UWORD16 Data1, UWORD32 Address2);


 UWORD16 Read_FlashRegister(UWORD32 Address1,UWORD16 Data1, UWORD32 Address2)
 {
 UWORD16 status;
 int i;
 
 *(unsigned int *)Address1 = Data1;
 for(i=0;i<10;i++);
 status = *(unsigned int *)Address2;
 return status;
 /* End */
 }



      
 /* ----------------------------------------------------------------------
 * GROUP       : System Validation
 *
 * NAME        : flash_intel_28f256l18top_read_id
 *
 * DESCRIPTION : 
 *
 * PARAMETERS  : 
 *
 * RETURN VALUE: None
 *
 * LIMITATIONS : None
 * ---------------------------------------------------------------------- */
void flash_intel_28f256l18top_read_id(UWORD32 Flash_base_address,UWORD32 * ManufactureId, UWORD32 * DeviceId)
{
    /* Read the value of the manufacturer id  */
    *ManufactureId = Read_FlashRegister(Flash_base_address,(UWORD16)FPAIR_READIDCODES,Flash_base_address);
    /* Read the value of the device id  */
    *DeviceId = Read_FlashRegister(Flash_base_address,(UWORD16)FPAIR_READIDCODES,(Flash_base_address+2));

   
    return;
}
/* ----------------------------------------------------------------------
 * GROUP       : System Validation
 *
 * NAME        : flash_intel_28f256l18top_display_id_a9
 * DESCRIPTION : 
 *
 * PARAMETERS  : None
 * RETURN VALUE: 0 if succeed
 *               other  if failed
 *
 * LIMITATIONS : None
 * ---------------------------------------------------------------------- */
WORD16 flash_intel_28f256l18top_display_id_a9(void)
{
    UWORD16 reg_val;
    UWORD32 ManufactureId;
    UWORD32 DeviceId;
    
    /* Read Manufactre Id and Device Id */ 
	UART_Printf(UART2,"Identify Flash Intel:\n\r");
	flash_intel_28f256l18top_read_id(INTEL_STRATA_FLASH_L18_ADDRESS , &ManufactureId, &DeviceId);

	/* Display Manufacture Id */
	UART_Printf(UART2,"0X%x\n\r",ManufactureId);

	


	/* Display Device Id */
    UART_Printf(UART2,"0X%x\n\r",DeviceId);



	
    
    return 0;    
}



void    Write_FlashRegister(UWORD32 Address1, UWORD16 Data1, UWORD32 Address2, UWORD16 Data2)
{
	*(int *)Address1 = Data1;
	*(int *)Address2 = Data2;
	return;
}

//******************************************************************************************
//Function name: Flash_WriteOneBlock( unsigned int )
//Function     : Write data 0x55aa to 0x0c000000 block
//Parameter    : unsigned int blockAddr
//return       : bool variable to indicate if the op successful.
//Flow         : 1.clear status register each time, 2.send the write command.3. send value.
//               4.addr + 2; 5,read a vlaue from 0x0c00ffff, compare with 0x55aa.addr-2
//******************************************************************************************
unsigned int Flash_WriteOneBlock( unsigned int blockAddr )
{
	unsigned int i=0;
	unsigned int delayTime = 0;

  unsigned short writeResult = 0;
  unsigned int   errNum      = 0;
  unsigned int   readValue   = 0;
  unsigned int oneBlockSize = 0xf;
  unsigned int writeAddr = 0x0c000000;
  if (flash_intel_28f256l18top_unlock_one_block(writeAddr)) {
		    UART_Printf(UART2,"\n\r Unlock Failed \n\r");
		    
		   
			}
  for(i=0; i < oneBlockSize; i++ )
  {
  if (flash_intel_28f256l18top_unlock_one_block(writeAddr)) {
		    UART_Printf(UART2,"\n\r Unlock Failed \n\r");
			}
  *(unsigned short*)writeAddr = 0x50;                //clear the status register for new command.
  *(unsigned short*)writeAddr = 0x40;                //send write command for intel series.
  *(unsigned short*)writeAddr = 0x55aa;              //write a data to 0x0c000000;
  
  writeAddr += 2;

}
  *(unsigned short*)0x0c000000 = 0xff;
  
  errNum = 0;
  writeAddr = 0x0c000000;
  for(i=0; i < oneBlockSize; i++ )
  {
	for(delayTime=0;delayTime<1000;delayTime++);
    readValue = *(unsigned short*)(writeAddr);
	if( readValue != 0x55aa )
	{
	   errNum++;
	}
    writeAddr += 2;
  }
if( errNum == 0 )
return 0;
else
return errNum;
}

//******************************************************************************************
//Function Name:Flash_WriteOnePartion( unsigned int )
//Function    : write 0x55aa to one partion from 0x0c000000
//Parameter   : unsigned int partionAddr
//return      : bool variable to indicate if the op successful.
//*******************************************************************************************

unsigned int Flash_WriteOnePartion( unsigned partionAddr )
{
   return 0;


}


/* ----------------------------------------------------------------------------
 * NAME        : flash_unlock_one_block
 *               
 * DESCRIPTION : Unlock the block memory which contains the address specified
 *               
 * SYNOPSYS    : WORD16 flash_intel_28f256l18top_unlock_one_block(UWORD32 unlock_address)
 *               
 * PARAMETERS  : unlock_address  specify the block to unlock
 *               
 * RETURN VALUE: 0 if succeed
 *               other if fail
 *               
 * LIMITATIONS : MIf block must be initialized
 * 				  Authorize the flash write must be done in EMIF Interface 
 *					  by function MifSetWriteProtect(WRITE_AUTHORIZED);              
 * ---------------------------------------------------------------------------- */
WORD16 flash_intel_28f256l18top_unlock_one_block(UWORD32 unlock_address)
{
    WORD16 result = 0;
    volatile unsigned short status;

    /* Clear Status register */
    *((unsigned short *)unlock_address)  = 0x50;

   
    WriteFlashRegister(unlock_address,
                       INTEL_STRATA_FLASH_L18_LOCK_SETUP,
                       unlock_address,
                       INTEL_STRATA_FLASH_L18_UNLOCK_BLOCK);

    do {
        /* Read Status register */
        *((unsigned short *)unlock_address)  = 0x70;
       
        status=*((unsigned short*)unlock_address);
    }
    /* Wait until SR.7 is set to 1 (ready) */
    while( /*TestBit(status,FLASH_WSMS_READY_MASK)*/(status & 0x80)==FALSE );

   
    if ( status != FLASH_WSMS_READY_MASK) 
        result = -1;
    
  
    return result;
}

/* -------------------------------------------------------------------------
 * NAME        : flash_erase_one_block
 *               
 * DESCRIPTION : Erase the block memory which contains the address specified
 *               
 * SYNOPSYS    : WORD16 flash_intel_28f256l18top_erase_one_block(UWORD32 erase_address)
 *               
 * PARAMETERS  : erase_address  specify the block to erase
 *               
 * RETURN VALUE: 0 if succeed
 *               other if fail
 *               
 * LIMITATIONS : MIf block must be initialized
 * 				  Authorize the flash write must be done in EMIF Interface 
 *					  by function MifSetWriteProtect(WRITE_AUTHORIZED);              
 * ------------------------------------------------------------------------- */
WORD16 flash_intel_28f256l18top_erase_one_block(UWORD32 erase_address)
{
    WORD16 result = 0;
    volatile UWORD16 status;

    /* Clear Status register */
    *((unsigned short *)erase_address)  = 0x50;

    /* send erase command to flash */
    WriteFlashRegister(erase_address,FLASH_ERASEBLOCK,erase_address,FLASH_ERASEBLOCKCONFIRM);

    /* wait for device ready by polling status register */
    do {
        /* Read Status register */
        *((unsigned short *)erase_address)  = 0x70;
        
        status=*((unsigned short *)erase_address);
    }
    /* Wait until SR.7 is set to 1 (ready) */
    while( /*TestBit(status,FLASH_WSMS_READY_MASK)*/(status & 0x80)==FALSE );

    /* check status */
    if ( status != FLASH_WSMS_READY_MASK) 
        result = -1;
    
    /* end */
    return result;
}

WORD16 flash_intel_28f256l18top_erase_test_a9(void)
{
    WORD16 Result = 0;
    UWORD32 flash_size_in_bytes;    
  
        
    Result = flash_erase_test_a9_zhy(0x3fff);

    if (!Result)
    	UART_Printf(UART2,"\n\r Intel Strata Flash Linear test on all block succeed\n\r");
	else 
		UART_Printf(UART2,"\n\r NOR FLASH ERASE FAILED.\n\r");

    return(Result);    
}


//NOR FLASH MAIN ENTRY function

 void FLASH_TEST()
 { 

  	UWORD16 Result_Test = 0;
    int option;

//    EMIFS_CS_CFG_3_REG = 0x0040408B;
    *(unsigned int*)0xfffecc1c = 0x7fc044fa;
	*(unsigned int*)0xfffecc5c = 0x00000018;
    *(unsigned int*)0xfffecc0c = 0x00000001;       
  	UART_Printf(UART2,"==================================================\n");
  	UART_Printf(UART2,"=       NOR  Flash TEST             =\n");
  	UART_Printf(UART2,"==================================================\n");      
  
               
    
	UART_Printf(UART2," 1: Read ID\n\r");
	UART_Printf(UART2," 2: EARSE TEST.\n\r");
	UART_Printf(UART2," 3: Program A BLOCK.\n\r ");
	UART_Printf(UART2," 4: WRITE A PARTION.\n\r ");


	UART_Printf(UART2," Your choice : \n\r");

    option=UART_GetNum(UART2);


    switch (option)
      {
     

      case 1 : 
	    
	    UART_Printf(UART2,"Read ID:\n\r");
		
	    flash_intel_28f256l18top_display_id_a9();
		     
		break ;

   
     case 2: 
	 UART_Printf(UART2,"Erase NOR FLASH D1 in mode 3 ...\n\r");
	 
	 flash_intel_28f256l18top_erase_test_a9();
	  
	  break ;

    case 3:

    Result_Test=Flash_WriteOneBlock( 0x0e000000 );
	if ( Result_Test==0 )
	UART_Printf( UART2, " WR OK.\n\r " );
    break;

    case 4:
    Flash_WriteOnePartion( 0x0e000000 );
    break;

	default:
	break;
	  
	  }
    	
   	UART_GetNum(UART2);     
  } 




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