config.c

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C
570 行
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12
//=====================================================================//
//        company:               COMMIT Incorporated                   //
//        department:            HW                                    //
//        author:                LiYuan                                //
//        version:               1.0                                   //
//        create date:           10/21/2005                            //
//        release date:                                                //
//        final revise date:                                           //
//        reviser:                                                     //
//        file descript:                                               //
//=====================================================================//
#include "mapping.h"
#include  "config.h"
#include "UART_IrDA.h"
//=====================================================================//
//pin configure                                                        //
//=====================================================================//


 void ConfigurePin(void)
{
  	//Pin configuration
  //	SetField32(CONFIGURATION_COMP_MODE_CTRL_0, CONF_MUX_EN_R, 0x0);   // set all IO in Mode 0		
    CONF_COMP_MODE_CTRL_0_REG = 0x00000000;

		//channel 0 (multiplex)--------dspdma_dma_req_0: DSP DMA_REQ_01: MCSI1 TX  	
  	CONF_GDMA_REQ_SEL0_REG = 0x0; 

	//McBSP1 configure   
	//CONF_MOD_CONF_CTRL_0_REG |= (1<<19); //MCBSP1 6 pins
	CONF_MOD_CONF_CTRL_0_REG &= ~(1<<19); //MCBSP1 4 pins
	CONF_MOD_CONF_CTRL_0_REG |= (1<<18); //CK_DPLL1OUT is selected
	//CONF_MOD_CONF_CTRL_0_REG &= ~(1<<18); //mcbsp1_clks input signal is selected
	//CONF_MOD_CONF_CTRL_0_REG |= (1<<14); //1: ARMPER_CK is selected.
	CONF_MOD_CONF_CTRL_0_REG &= ~(1<<14); //0: ARMXOR_CK is selected.
	 //1.TSP MODULE PIN CONFIGUTAION
	//TSP_ACT2(B13)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_TSP_ACT2_OFFSET,MODE0);   // TSP_ACT2
	
	//2.GPIO MODULE PIN CONFIGURATION
	//GPIO_2 as VIKING CORE ENABLE(J15)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_2_OFFSET,MODE0);       
	
	//GPIO_4 as BlueTooth Control signal(U19)/I2C reset
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_4_OFFSET,MODE0);       
	
	//GPIO_6 as VMOD(V20)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_6_OFFSET,MODE0);  
	
	//GPIO_7 as SubFrame_INT(K14)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_TE_OFFSET,MODE1); 
	#ifndef FM_TEST
	//GPIO8 as ELCD_NCS1(W17)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_8_OFFSET,MODE1);
	#else
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_8_OFFSET,MODE0);
	#endif

	//GPIO_9 as on/off of VIKINGII backup(V16)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_9_OFFSET,MODE0); 
	
	//GPIO_10 as float(V16)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_10_OFFSET,MODE0); 
	
	//GPIO_12 as POWOK(G9)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_12_OFFSET,MODE0); 
	
	//GPIO_13 as MUC_INT(Y18)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_13_OFFSET,MODE0);

	//GPIO_16 as float(V17)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_16_OFFSET,MODE0); 
	
	//GPIO_17 as IRQ_ASY(H10)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_17_OFFSET,MODE0); 
	
//	#ifndef FM_TEST
	//GPIO_18 as SPI_nCS3(V19)
//	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_18_OFFSET,MODE4);    
//	#else
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_18_OFFSET,MODE0);    
//	#endif
		
	//GPIO_19 as EMIFS_nCS1(AA12)/I2C INT
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_19_OFFSET,MODE1); 

	//GPIO_32 as DPRAM_INT of VIKINGII(G12)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_32_OFFSET,MODE0);  

	//GPIO_3 as float(C3)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_TEST_NEMU1_OFFSET,MODE2); 
	
	//GPIO_46 as wake_ack of VIKINGII(B12)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_46_OFFSET,MODE0);
	
	//GPIO_47 as GPI_RD_REQ of VIKINGII.(G13)
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_47_OFFSET,MODE0); 
	
	//GPIO_58
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MISC_EXT_IRQ_OFFSET,MODE1);    // gpio_58 as P1_INT2(H12)
	
	//3. McBSP1 MODUEL PIN CONFIGURATION
	// McBsp1_fsx
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MCBSP1_FSX_OFFSET, MODE0);          
	IO_CONFIGURATION_CONF_MCBSP1_FSX |= 0x18;	//PULL UP ENABLE
	
	//Mcbsp1_clkx
	IO_CONFIGURATION_CONF_MCBSP1_CLKX |= 0x18; //PULL UP ENABLE
	
	//Mcbsp1_din
  	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MCBSP1_DIN_OFFSET,MODE0);                        
	IO_CONFIGURATION_CONF_MCBSP1_DIN |= 0x18; //PULL UP ENABLE
	
	
	//4.MCSI1 as BlueTooth
	//MCSI1_DIN
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MCSI1_DIN_OFFSET,MODE0);

	//MCSI1_DOUT
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MCSI1_DOUT_OFFSET,MODE0);	

	//MCSI1_BCLK
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MCSI1_BCLK_OFFSET,MODE0);

	//MCSI1_SYNC
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MCSI1_SYNC_OFFSET,MODE0);

  	//5. MCSI2 MODULE PIN CONFIGUTATION
	//MCSI2_DIN
  	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MCSI2_DIN_OFFSET, MODE0); 

	//6. SPI MODUEL PIN CONFIGURATION
	//SPI_CLK
  	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_SPI_CLK_OFFSET, MODE0); 
	
	//SPI_DATA_MISO
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_SPI_DATA_MISO_OFFSET, MODE0); 
	
	//SPI_DATA_MOSI
 	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_SPI_DATA_MOSI_OFFSET, MODE0);
	
	//SPI_NCS0
 	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_SPI_NCS0_OFFSET, MODE0);

	//7. USB0/UART1 PIN CONFIGURATION
	//USB_0_DAT
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_USB_0_DAT_OFFSET,MODE0);

	//USB_0_SE0
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_USB_0_SE0_OFFSET,MODE0);

	//USB_0_RCV
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_USB_0_RCV_OFFSET,MODE0);

	//USB_0_TXEN
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_USB_0_TXEN_OFFSET,MODE0);

	//8. UART2 MODULE PIN CONFIGURATION
	//UART2_RX
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_UART2_RX_OFFSET,MODE0);

	//UART2_TX
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_UART2_TX_OFFSET,MODE0);

	//9. UART3 MODULE PIN CONFIGURATION
	//UART3_RX
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_UART3_RX_OFFSET,MODE0);

	//UART3_TX
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_UART3_TX_OFFSET,MODE0);

	//UART3_CTS
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_UART3_CTS_OFFSET,MODE0);

	//UART3_RTS
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_UART3_RTS_OFFSET,MODE0);

	//10. MMC MODULE NOT USED
	//MMC1_DAT0
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MMC1_DAT0_OFFSET,MODE0);

	//MMC1_DAT1
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MMC1_DAT1_OFFSET,MODE0);

	//MMC1_DAT2
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MMC1_DAT2_OFFSET,MODE0);

	//MMC1_DAT3
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MMC1_DAT3_OFFSET,MODE0);

	//MMC1_CLK
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_MMC1_CLK_OFFSET,MODE0);

	//11. CAMERA MODULE NOT USED
	//CAM_D_8
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_D_8_OFFSET,MODE0);

	//CAM_D_9
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_D_9_OFFSET,MODE0);

	//CAM_D_10
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_D_10_OFFSET,MODE0);

	//CAM_D_11
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_D_11_OFFSET,MODE0);

	//CAM_D_4
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_D_4_OFFSET,MODE0);

	//CAM_D_5
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_D_5_OFFSET,MODE0);

	//CAM_D_6
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_D_6_OFFSET,MODE0);

	//CAM_D_7
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_D_7_OFFSET,MODE0);

	//CAM_HS
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_HS_OFFSET,MODE0);

	//CAM_VS
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_VS_OFFSET,MODE0);

	//CAM_LCLK
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_LCLK_OFFSET,MODE0);

	//CAM_XCLK
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_CAM_XCLK_OFFSET,MODE0);

	//12. ELCD MODULE PIN CONFIGURATION
	//ELCD_DATA_0
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_0_OFFSET,MODE0);
	
	//ELCD_DATA_1
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_1_OFFSET,MODE0);

	//ELCD_DATA_2
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_2_OFFSET,MODE0);
	
	//ELCD_DATA_3
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_3_OFFSET,MODE0);
	
	//ELCD_DATA_4
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_4_OFFSET,MODE0);
	
	//ELCD_DATA_5
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_5_OFFSET,MODE0);
	
	//ELCD_DATA_6
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_6_OFFSET,MODE0);
	
	//ELCD_DATA_7
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_7_OFFSET,MODE0);
	
	//ELCD_DATA_8
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_8_OFFSET,MODE0);
	
	//ELCD_DATA_9
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_9_OFFSET,MODE0);
	
	//ELCD_DATA_10
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_10_OFFSET,MODE0);
	
	//ELCD_DATA_11
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_11_OFFSET,MODE0);
	
	//ELCD_DATA_12
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_12_OFFSET,MODE0);
	
	//ELCD_DATA_13
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_13_OFFSET,MODE0);
	
	//ELCD_DATA_14
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_14_OFFSET,MODE0);
	
	//ELCD_DATA_15
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_15_OFFSET,MODE0);
	
	//ELCD_DATA_16
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_16_OFFSET,MODE3);
	CONFIG_SetPullUp(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_16_OFFSET);
	//ELCD_DATA_17
	CONFIG_SetModePin(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_ELCD_DATA_17_OFFSET,MODE0);
12

config.c - 源码说明

本页面展示了「OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器」中的 config.c 源码文件，采用 C语言 编程语言编写，共 570 行代码。您可以在线阅读完整代码内容，也可以返回资源详情页下载完整源码包进行本地学习和开发。

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