📄 flash_nor_intel_br28f128l18t85.asm

📁 OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器
💻 ASM
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;* --------------------------------------------------------------------------*
	.dwcfa	0x0e, 0
	.dwcfa	0x09, 26, 14
        STMFD     SP!, {A3, A4, LR}
	.dwcfa	0x0e, 4
	.dwcfa	0x80, 14, 1
	.dwcfa	0x0e, 8
	.dwcfa	0x80, 3, 2
	.dwcfa	0x0e, 12
	.dwcfa	0x80, 2, 3
	.dwcfa	0x0e, 12
;* A1    assigned to _unlock_address
DW$85	.dwtag  DW_TAG_formal_parameter, DW_AT_name("unlock_address"), DW_AT_symbol_name("_unlock_address")
	.dwattr DW$85, DW_AT_type(*DW$T$28)
	.dwattr DW$85, DW_AT_location[DW_OP_reg0]
DW$86	.dwtag  DW_TAG_variable, DW_AT_name("unlock_address"), DW_AT_symbol_name("_unlock_address")
	.dwattr DW$86, DW_AT_type(*DW$T$28)
	.dwattr DW$86, DW_AT_location[DW_OP_breg13 0]
DW$87	.dwtag  DW_TAG_variable, DW_AT_name("result"), DW_AT_symbol_name("_result")
	.dwattr DW$87, DW_AT_type(*DW$T$37)
	.dwattr DW$87, DW_AT_location[DW_OP_breg13 4]
DW$88	.dwtag  DW_TAG_variable, DW_AT_name("status"), DW_AT_symbol_name("_status")
	.dwattr DW$88, DW_AT_type(*DW$T$48)
	.dwattr DW$88, DW_AT_location[DW_OP_breg13 6]
        STR       A1, [SP, #0]          ; |265| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",266,12
        MOV       V9, #0                ; |266| 
        STRH      V9, [SP, #4]          ; |266| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",270,5
        MOV       A1, #80               ; |270| 
        LDR       V9, [SP, #0]          ; |270| 
        STRH      A1, [V9, #0]          ; |270| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",273,5
        MOV       A2, #96               ; |273| 
        MOV       A4, #208              ; |273| 
        LDR       A3, [SP, #0]          ; |273| 
        LDR       A1, [SP, #0]          ; |273| 
        BL        _WriteFlashRegister_I ; |273| 
        ; |273| 
;* --------------------------------------------------------------------------*
;*   BEGIN LOOP L22
;*
;*   Loop source line                : 278
;*   Loop closing brace source line  : 283
;*   Known Minimum Trip Count        : 1
;*   Known Maximum Trip Count        : 4294967295
;*   Known Max Trip Count Factor     : 1
;* --------------------------------------------------------------------------*
L22:    
DW$L$_flash_intel_28f256l18top_unlock_one_block$2$B:
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",280,9
        MOV       A1, #112              ; |280| 
        LDR       V9, [SP, #0]          ; |280| 
        STRH      A1, [V9, #0]          ; |280| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",282,9
        LDR       V9, [SP, #0]          ; |282| 
        LDRH      V9, [V9, #0]          ; |282| 
        STRH      V9, [SP, #6]          ; |282| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",285,53
        LDRH      V9, [SP, #6]          ; |285| 
        TST       V9, #128              ; |285| 
        BEQ       L22                   ; |285| 
        ; |285| 
DW$L$_flash_intel_28f256l18top_unlock_one_block$2$E:
;* --------------------------------------------------------------------------*
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",288,5
        LDRH      V9, [SP, #6]          ; |288| 
        CMP       V9, #128              ; |288| 
        BEQ       L23                   ; |288| 
        ; |288| 
;* --------------------------------------------------------------------------*
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",289,9
        MVN       V9, #0                ; |289| 
        STRH      V9, [SP, #4]          ; |289| 
;* --------------------------------------------------------------------------*
L23:    
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",292,5
        LDRSH     A1, [SP, #4]          ; |292| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",293,1
	.dwcfa	0x0e, 12
        LDMFD     SP!, {A3, A4, PC}

DW$89	.dwtag  DW_TAG_loop
	.dwattr DW$89, DW_AT_name("D:\src\boston_board_test\ARM\arm_src\flash_NOR_INTEL_BR28F128L18T85.asm:L22:1:1214374287")
	.dwattr DW$89, DW_AT_begin_file("flash_NOR_INTEL_BR28F128L18T85.c")
	.dwattr DW$89, DW_AT_begin_line(0x116)
	.dwattr DW$89, DW_AT_end_line(0x11d)
DW$90	.dwtag  DW_TAG_loop_range
	.dwattr DW$90, DW_AT_low_pc(DW$L$_flash_intel_28f256l18top_unlock_one_block$2$B)
	.dwattr DW$90, DW_AT_high_pc(DW$L$_flash_intel_28f256l18top_unlock_one_block$2$E)
	.dwendtag DW$89

	.dwattr DW$84, DW_AT_end_file("flash_NOR_INTEL_BR28F128L18T85.c")
	.dwattr DW$84, DW_AT_end_line(0x125)
	.dwattr DW$84, DW_AT_end_column(0x01)
	.dwendentry
	.dwendtag DW$84

;******************************************************************************
;* STRINGS                                                                    *
;******************************************************************************
	.sect	".text"
	.align	4
SL3:	.string	" ",10,13," Unlock Failed ",10,13,0
	.sect	".text"
	.align	4
	.clink
	.armfunc _flash_intel_28f256l18top_erase_one_block
	.state32
	.global	_flash_intel_28f256l18top_erase_one_block

DW$91	.dwtag  DW_TAG_subprogram, DW_AT_name("flash_intel_28f256l18top_erase_one_block"), DW_AT_symbol_name("_flash_intel_28f256l18top_erase_one_block")
	.dwattr DW$91, DW_AT_low_pc(_flash_intel_28f256l18top_erase_one_block)
	.dwattr DW$91, DW_AT_high_pc(0x00)
	.dwattr DW$91, DW_AT_begin_file("flash_NOR_INTEL_BR28F128L18T85.c")
	.dwattr DW$91, DW_AT_begin_line(0x137)
	.dwattr DW$91, DW_AT_begin_column(0x08)
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",312,1

	.dwfde DW$CIE

;*****************************************************************************
;* FUNCTION NAME: flash_intel_28f256l18top_erase_one_block                   *
;*                                                                           *
;*   Regs Modified     : A1,A2,A3,A4,V9,SP,LR,SR                             *
;*   Regs Used         : A1,A2,A3,A4,V9,SP,LR,SR                             *
;*   Local Frame Size  : 0 Args + 8 Auto + 4 Save = 12 byte                  *
;*****************************************************************************
_flash_intel_28f256l18top_erase_one_block:
;* --------------------------------------------------------------------------*
	.dwcfa	0x0e, 0
	.dwcfa	0x09, 26, 14
        STMFD     SP!, {A3, A4, LR}
	.dwcfa	0x0e, 4
	.dwcfa	0x80, 14, 1
	.dwcfa	0x0e, 8
	.dwcfa	0x80, 3, 2
	.dwcfa	0x0e, 12
	.dwcfa	0x80, 2, 3
	.dwcfa	0x0e, 12
;* A1    assigned to _erase_address
DW$92	.dwtag  DW_TAG_formal_parameter, DW_AT_name("erase_address"), DW_AT_symbol_name("_erase_address")
	.dwattr DW$92, DW_AT_type(*DW$T$28)
	.dwattr DW$92, DW_AT_location[DW_OP_reg0]
DW$93	.dwtag  DW_TAG_variable, DW_AT_name("erase_address"), DW_AT_symbol_name("_erase_address")
	.dwattr DW$93, DW_AT_type(*DW$T$28)
	.dwattr DW$93, DW_AT_location[DW_OP_breg13 0]
DW$94	.dwtag  DW_TAG_variable, DW_AT_name("result"), DW_AT_symbol_name("_result")
	.dwattr DW$94, DW_AT_type(*DW$T$37)
	.dwattr DW$94, DW_AT_location[DW_OP_breg13 4]
DW$95	.dwtag  DW_TAG_variable, DW_AT_name("status"), DW_AT_symbol_name("_status")
	.dwattr DW$95, DW_AT_type(*DW$T$44)
	.dwattr DW$95, DW_AT_location[DW_OP_breg13 6]
        STR       A1, [SP, #0]          ; |312| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",313,12
        MOV       V9, #0                ; |313| 
        STRH      V9, [SP, #4]          ; |313| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",317,5
        MOV       A1, #80               ; |317| 
        LDR       V9, [SP, #0]          ; |317| 
        STRH      A1, [V9, #0]          ; |317| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",320,5
        MOV       A2, #32               ; |320| 
        MOV       A4, #208              ; |320| 
        LDR       A3, [SP, #0]          ; |320| 
        LDR       A1, [SP, #0]          ; |320| 
        BL        _WriteFlashRegister_I ; |320| 
        ; |320| 
;* --------------------------------------------------------------------------*
;*   BEGIN LOOP L24
;*
;*   Loop source line                : 323
;*   Loop closing brace source line  : 328
;*   Known Minimum Trip Count        : 1
;*   Known Maximum Trip Count        : 4294967295
;*   Known Max Trip Count Factor     : 1
;* --------------------------------------------------------------------------*
L24:    
DW$L$_flash_intel_28f256l18top_erase_one_block$2$B:
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",325,9
        MOV       A1, #112              ; |325| 
        LDR       V9, [SP, #0]          ; |325| 
        STRH      A1, [V9, #0]          ; |325| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",327,9
        LDR       V9, [SP, #0]          ; |327| 
        LDRH      V9, [V9, #0]          ; |327| 
        STRH      V9, [SP, #6]          ; |327| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",330,53
        LDRH      V9, [SP, #6]          ; |330| 
        TST       V9, #128              ; |330| 
        BEQ       L24                   ; |330| 
        ; |330| 
DW$L$_flash_intel_28f256l18top_erase_one_block$2$E:
;* --------------------------------------------------------------------------*
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",333,5
        LDRH      V9, [SP, #6]          ; |333| 
        CMP       V9, #128              ; |333| 
        BEQ       L25                   ; |333| 
        ; |333| 
;* --------------------------------------------------------------------------*
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",334,9
        MVN       V9, #0                ; |334| 
        STRH      V9, [SP, #4]          ; |334| 
;* --------------------------------------------------------------------------*
L25:    
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",337,5
        LDRSH     A1, [SP, #4]          ; |337| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",338,1
	.dwcfa	0x0e, 12
        LDMFD     SP!, {A3, A4, PC}

DW$96	.dwtag  DW_TAG_loop
	.dwattr DW$96, DW_AT_name("D:\src\boston_board_test\ARM\arm_src\flash_NOR_INTEL_BR28F128L18T85.asm:L24:1:1214374287")
	.dwattr DW$96, DW_AT_begin_file("flash_NOR_INTEL_BR28F128L18T85.c")
	.dwattr DW$96, DW_AT_begin_line(0x143)
	.dwattr DW$96, DW_AT_end_line(0x14a)
DW$97	.dwtag  DW_TAG_loop_range
	.dwattr DW$97, DW_AT_low_pc(DW$L$_flash_intel_28f256l18top_erase_one_block$2$B)
	.dwattr DW$97, DW_AT_high_pc(DW$L$_flash_intel_28f256l18top_erase_one_block$2$E)
	.dwendtag DW$96

	.dwattr DW$91, DW_AT_end_file("flash_NOR_INTEL_BR28F128L18T85.c")
	.dwattr DW$91, DW_AT_end_line(0x152)
	.dwattr DW$91, DW_AT_end_column(0x01)
	.dwendentry
	.dwendtag DW$91

	.sect	".text"
	.align	4
	.clink
	.armfunc _flash_intel_28f256l18top_erase_test_a9
	.state32
	.global	_flash_intel_28f256l18top_erase_test_a9

DW$98	.dwtag  DW_TAG_subprogram, DW_AT_name("flash_intel_28f256l18top_erase_test_a9"), DW_AT_symbol_name("_flash_intel_28f256l18top_erase_test_a9")
	.dwattr DW$98, DW_AT_low_pc(_flash_intel_28f256l18top_erase_test_a9)
	.dwattr DW$98, DW_AT_high_pc(0x00)
	.dwattr DW$98, DW_AT_begin_file("flash_NOR_INTEL_BR28F128L18T85.c")
	.dwattr DW$98, DW_AT_begin_line(0x154)
	.dwattr DW$98, DW_AT_begin_column(0x08)
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",341,1

	.dwfde DW$CIE

;*****************************************************************************
;* FUNCTION NAME: flash_intel_28f256l18top_erase_test_a9                     *
;*                                                                           *
;*   Regs Modified     : A1,A2,A3,A4,V9,SP,LR,SR                             *
;*   Regs Used         : A1,A2,A3,A4,V9,SP,LR,SR                             *
;*   Local Frame Size  : 0 Args + 4 Auto + 4 Save = 8 byte                   *
;*****************************************************************************
_flash_intel_28f256l18top_erase_test_a9:
;* --------------------------------------------------------------------------*
	.dwcfa	0x0e, 0
	.dwcfa	0x09, 26, 14
        STMFD     SP!, {A4, LR}
	.dwcfa	0x0e, 4
	.dwcfa	0x80, 14, 1
	.dwcfa	0x0e, 8
	.dwcfa	0x80, 3, 2
	.dwcfa	0x0e, 8
DW$99	.dwtag  DW_TAG_variable, DW_AT_name("Result"), DW_AT_symbol_name("_Result")
	.dwattr DW$99, DW_AT_type(*DW$T$37)
	.dwattr DW$99, DW_AT_location[DW_OP_breg13 0]
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",342,12
        MOV       V9, #0                ; |342| 
        STRH      V9, [SP, #0]          ; |342| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",346,5
        LDR       A1, CON7              ; |346| 
        BL        _flash_erase_test_a9_zhy ; |346| 
        ; |346| 
        STRH      A1, [SP, #0]          ; |346| 
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",348,5
        LDRSH     V9, [SP, #0]          ; |348| 
        CMP       V9, #0                ; |348| 
        BNE       L26                   ; |348| 
        ; |348| 
;* --------------------------------------------------------------------------*
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",349,6
        ADR       A2, SL6               ; |349| 
        MOV       A1, #1                ; |349| 
        BL        _UART_Printf          ; |349| 
        ; |349| 
        B         L27                   ; |349| 
        ; |349| 
;* --------------------------------------------------------------------------*
L26:    
	.dwpsn	"flash_NOR_INTEL_BR28F128L18T85.c",351
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