📄 memory_main.asm

📁 OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器
💻 ASM
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;******************************************************************************
;* TMS470 C/C++ Codegen                                             PC v4.1.4 *
;* Date/Time created: Wed Jun 25 14:11:54 2008                                *
;******************************************************************************
	.compiler_opts --abi=ti_arm9_abi --endian=little --float_support=fpalib --quiet --silicon_version=5e 
	.state32

DW$CU	.dwtag  DW_TAG_compile_unit
	.dwattr DW$CU, DW_AT_name("memory_main.c")
	.dwattr DW$CU, DW_AT_producer("TMS470 C/C++ Codegen PC v4.1.4 Copyright (c) 1996-2006 Texas Instruments Incorporated")
	.dwattr DW$CU, DW_AT_stmt_list(0x00)
	.dwattr DW$CU, DW_AT_TI_VERSION(0x01)

DW$1	.dwtag  DW_TAG_subprogram, DW_AT_name("UART_Printf"), DW_AT_symbol_name("_UART_Printf")
	.dwattr DW$1, DW_AT_declaration(0x01)
	.dwattr DW$1, DW_AT_external(0x01)
DW$2	.dwtag  DW_TAG_formal_parameter, DW_AT_type(*DW$T$10)
DW$3	.dwtag  DW_TAG_formal_parameter, DW_AT_type(*DW$T$20)
DW$4	.dwtag  DW_TAG_unspecified_parameters
	.dwendtag DW$1


DW$5	.dwtag  DW_TAG_subprogram, DW_AT_name("UART_GetNum"), DW_AT_symbol_name("_UART_GetNum")
	.dwattr DW$5, DW_AT_type(*DW$T$10)
	.dwattr DW$5, DW_AT_declaration(0x01)
	.dwattr DW$5, DW_AT_external(0x01)
DW$6	.dwtag  DW_TAG_formal_parameter, DW_AT_type(*DW$T$10)
	.dwendtag DW$5


DW$7	.dwtag  DW_TAG_subprogram, DW_AT_name("FLASH_TEST"), DW_AT_symbol_name("_FLASH_TEST")
	.dwattr DW$7, DW_AT_type(*DW$T$10)
	.dwattr DW$7, DW_AT_declaration(0x01)
	.dwattr DW$7, DW_AT_external(0x01)

DW$8	.dwtag  DW_TAG_subprogram, DW_AT_name("NAND_TEST"), DW_AT_symbol_name("_NAND_TEST")
	.dwattr DW$8, DW_AT_type(*DW$T$10)
	.dwattr DW$8, DW_AT_declaration(0x01)
	.dwattr DW$8, DW_AT_external(0x01)

DW$9	.dwtag  DW_TAG_subprogram, DW_AT_name("SearchForH3"), DW_AT_symbol_name("_SearchForH3")
	.dwattr DW$9, DW_AT_type(*DW$T$10)
	.dwattr DW$9, DW_AT_declaration(0x01)
	.dwattr DW$9, DW_AT_external(0x01)
;	C:\CCStudio_v3.3\tms470\cgtools\bin\acp470.exe -@C:\DOCUME~1\ADMINI~1\LOCALS~1\Temp\TI73612 
	.sect	".text"
	.align	4
	.clink
	.armfunc _memory_main
	.state32
	.global	_memory_main

DW$10	.dwtag  DW_TAG_subprogram, DW_AT_name("memory_main"), DW_AT_symbol_name("_memory_main")
	.dwattr DW$10, DW_AT_low_pc(_memory_main)
	.dwattr DW$10, DW_AT_high_pc(0x00)
	.dwattr DW$10, DW_AT_begin_file("memory_main.c")
	.dwattr DW$10, DW_AT_begin_line(0x0e)
	.dwattr DW$10, DW_AT_begin_column(0x06)
	.dwpsn	"memory_main.c",15,1

	.dwfde DW$CIE

;*****************************************************************************
;* FUNCTION NAME: memory_main                                                *
;*                                                                           *
;*   Regs Modified     : A1,A2,A3,A4,V9,SP,LR,SR                             *
;*   Regs Used         : A1,A2,A3,A4,V9,SP,LR,SR                             *
;*   Local Frame Size  : 0 Args + 8 Auto + 4 Save = 12 byte                  *
;*****************************************************************************
_memory_main:
;* --------------------------------------------------------------------------*
	.dwcfa	0x0e, 0
	.dwcfa	0x09, 26, 14
        STMFD     SP!, {A3, A4, LR}
	.dwcfa	0x0e, 4
	.dwcfa	0x80, 14, 1
	.dwcfa	0x0e, 8
	.dwcfa	0x80, 3, 2
	.dwcfa	0x0e, 12
	.dwcfa	0x80, 2, 3
	.dwcfa	0x0e, 12
DW$11	.dwtag  DW_TAG_variable, DW_AT_name("Result_Test"), DW_AT_symbol_name("_Result_Test")
	.dwattr DW$11, DW_AT_type(*DW$T$9)
	.dwattr DW$11, DW_AT_location[DW_OP_breg13 0]
DW$12	.dwtag  DW_TAG_variable, DW_AT_name("oPtion"), DW_AT_symbol_name("_oPtion")
	.dwattr DW$12, DW_AT_type(*DW$T$10)
	.dwattr DW$12, DW_AT_location[DW_OP_breg13 4]
	.dwpsn	"memory_main.c",17,18
        MOV       V9, #0                ; |17| 
        STRH      V9, [SP, #0]          ; |17| 
	.dwpsn	"memory_main.c",21,2
        LDR       V9, [SP, #4]          ; |21| 
        CMP       V9, #0                ; |21| 
        BEQ       L7                    ; |21| 
        ; |21| 
;* --------------------------------------------------------------------------*
;*   BEGIN LOOP L1
;*
;*   Loop source line                : 21
;*   Loop closing brace source line  : 57
;*   Known Minimum Trip Count        : 1
;*   Known Maximum Trip Count        : 4294967295
;*   Known Max Trip Count Factor     : 1
;* --------------------------------------------------------------------------*
L1:    
DW$L$_memory_main$2$B:
	.dwpsn	"memory_main.c",23,5
        ADR       A2, SL1               ; |23| 
        MOV       A1, #1                ; |23| 
        BL        _UART_Printf          ; |23| 
        ; |23| 
	.dwpsn	"memory_main.c",24,5
        ADR       A2, SL2               ; |24| 
        MOV       A1, #1                ; |24| 
        BL        _UART_Printf          ; |24| 
        ; |24| 
	.dwpsn	"memory_main.c",25,5
        ADR       A2, SL1               ; |25| 
        MOV       A1, #1                ; |25| 
        BL        _UART_Printf          ; |25| 
        ; |25| 
	.dwpsn	"memory_main.c",27,5
        ADR       A2, SL3               ; |27| 
        MOV       A1, #1                ; |27| 
        BL        _UART_Printf          ; |27| 
        ; |27| 
	.dwpsn	"memory_main.c",28,2
        ADR       A2, SL4               ; |28| 
        MOV       A1, #1                ; |28| 
        BL        _UART_Printf          ; |28| 
        ; |28| 
	.dwpsn	"memory_main.c",29,2
        ADR       A2, SL5               ; |29| 
        MOV       A1, #1                ; |29| 
        BL        _UART_Printf          ; |29| 
        ; |29| 
	.dwpsn	"memory_main.c",30,5
        ADR       A2, SL6               ; |30| 
        MOV       A1, #1                ; |30| 
        BL        _UART_Printf          ; |30| 
        ; |30| 
	.dwpsn	"memory_main.c",31,2
        ADR       A2, SL7               ; |31| 
        MOV       A1, #1                ; |31| 
        BL        _UART_Printf          ; |31| 
        ; |31| 
	.dwpsn	"memory_main.c",33,2
        ADR       A2, SL8               ; |33| 
        MOV       A1, #1                ; |33| 
        BL        _UART_Printf          ; |33| 
        ; |33| 
	.dwpsn	"memory_main.c",34,2
        MOV       A1, #1                ; |34| 
        BL        _UART_GetNum          ; |34| 
        ; |34| 
        STR       A1, [SP, #4]          ; |34| 
	.dwpsn	"memory_main.c",35,2
        MOV       A1, #1                ; |35| 
        ADR       A2, SL9               ; |35| 
        BL        _UART_Printf          ; |35| 
        ; |35| 
DW$L$_memory_main$2$E:
;* --------------------------------------------------------------------------*
DW$L$_memory_main$3$B:
	.dwpsn	"memory_main.c",36,2
        B         L5                    ; |36| 
        ; |36| 
DW$L$_memory_main$3$E:
;* --------------------------------------------------------------------------*
;* --------------------------------------------------------------------------*
L2:    
DW$L$_memory_main$5$B:
	.dwpsn	"memory_main.c",42,3
        BL        _FLASH_TEST           ; |42| 
        ; |42| 
	.dwpsn	"memory_main.c",43,8
        B         L6                    ; |43| 
        ; |43| 
DW$L$_memory_main$5$E:
;* --------------------------------------------------------------------------*
L3:    
DW$L$_memory_main$6$B:
	.dwpsn	"memory_main.c",46,3
        BL        _NAND_TEST            ; |46| 
        ; |46| 
	.dwpsn	"memory_main.c",47,8
        B         L6                    ; |47| 
        ; |47| 
DW$L$_memory_main$6$E:
;* --------------------------------------------------------------------------*
L4:    
DW$L$_memory_main$7$B:
	.dwpsn	"memory_main.c",49,3
        BL        _SearchForH3          ; |49| 
        ; |49| 
	.dwpsn	"memory_main.c",50,8
        B         L6                    ; |50| 
        ; |50| 
DW$L$_memory_main$7$E:
;* --------------------------------------------------------------------------*
;* --------------------------------------------------------------------------*
L5:    
DW$L$_memory_main$9$B:
	.dwpsn	"memory_main.c",36,2
        LDR       V9, [SP, #4]          ; |36| 
        CMP       V9, #0                ; |36| 
        BEQ       L6                    ; |36| 
        ; |36| 
DW$L$_memory_main$9$E:
;* --------------------------------------------------------------------------*
DW$L$_memory_main$10$B:
        SUBS      V9, V9, #1            ; |36| 
        BEQ       L2                    ; |36| 
        ; |36| 
DW$L$_memory_main$10$E:
;* --------------------------------------------------------------------------*
DW$L$_memory_main$11$B:
        SUBS      V9, V9, #1            ; |36| 
        BEQ       L3                    ; |36| 
        ; |36| 
DW$L$_memory_main$11$E:
;* --------------------------------------------------------------------------*
DW$L$_memory_main$12$B:
        SUBS      V9, V9, #1            ; |36| 
        BEQ       L4                    ; |36|
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