triton_voice_loop.c

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

  // DMA_CSDP
  flags = 0;
  SetGroupBits16(flags, DMA_TYPE_SIZE_POS, DMA_TYPE_SIZE_NUMB, DMA_TYPE_16_BITS);
  SetGroupBits16(flags, DMA_SRC_PORT_POS, DMA_SRC_PORT_NUMB, DMA_RHEA);
  SetGroupBits16(flags, DMA_DEST_PORT_POS, DMA_DEST_PORT_NUMB, DMA_RHEA);
  SetGroupBits16(flags, DMA_SRC_PACK_POS, DMA_SRC_PACK_NUMB, DMA_NO_PACKING);
  SetGroupBits16(flags, DMA_DEST_PACK_POS, DMA_DEST_PACK_NUMB, DMA_NO_PACKING);
  SetGroupBits16(flags, DMA_SRC_BURST_POS, DMA_SRC_BURST_NUMB, DMA_SINGLE_BURST);
  SetGroupBits16(flags, DMA_DEST_BURST_POS, DMA_DEST_BURST_NUMB, DMA_SINGLE_BURST);
  DMA_ACC(NO_GLOB_REG, DMA_CHANNEL_1, DMA_CSDP) = flags;


  // DMA_CCR
  flags = 0;
  SetGroupBits16(flags, DMA_SYNCNUMB_POS, DMA_SYNCNUMB_NUMB, MCBSP1_DMA_RX_DMAREQ); /* MCBSP_DIGITAL_RF_DMA_RX_DMAREQ_DSP */
  SetGroupBits16(flags, DMA_FS_POS, DMA_FS_NUMB, DMA_FRAME_SYNCHRONIZED);
  SetGroupBits16(flags, DMA_PRIORITY_POS, DMA_PRIORITY_NUMB, DMA_HIGH_PRIORITY);
  SetGroupBits16(flags, DMA_AUTOINIT_POS, DMA_AUTOINIT_NUMB, DMA_AUTOINIT_OFF);
  //SetGroupBits16(flags, 10, 1, 1);  /* omap_3.1_compatible_disable */
  SetGroupBits16(flags, DMA_SRC_AMODE_POS, DMA_SRC_AMODE_NUMB, DMA_ADD_DOUBINDEX);
  SetGroupBits16(flags, DMA_DEST_AMODE_POS, DMA_DEST_AMODE_NUMB, DMA_ADD_DOUBINDEX);
  DMA_ACC(NO_GLOB_REG, DMA_CHANNEL_1, DMA_CCR) = flags;


  // DMA_CICR
  flags = 0;
  SetGroupBits16(flags, DMA_TOUTIE_POS, DMA_TOUTIE_NUMB, ENABLE); // TimeoutIntEnable
  SetGroupBits16(flags, DMA_DROPIE_POS, DMA_DROPIE_NUMB, ENABLE); // DropIntEnable
  SetGroupBits16(flags, DMA_HALFIE_POS, DMA_HALFIE_NUMB, DISABLE); // HalfFrameIntDisable
  SetGroupBits16(flags, DMA_FRAMEIE_POS, DMA_FRAMEIE_NUMB, DISABLE); // FrameIntDisable
  SetGroupBits16(flags, DMA_LASTIE_POS, DMA_LASTIE_NUMB, DISABLE); // LastFrameIntDisable
  SetGroupBits16(flags, DMA_BLOCKIE_POS, DMA_BLOCKIE_NUMB, ENABLE); // BlockIntEnable
  DMA_ACC(NO_GLOB_REG, DMA_CHANNEL_1, DMA_CICR) = flags; 


  // DMA_CSSA_L
  DMA_ACC(NO_GLOB_REG, DMA_CHANNEL_1, DMA_CSSA_L) = ((UWORD32)&MCBSP1_MCBSP_DRR2_REG) & DMA_CSSA_L_MASK;

  // DMA_CSSA_U
  DMA_ACC(NO_GLOB_REG, DMA_CHANNEL_1, DMA_CSSA_U) = (((UWORD32)&MCBSP1_MCBSP_DRR2_REG) & DMA_CSSA_U_MASK) >> 16;

  // DMA_CDSA_L
  DMA_ACC(NO_GLOB_REG, DMA_CHANNEL_1, DMA_CDSA_L) = ((UWORD32)&MCBSP1_MCBSP_DXR2_REG) & DMA_CDSA_L_MASK;

  // DMA_CDSA_U
  DMA_ACC(NO_GLOB_REG, DMA_CHANNEL_1, DMA_CDSA_U) = (((UWORD32)&MCBSP1_MCBSP_DXR2_REG) & DMA_CDSA_U_MASK) >> 16;

  // DMA_CEN
  DMA_ACC(NO_GLOB_REG, DMA_CHANNEL_1, DMA_CEN) = 2; /* two 16-bit words per frame */
  
  // DMA_CFN
  DMA_ACC(NO_GLOB_REG, DMA_CHANNEL_1, DMA_CFN) = SizeOfTestBuffer; /* number of 32-bit frames */

  // DMA_CSEI
  DMA_ACC(NO_GLOB_REG, DMA_CHANNEL_1, DMA_CEI) = 1;

  // DMA_CSFI
  DMA_ACC(NO_GLOB_REG, DMA_CHANNEL_1, DMA_CFI) = -3;
}





void config_MCBSP_I2Smode(void)
{
  UWORD8 i;
  
  // place the transmitter, sample rate generator, frame sync generator in reset
  MCBSP1_MCBSP_SPCR2_REG &= 0xFF3E;  
  
  // Reset the receiver
  MCBSP1_MCBSP_SPCR1_REG &= 0xFFFE;  
  
  // McBSP Receiver & Transmitt is a slave 
  MCBSP1_MCBSP_PCR_REG = 0x000F;   
  
  // McBSP receive control register 1 
  // word lenght 2 = 20 bits          bits [5:7]
  // number of words per frame = 1    bits [8:14]
  MCBSP1_MCBSP_RCR1_REG = 0x0060;
  
  // McBSP receive control register 1 
  // word lenght 2 = 20 bits          bits [5:7]
  // number of words per frame = 1    bits [8:14]
  // delay of 0 receive clock cycle after framce synchro (bit [1;0] )
  // dual phase receive  (bit 15)
  // MSB first
  MCBSP1_MCBSP_RCR2_REG = 0x8060;
 
  // McBSP transmit control register 2
  // word lenght 2 = 20 bits	       bits [5:7]
  // number of words per frame = 1    bits [8:14]
  // delay of 0 transmit clock cycle after framce synchro (bit [1;0] )
  // dual phase transmit
  // MSB first
//ahuo  MCBSP1_MCBSP_XCR2_REG = 0x8060;   
  MCBSP1_MCBSP_XCR2_REG = 0x8060;   
 
  // McBSP transmit control register 1
  // word lenght 2 = 20 bits	       bits [5:7]
  // number of words per frame = 1    bits [8:14]
  MCBSP1_MCBSP_XCR1_REG = 0x0060;
   
  // Wait at least for 2 CLKSRG clock period (McBSP Internal signal) for internal synchronization
  for(i=0;i<20;i++);
  
  // enable the receiver
  MCBSP1_MCBSP_SPCR1_REG |= 0x0001;  
   
  // enable the transmitter
  MCBSP1_MCBSP_SPCR2_REG |= 0x0001;  
} 

void triton_audio_part_voice_memo_config(void)
{
  //////////////////////////////audio part settings voice memo////////////////////////////////////////////////////////////////////
  
  Triton_Audio_Outputs_Charge_Settings(AUDIO_CARKIT_CHARGE_AUTO, AUDIO_AUXO_CHARGE_AUTO, AUDIO_EAR_CHARGE_AUTO, AUDIO_HSO_CHARGE_AUTO);
  
  Triton_Analog_Settings(AUDIO_VMID_1_35V, AUDIO_VMID_LOW_PASS_RC_FILTER_RESISTANCE_NOT_BYPASSED, AUDIO_MIC_BIAS_2V, AUDIO_MIC_BIAS_ACTIVE);
  
  Triton_Audio_Outputs_Enabling_And_Mixing (AUDIO_HF_NONE, AUDIO_CAR_KIT_NONE, AUDIO_AUXO_NONE, AUDIO_EAR_AUDIO_MONO_FROM_LEFT_CHANNEL, AUDIO_HSOL_AUDIO_MONO_FROM_LEFT_CHANNEL, AUDIO_HSOR_AUDIO_MONO_FROM_RIGHT_CHANNEL);
  Triton_Audio_Inputs_Selection(AUDIO_INPUT_MIC);
//  Triton_Audio_Outputs_OPEN_SPK();
  //Triton_Voice_Filter_Bypass_Settings(AUDIO_WHOLE_VOICE_DOWNLINK_FILTER_BYPASSED);
  Triton_Voice_Speech_Path_Settings(AUDIO_VCK_BURST_MODE, AUDIO_VCK_FREQ_500KHz_NARROW_BAND);
  Triton_Voice_Gain_Settings(AUDIO_VOICE_DOWNLINK_VOLUME_0dB, AUDIO_VOICE_DOWNLINK_DIG_GAIN_6, AUDIO_VOICE_UPLINK_DIG_GAIN_6, AUDIO_VOICE_SIDETONE__5);

 // Triton_Voice_Memo_Activation(AUDIO_VOICE_MEMO_ACTIVE);
  Triton_Voice_Memo_Activation(AUDIO_VOICE_MEMO_INACTIVE);
  Triton_Audio_Stereo_Settings(AUDIO_STEREO_TO_MONO_ON_LEFT, AUDIO_DEFAULT_VALUE, AUDIO_DEFAULT_VALUE);
  //Triton_Audio_Stereo_Settings(AUDIO_STEREO_TO_MONO_ON_RIGHT, AUDIO_DEFAULT_VALUE, AUDIO_DEFAULT_VALUE);
  Triton_Stereo_Sampling_Rate_Freq (AUDIO_STEREO_SAMPLE_RATE_FREQ_44_1KHz);
  
  Triton_PLL_Settings(AUDIO_STEREO_PLL_POWER_ON, AUDIO_STEREO_PLL_SPEEDUP_ACTIVE, AUDIO_VOICE_PLL_POWER_ON);
  Triton_Audio_Power(AUDIO_STEREO_DOWNLINK_PATH_ENABLE, AUDIO_VOICE_UPLINK_PATH_ENABLE, AUDIO_VOICE_DOWNLINK_PATH_ENABLE);
  Triton_I2S_Power(AUDIO_I2S_ON); 

  //////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////////
}




/* ============================================================================
* MAIN FUNCTION
* =============================================================================*/
UWORD16 tritonsys_recorder_voice(void)
{
int i,j;
int temp;
UWORD16 Result_Test = 0;  
           
UART_Printf(UART2," L, R,channel will generate triangle wave \n");
               
  /*set interrupt function handler */
  /***************************************************************/     
  /*  NUMBER OF IT MODULE AND INTERRUPT HANDLER FUNCTION TO FILL */
  /***************************************************************/     
  // PE_InterruptArray[NUMBER OF MODULE IT] =  &function_irqHandler;
   
  /* map and configure interrupt of MODULE (interrupt controler) */
  // INTH2_InitLevel( NUMBER OF MODULE IT , INTH_IRQ, NUMBER OF MODULE IT , INTH_FALLING_EDGE_SENSITIVE); 
  
  /* enable interrupt of MODULE (interrupt controler) */
  // INTH2_EnableOneIt( NUMBER OF MODULE IT ); 


  /* set interrupt function handler */
//ahuo  PE_InterruptArray[DMA_CH1_INT] =  &dma_channel_1_irqHandler;
  /* map and configure interrupt of MODULE (interrupt controler) */
//ahuo  INTH2_InitLevel (DMA_CH1_INT, INTH_IRQ, DMA_CH1_INT, INTH_LOW_LEVEL_SENSITIVE);
  /* enable interrupt of MODULE (interrupt controler) */
//ahuo  INTH2_EnableOneIt(DMA_CH1_INT, INTH_IRQ);




  //Init I2C Interface
  MSI2C_InitConnectionAbb();

  //configure MCBSP in I2S mode, Slave TX, Slave RX with external loopback (in testbench)
  config_MCBSP_I2Smode();

////////////////ahuo


  ULPD_SoftReqEnable(MCSI);//FL



  config_Xbar_voice_loop();

  // Configure DMA interrupts (CH0, CH1) and enable them
  config_DMA_interrupts_voice_loop();
  enable_DMA_interrupts_voice_loop();

   


///////////////ahuo
  //configure DMA for voice memo app
//  dma_conf_voice_memo(64000); // dma transfer : 2 s

  // Enable DMA channel 1 -> DMA request is taken into account
//  DMA_Omap32EnableChannel(DMA_CHANNEL_1); 

  // configure triton audio part for voice memo app
  triton_audio_part_voice_memo_config();
//    triton_voice_loop_config();
  //wait 20s
  for (i=0 ; i < 4000 ; i++);

//  	TIME_WaitUs(OSTIMER1, POLLING_MODE , 50000);//wait 64 ms 
while (1)
{  

//for(j=0;j<sizeof(sin);j++)
//  MCBSP1_MCBSP_DXR1_REG =sin[j];
 // MCBSP1_MCBSP_DXR2_REG =; 
// {temp = (sin[j])|(sin[j+1]<<8);
// MCBSP1_MCBSP_DXR1_REG =temp;//sin[j] ;
//   for (i=0 ; i < 50 ; i++);
//  }
   
  
//   MCSI2_TX0_REG =MCSI2_RX0_REG;
 // for (i=0 ; i < 50 ; i++);

  MCBSP1_MCBSP_DXR1_REG = temp;
  temp= temp+100;
  for (i=0 ; i < 500 ; i++);
  if (temp>65520)
  {temp=0;}


}  // disable the McBSP receiver
  MCBSP1_MCBSP_SPCR1_REG &= 0xFFFE;  
  // disable the McBSP transmitter
  MCBSP1_MCBSP_SPCR2_REG &= 0xFFFE;    

  //disable audio part
  Triton_Audio_Power(AUDIO_STEREO_DOWNLINK_PATH_DISABLE, AUDIO_VOICE_UPLINK_PATH_DISABLE, AUDIO_VOICE_DOWNLINK_PATH_DISABLE);
  Triton_I2S_Power(AUDIO_I2S_OFF); //disable Triton I2S module

     


  
 
/* ============================================================================
* ADD YOUR TEST HERE (FOR BRUNO)
* =============================================================================*/


  if (Result_Test != 0) { 
        printf("***********************************************\n");   
        printf("** ERROR(S): tritonsys_recorder_voice : TEST FAILED **\n");
        printf("***********************************************\n");
              
  } else {
        printf("*************************************\n");   
        printf("** tritonsys_recorder_voice : TEST PASSED **\n");
        printf("*************************************\n");           
  }
  
  return Result_Test; 
}




void Triton_voice_headset_test(void)
{
  ULPD_SoftReqEnable(MCSI);
  SSW_Grab(MCSI2);

  //Init I2C Interface
  MSI2C_InitConnectionAbb();

  // Test DMA transfers
  config_Xbar_voice_loop();


  config_DMA_interrupts_voice_loop();
  enable_DMA_interrupts_voice_loop();


  MCSI_disable(MAP_MCSI2_ADDR);
 
  MCSI2_CONTROL_REG         = 0x0;     // disable mcsi bt     
 MCSI2_MAIN_PARAM_REG      = 0xC00f;  // slave, 16 bit data + DMA requests enabled on RX
//   MCSI2_MAIN_PARAM_REG      = 0x000f;  // slave, 16 bit data + no DMA
   MCSI2_CHANNEL_USED_REG =0x01;     
  MCSI2_OVER_CLOCK_REG      = 0x00;    // no additionnal bit   
   MCSI2_CLOCK_FREQUENCY_REG = 0x0A;    // 12Mhz/10=1.2Mhz
  MCSI2_INTERRUPTS_REG      = 0x0000;  // tx and rx interrupts on channel 0
//    MCSI2_INTERRUPTS_REG      = 0x0000;  // tx and rx interrupts on channel 0

  
  //configure triton in voice loop mode

  Triton_Audio_Outputs_Charge_Settings(AUDIO_CARKIT_CHARGE_AUTO, AUDIO_AUXO_CHARGE_AUTO, AUDIO_EAR_CHARGE_AUTO, AUDIO_HSO_CHARGE_AUTO);
  Triton_PLL_Settings(AUDIO_STEREO_PLL_POWER_OFF, AUDIO_STEREO_PLL_SPEEDUP_INACTIVE, AUDIO_VOICE_PLL_POWER_ON);
  Triton_Analog_Settings(AUDIO_VMID_1_35V, AUDIO_VMID_LOW_PASS_RC_FILTER_RESISTANCE_NOT_BYPASSED, AUDIO_MIC_BIAS_2V, AUDIO_HSMIC_BIAS_ACTIVE);
 
  Triton_Audio_Outputs_Enabling_And_Mixing (AUDIO_HF_VOICE_SPEECH, AUDIO_CAR_KIT_NONE, AUDIO_AUXO_NONE, AUDIO_EAR_VOICE_SPEECH, AUDIO_HSOL_VOICE_SPEECH, AUDIO_HSOR_VOICE_SPEECH);
  Triton_Audio_Inputs_Selection(AUDIO_INPUT_HSMIC);
  Triton_Voice_Filter_Bypass_Settings(AUDIO_WHOLE_VOICE_DOWNLINK_FILTER_BYPASSED);
  Triton_Voice_Speech_Path_Settings(AUDIO_VCK_BURST_MODE, AUDIO_VCK_FREQ_2MHz_WIDE_BAND);
//  Triton_Audio_Outputs_OPEN_SPK();
  Triton_Voice_Gain_Settings(AUDIO_VOICE_DOWNLINK_VOLUME_0dB, AUDIO_VOICE_DOWNLINK_DIG_GAIN_6, AUDIO_VOICE_DOWNLINK_DIG_GAIN_6, AUDIO_VOICE_SIDETONE__5);
//  Triton_Voice_Gain_Settings(AUDIO_VOICE_DOWNLINK_VOLUME__12dB, AUDIO_VOICE_DOWNLINK_DIG_GAIN__6, AUDIO_VOICE_UPLINK_DIG_GAIN__6, AUDIO_VOICE_SIDETONE__5);
  Triton_Audio_Power(AUDIO_STEREO_DOWNLINK_PATH_ENABLE, AUDIO_VOICE_UPLINK_PATH_ENABLE, AUDIO_VOICE_DOWNLINK_PATH_ENABLE);


  // enable MCSI2

  MCSI_enable(MAP_MCSI2_ADDR);

  while(1)
  { 
  
  
  MCSI2_TX0_REG =MCSI2_RX0_REG;

  }
  
}





void Triton_ClassD_open(UWORD8 vaule)
{

int previous_content;
 MSI2C_AccessPage(AUDIO_page);
previous_content = MSI2C_MasterPollingReceiveAbb(AUDIO_CTRL3);
  MSI2C_MasterPollingSendAbb(AUDIO_OUTEN3,0x001);
        MSI2C_MasterPollingSendAbb(AUDIO_CTRL3,((vaule<<7) |(previous_content & 0x7f)));
	 MSI2C_MasterPollingSendAbb(AUDIO_OUTEN3,0x000);
previous_content = MSI2C_MasterPollingReceiveAbb(AUDIO_OUTEN3);


}


void Triton_FM_AMP_test(void)
{
int previous_content;

 MSI2C_AccessPage(AUDIO_page);
previous_content = MSI2C_MasterPollingReceiveAbb(AUDIO_CTRL3);
 
        MSI2C_MasterPollingSendAbb(AUDIO_CTRL3,( 0x04|(previous_content & 0xf0)));
	  MSI2C_MasterPollingSendAbb(AUDIO_OUTEN1,( 0x37|(previous_content & 0x81)));
 MSI2C_MasterPollingSendAbb(AUDIO_CTRL2,0x03);



}