📄 gpio.c
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/********************************************************************************
******* file name : arm_neptune_gpio.c
******* function : neptune gpio definition
******* ahthor : commit
******* date : 2005-10-14
*********************************************************************************/
#include "GPIO.h"
#include "gpio_w.h"
#include "io_configuration.h"
#include "config.h"
#include "UART_IrDA.h"
#include "inth_w.h"
#include "vikingII.h"
#include "interrupt_mapping.h"
#define gpio_revision_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_revision_offset)
#define gpio_sysconfig_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_sysconfig_offset)
#define gpio_sysstatus_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_sysstatus_offset)
#define gpio_irqstatus1_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_irqstatus1_offset)
#define gpio_irqenable1_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_irqenable1_offset)
#define gpio_wakeupenable_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_wakeupenable1_offset)
#define gpio_irqstatus2_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_irqstatus2_offset)
#define gpio_irqenable2_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_irqenable2_offset)
#define gpio_ctrl_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_ctrl_offset)
#define gpio_oe_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_oe_offset)
#define gpio_datain_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_datain_offset)
#define gpio_dataout_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_dataout_offset)
#define gpio_leveldetect0_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_leveldetect0_offset)
#define gpio_leveldetect1_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_leveldetect1_offset)
#define gpio_risingdetect_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_risingdetect_offset)
#define gpio_fallingdetect_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_fallingdetect_offset)
#define gpio_debouncenable_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_debouncenable_offset)
#define gpio_debouncingtime_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_debouncingtime_offset)
#define gpio_clearirqenable1_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_clearirqenable1_offset)
#define gpio_setirqenable1_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_setirqenable1_offset)
#define gpio_clearirqenable2_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_clearirqenable2_offset)
#define gpio_setirqenable2_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpiO_setirqenable2_offset)
#define gpio_clearwkuena_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_clearwkuena_offset)
#define gpio_setwkuena_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_setwkuena_offset)
#define gpio_cleardataout_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpiO_cleardataout_offset)
#define gpio_setdataout_reg(x) *(unsigned int *)(gpio_module1_base_add + (x>>1)*0x800 + gpio_setdataout_offset)
extern int D2N_M_Flag;
isrpointer gpioirq[64];
/******* set gpio output high level: module_num = 1 or 2;gpio_num=0~63 ********/
void gpio_dataout_high(int module_num,int gpio_num)
{
unsigned int temp;
unsigned int temp2;
if(gpio_num <32)
{
temp=gpio_oe_reg(module_num);
gpio_oe_reg(module_num)= (temp&(~( 0x1<<gpio_num )));
temp2=gpio_setdataout_reg(module_num);
gpio_setdataout_reg(module_num)= (temp2|(0x1<<gpio_num));
}
else
{
temp=gpio_oe_reg(module_num);
gpio_oe_reg(module_num)=( temp&(~( 0x1<<(gpio_num-32))));
temp2=gpio_setdataout_reg(module_num);
gpio_setdataout_reg(module_num)=(temp2|(0x1<<(gpio_num-32)));
}
}
/******* set gpio output low level: module_num = 1 or 2;gpio_num=0~63 ********/
void gpio_dataout_low(int module_num,int gpio_num)
{
unsigned int temp;
unsigned int temp2;
if(gpio_num <32)
{
temp=gpio_oe_reg(module_num);
gpio_oe_reg(module_num)= (temp&(~( 0x1<<gpio_num )));
temp2=gpio_cleardataout_reg(module_num);
gpio_cleardataout_reg(module_num)= (temp2|(0x1<<gpio_num));
}
else
{
temp=gpio_oe_reg(module_num);
gpio_oe_reg(module_num)= ( temp&(~( 0x1<<(gpio_num-32))));
temp2=gpio_cleardataout_reg(module_num);
gpio_cleardataout_reg(module_num)=(temp2|(0x1<<(gpio_num-32)));
}
}
/***********************************************************************************
******** func : set gpio as irq line (for arm use)
******** module_num : = 1 or 2
******** gpio_num : = 0 ~ 63
******** trigger_vec : = rising_vec;falling_vec;low_vec;high_vec
************************************************************************************/
void gpio_setirq(int module_num,int gpio_num,gpio_trigger trigger_vec)
{
unsigned int temp;
if(gpio_num<32)
{
temp=gpio_oe_reg(module_num);
gpio_oe_reg(module_num)= (temp|(0x1<<gpio_num));
temp=gpio_irqenable1_reg(module_num);
gpio_irqenable1_reg(module_num)= (temp|(0x1<<gpio_num));
temp=gpio_setirqenable1_reg(module_num);
gpio_setirqenable1_reg(module_num)= (temp|(0x1<<gpio_num));
switch(trigger_vec)
{
case rising_vec:
temp=gpio_risingdetect_reg(module_num);
gpio_risingdetect_reg(module_num)= (temp|(0x1<<gpio_num));
break;
case falling_vec:
temp=gpio_fallingdetect_reg(module_num);
gpio_fallingdetect_reg(module_num)=(temp|(0x1<<gpio_num));
break;
case low_vec:
temp=gpio_leveldetect0_reg(module_num);
gpio_leveldetect0_reg(module_num)= (temp|(0x1<<gpio_num));
break;
case high_vec:
temp=gpio_leveldetect1_reg(module_num);
gpio_leveldetect1_reg(module_num)= (temp|(0x1<<gpio_num));
break;
default: ;
}
}
else
{
temp=gpio_oe_reg(module_num);
gpio_oe_reg(module_num)= (temp|(0x1<<(gpio_num-32)));
temp=gpio_irqenable1_reg(module_num);
gpio_irqenable1_reg(module_num)= (temp|(0x1<<(gpio_num-32)));
temp=gpio_setirqenable1_reg(module_num);
gpio_setirqenable1_reg(module_num)= (temp|(0x1<<(gpio_num-32)));
switch(trigger_vec)
{
case rising_vec:
temp=gpio_risingdetect_reg(module_num);
gpio_risingdetect_reg(module_num)= (temp|(0x1<<(gpio_num-32)));
break;
case falling_vec:
temp=gpio_fallingdetect_reg(module_num);
gpio_fallingdetect_reg(module_num)=(temp|(0x1<<(gpio_num-32)));
break;
case low_vec:
temp=gpio_leveldetect0_reg(module_num);
gpio_leveldetect0_reg(module_num)= (temp|(0x1<<(gpio_num-32)));
break;
case high_vec:
temp=gpio_leveldetect1_reg(module_num);
gpio_leveldetect1_reg(module_num)= (temp|(0x1<<(gpio_num-32)));
break;
default:;
}
}
*(unsigned int *)0xfffecb18 = 0x00000001;
*(unsigned int *)0xfffecb04 &= ~0x00004000;
*(unsigned int *)0xfffecb04 &= ~0x00000001;
*(unsigned int *)0xfffe0104 &= ~0x00000100;
}
/*************************************************************************************
******* func : read the gpio interrupt line number
******* return value : 0~63 gpio number
******* return value : =65 indicate no gpio irq
**************************************************************************************/
int gpio_readirq(int module_num)
{
unsigned int temp;
unsigned int num;
unsigned int gpio_irq_num;
int shift_num;
int shift_data=0x1;
temp=gpio_irqstatus1_reg(module_num);
for(shift_num=0;shift_num<31;shift_num++)
{
num= (shift_data&temp);
shift_data = (shift_data<<1);
if(num>0)
{
gpio_irq_num=shift_num;
if(module_num==1) return(gpio_irq_num);
else return(gpio_irq_num+32);
}
//else return 65 ;
}
if(num==0)return 65;
}
int gpio_readirq2(int module_num)
{
unsigned int temp;
unsigned int num;
unsigned int gpio_irq_num;
int shift_num;
int shift_data=0x1;
temp=gpio_irqstatus2_reg(module_num);
for(shift_num=0;shift_num<31;shift_num++)
{
num= (shift_data&temp);
shift_data = (shift_data<<1);
if(num>0)
{
gpio_irq_num=shift_num;
if(module_num==1) return(gpio_irq_num);
else return(gpio_irq_num+32);
}
//else return 65 ;
}
if(num==0)return 65;
}
/************* reset irq (for arm) status after servering the interrupt ******************/
void reset_irqstatus(int module_num,int gpio_num)
{
unsigned int temp;
temp=gpio_irqstatus1_reg(module_num);
if(gpio_num<32)
{
gpio_irqstatus1_reg(module_num)= (temp|(0x1<<gpio_num));
}
else
{
gpio_irqstatus1_reg(module_num)= (temp|(0x1<<(gpio_num-32)));
}
}
/************* GPIO Test ******************************************************************/
void GPIO_Test(void)
{
int i, gpio_id, gpio_group, triger_mode;
unsigned short val ;
val=1;
while(val)
{
UART_Printf(UART2,"==================================================\r\n");
UART_Printf(UART2,"= GPIO TEST MENU =\r\n");
UART_Printf(UART2,"==================================================\r\n");
UART_Printf(UART2," 0: Back to upper menu\r\n");
UART_Printf(UART2," 1:GPIO output high lever\n\r");
UART_Printf(UART2," 2:GPIO output low lever\n\r");
UART_Printf(UART2," 3:GPIO interrupt test\n\r");
UART_Printf(UART2," Your choice : \n\r");
val = UART_GetNum(UART2);
UART_Printf(UART2,"\n\r");
switch (val)
{
case 0:
{
break;
}
case 1:
{
UART_Printf(UART2,"Please input GPIO ID: \n\r");
gpio_id = UART_GetNum(UART2);
gpio_group = gpio_id/32+1;
gpio_dataout_high(gpio_group, gpio_id);
break;
}
case 2:
{
UART_Printf(UART2,"Please input GPIO ID: \n\r");
gpio_id = UART_GetNum(UART2);
gpio_group = gpio_id/32+1;
gpio_dataout_low(gpio_group, gpio_id);
break;
}
case 3:
{
for(i=0; i<100; i++);
UART_Printf(UART2,"Please input GPIO ID: \n\r");
gpio_id = UART_GetNum(UART2);
gpio_group = gpio_id/32+1;
UART_Printf(UART2,"Please input Triger Mode(0. Low level , 1.High level , 2.Rising, 3Falling.): \n\r");
triger_mode = UART_GetNum(UART2);
GPIO_ConfigureInterruptEnable(gpio_id,triger_mode,vikingII_isr_hander);
break;
}
default:
break;
}
}
}
/***********************************************************************************
******* func : Pull Up or Pull Down GPIO_33
******* Description : GPIO_33's power domain belongs to MMC_VCC, so must setup MMC_VCC
******* before configure GPIO_33.
**************************************************************************************/
void GPIO_33_LTest()
{
//Please ensure MMC_VCC is on
//GPIO_33 pulled down
CONFIG_SetPullDown(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_33_OFFSET);
CONFIG_PullEnable(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_33_OFFSET);
}
void GPIO_33_HTest()
{
//Please ensure MMC_VCC is on
//GPIO_33 pulled up
CONFIG_SetPullUp(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_33_OFFSET);
CONFIG_PullEnable(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_GPIO_33_OFFSET);
}
/*************************************************************************/
/******* func : GPIO Conifuration */
void GPIO_SetDirection(Gpio_Num_t gpio_num, Gpio_Direct_t gpio_direct)
{
switch(gpio_num/32)
{
case 0: /* GPIO group 1 */
{
switch(gpio_direct)
{
case GPIO_OUTPUT:
{
GPIO_ClearOeBit(GPIO_MODULE1, gpio_num%32);
break;
}
case GPIO_INPUT:
{
GPIO_SetOeBit(GPIO_MODULE1, gpio_num%32);
break;
}
default:
;
}
break;
}
case 1: /* GPIO group 2 */
switch(gpio_direct)
{
case GPIO_OUTPUT:
{
GPIO_ClearOeBit(GPIO_MODULE2, gpio_num%32);
break;
}
case GPIO_INPUT:
{
GPIO_SetOeBit(GPIO_MODULE2, gpio_num%32);
break;
}
default:
;
}
break;
default:
;
}
return;
}
/****************************************************************
Function Name:GPIO_SetDataOut_Low
Description: Set gpio's output to low
Usage: gpio_num: 0 to 63
Return value: void
****************************************************************/
void GPIO_SetDataOut_Low(Gpio_Num_t gpio_num)
{
switch(gpio_num/32)
{
case 0: /* GPIO group 1 */
GPIO_ClearOutPin(GPIO_MODULE1, gpio_num%32);
break;
case 1: /* GPIO group 2 */
GPIO_ClearOutPin(GPIO_MODULE2, gpio_num%32);
break;
default:
;
}
return;
}
/****************************************************************
Function Name:GPIO_SetDataOut_High
Description: Set gpio's output to high
Usage: gpio_num: 0 to 63
Return value: void
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