io_configuration.h

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#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CLK                                           REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_DIGITALRF_RF_CLK_OFFSET)

#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CLK_MODE_POS                                  0
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CLK_MODE_NUMB                                 3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CLK_MODE_RES_VAL                              0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CLK_PUPD_EN_POS                               3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CLK_PUPD_EN_NUMB                              1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CLK_PUPD_EN_RES_VAL                           0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CLK_PUPD_VAL_POS                              4
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CLK_PUPD_VAL_NUMB                             1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CLK_PUPD_VAL_RES_VAL                          0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_DIGITALRF_RF_CS                                            :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CS                                            REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_DIGITALRF_RF_CS_OFFSET)

#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CS_MODE_POS                                   0
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CS_MODE_NUMB                                  3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CS_MODE_RES_VAL                               0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CS_PUPD_EN_POS                                3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CS_PUPD_EN_NUMB                               1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CS_PUPD_EN_RES_VAL                            0x1

#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CS_PUPD_VAL_POS                               4
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CS_PUPD_VAL_NUMB                              1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_CS_PUPD_VAL_RES_VAL                           0x1



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_DIGITALRF_RF_DATA                                          :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_DATA                                          REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_DIGITALRF_RF_DATA_OFFSET)

#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_DATA_MODE_POS                                 0
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_DATA_MODE_NUMB                                3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_DATA_MODE_RES_VAL                             0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_DATA_PUPD_EN_POS                              3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_DATA_PUPD_EN_NUMB                             1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_DATA_PUPD_EN_RES_VAL                          0x1

#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_DATA_PUPD_VAL_POS                             4
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_DATA_PUPD_VAL_NUMB                            1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RF_DATA_PUPD_VAL_RES_VAL                         0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_DIGITALRF_RX_CLK                                           :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CLK                                           REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_DIGITALRF_RX_CLK_OFFSET)

#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CLK_MODE_POS                                  0
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CLK_MODE_NUMB                                 3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CLK_MODE_RES_VAL                              0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CLK_PUPD_EN_POS                               3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CLK_PUPD_EN_NUMB                              1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CLK_PUPD_EN_RES_VAL                           0x1

#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CLK_PUPD_VAL_POS                              4
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CLK_PUPD_VAL_NUMB                             1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CLK_PUPD_VAL_RES_VAL                          0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_DIGITALRF_RX_CS                                            :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CS                                            REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_DIGITALRF_RX_CS_OFFSET)

#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CS_MODE_POS                                   0
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CS_MODE_NUMB                                  3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CS_MODE_RES_VAL                               0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CS_PUPD_EN_POS                                3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CS_PUPD_EN_NUMB                               1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CS_PUPD_EN_RES_VAL                            0x1

#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CS_PUPD_VAL_POS                               4
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CS_PUPD_VAL_NUMB                              1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_CS_PUPD_VAL_RES_VAL                           0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_DIGITALRF_RX_DATA                                          :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_DATA                                          REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_DIGITALRF_RX_DATA_OFFSET)

#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_DATA_MODE_POS                                 0
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_DATA_MODE_NUMB                                3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_DATA_MODE_RES_VAL                             0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_DATA_PUPD_EN_POS                              3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_DATA_PUPD_EN_NUMB                             1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_DATA_PUPD_EN_RES_VAL                          0x1

#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_DATA_PUPD_VAL_POS                             4
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_DATA_PUPD_VAL_NUMB                            1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RX_DATA_PUPD_VAL_RES_VAL                         0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_DIGITALRF_RXEN                                             :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_DIGITALRF_RXEN                                             REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_DIGITALRF_RXEN_OFFSET)

#define        IO_CONFIGURATION_CONF_DIGITALRF_RXEN_MODE_POS                                    0
#define        IO_CONFIGURATION_CONF_DIGITALRF_RXEN_MODE_NUMB                                   3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RXEN_MODE_RES_VAL                                0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_RXEN_PUPD_EN_POS                                 3
#define        IO_CONFIGURATION_CONF_DIGITALRF_RXEN_PUPD_EN_NUMB                                1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RXEN_PUPD_EN_RES_VAL                             0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_RXEN_PUPD_VAL_POS                                4
#define        IO_CONFIGURATION_CONF_DIGITALRF_RXEN_PUPD_VAL_NUMB                               1
#define        IO_CONFIGURATION_CONF_DIGITALRF_RXEN_PUPD_VAL_RES_VAL                            0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_DIGITALRF_SYSCLK                                           :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_DIGITALRF_SYSCLK                                           REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_DIGITALRF_SYSCLK_OFFSET)

#define        IO_CONFIGURATION_CONF_DIGITALRF_SYSCLK_MODE_POS                                  0
#define        IO_CONFIGURATION_CONF_DIGITALRF_SYSCLK_MODE_NUMB                                 3
#define        IO_CONFIGURATION_CONF_DIGITALRF_SYSCLK_MODE_RES_VAL                              0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_SYSCLK_PUPD_EN_POS                               3
#define        IO_CONFIGURATION_CONF_DIGITALRF_SYSCLK_PUPD_EN_NUMB                              1
#define        IO_CONFIGURATION_CONF_DIGITALRF_SYSCLK_PUPD_EN_RES_VAL                           0x1

#define        IO_CONFIGURATION_CONF_DIGITALRF_SYSCLK_PUPD_VAL_POS                              4
#define        IO_CONFIGURATION_CONF_DIGITALRF_SYSCLK_PUPD_VAL_NUMB                             1
#define        IO_CONFIGURATION_CONF_DIGITALRF_SYSCLK_PUPD_VAL_RES_VAL                          0x0



//----------------------------------------------------------------------------------------------------------------------------------------------------------------
//IO_CONFIGURATION_CONF_DIGITALRF_TX_CLK                                           :
//----------------------------------------------------------------------------------------------------------------------------------------------------------------
#define        IO_CONFIGURATION_CONF_DIGITALRF_TX_CLK                                           REG32(IO_CONFIGURATION_BASE_ADDR_ARM+IO_CONFIGURATION_CONF_DIGITALRF_TX_CLK_OFFSET)

#define        IO_CONFIGURATION_CONF_DIGITALRF_TX_CLK_MODE_POS                                  0
#define        IO_CONFIGURATION_CONF_DIGITALRF_TX_CLK_MODE_NUMB                                 3
#define        IO_CONFIGURATION_CONF_DIGITALRF_TX_CLK_MODE_RES_VAL                              0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_TX_CLK_PUPD_EN_POS                               3
#define        IO_CONFIGURATION_CONF_DIGITALRF_TX_CLK_PUPD_EN_NUMB                              1
#define        IO_CONFIGURATION_CONF_DIGITALRF_TX_CLK_PUPD_EN_RES_VAL                           0x0

#define        IO_CONFIGURATION_CONF_DIGITALRF_TX_CLK_PUPD_VAL_POS                              4
#define        IO_CONFIGURATION_CONF_DIGITALRF_TX_CLK_PUPD_VAL_NUMB                             1
#define        IO_CONFIGURATION_CONF_DIGITALRF_TX_CLK_PUPD_VAL_RES_VAL                          0x0