gsample_lead3.gel

来自「OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI」· GEL 代码 · 共 374 行 · 第 1/2 页

/* This GEL file is loaded on the command line of Code Composer 
 * The StartUp() function is called every time you start
 * Code Composer.  You can customize this function to
 * initialize wait states or to perform other initialization.
 * 
 * MGS3 GEL file is used for ARM9 and Megastar3 co-emulation:
 *		Tap Neptune : bypass
 *		Tap 5500  	: enable
 *		Tap ARM9  	: enable
 *
 * Revision 0.0:
 * 	  Dec-2-2004    Jean-Marie PONS
 *							
 */


StartUp()
{
  GEL_TextOut("StartUp start\n","result");
  
  GEL_Reset();
  memorymap_init();

  watchdog_disable();
  Trstn_Reset();

  /* Report Startup is done */
  GEL_TextOut("StartUp done\n","result");
}
menuitem "MGS3 GEL File - OMAP1610";

OnReset()
{
	//watchdog_disable();

	*(short *)0xE00@IO = 0x0C; 	// Set GDMA free bit (allows ARM API accesses even if
				   		// DSP generates a bus error which would have prevented
                                    // this)
}

hotmenu BuildLibrary()
{
  /* Load & Build library project */
  GEL_ProjectLoad("N:\\cdb\\wcssoft2\\src\\lead3_src\\lead3_src.pjt");
  GEL_ProjectBuild(); /* Build library if necesary */
}

hotmenu EnablePeripherals() 
{
  *(short *)0x4004@IO = 0x0036;
  *(short *)0x400A@IO = 0x0003;
}

/* Initialize Megastar3 Test Mode Control Registers(TMCR) */ 
dialog Trstn_Reset() 
{
#define TMCR_MGS3	0x07FE 
#define TMCR_MM		0x07FF
  *(short *)TMCR_MGS3@IO = 0x0510;
  *(short *)TMCR_MM@IO = 0x0000;
}

dialog watchdog_disable()
{
/* Disable Megastar3 Watchdog Timer */
  *(short *)0x3404@IO = 0xF5;
  *(short *)0x3404@IO = 0xA0;
  GEL_TextOut("watchdog_disable\n","result");
}

dialog memorymap_init()
{

  /* Reset default memory map */
  GEL_MapReset();

  /* Internal Memory mapping */
  GEL_MapAdd(0x000000U, 1, 0x01A000U, 1, 1);   /* Data space */
  GEL_MapAdd(0x000000U, 0, 0x034000U, 1, 1);   /* Program space */
  GEL_MapAdd(0xFA0000U, 0, 0x060000U, 1, 0);   /* PDROM */
  
  /* External memory mapping */
  /* WARNING: This memory is available only
              after DSP MMU programming.
              Memory map match helen2_dsp_mmu_mapping.h file.
              Memory is mapped to both program and data section. */

  GEL_MapAdd(0x080000U, 1, 0x002000U, 1, 1);   /* Test SRAM Data    Space */
  GEL_MapAdd(0x100000U, 0, 0x004000U, 1, 1);   /* Test SRAM Program Space */

  GEL_MapAdd(0x100000U, 1, 0x300000U, 1, 1);   /* SDRAM Data    Space */
  GEL_MapAdd(0x200000U, 0, 0x600000U, 1, 1);   /* SDRAM Program Space */

  GEL_MapAdd(0x400000U, 1, 0x100000U, 1, 0);   /* Strata1 Flash Data    Space */
  GEL_MapAdd(0x800000U, 0, 0x200000U, 1, 0);   /* Strata1 Flash Program Space */

  GEL_MapAdd(0x500000U, 1, 0x100000U, 1, 0);   /* Strata2 Flash Data    Space */
  GEL_MapAdd(0xA00000U, 0, 0x200000U, 1, 0);   /* Strata2 Flash Program Space */

  GEL_MapAdd(0x600000U, 1, 0x100000U, 1, 0);   /* AMD Flash Data    Space */
  GEL_MapAdd(0xC00000U, 0, 0x200000U, 1, 0);   /* AMD Flash Program Space */

  /* TODO: Verify SSI/GDD memory map */
  GEL_MapAdd(0x040000U, 1, 0x008000U, 1, 1);   /* SSI Data    Space */
  GEL_MapAdd(0x040800U, 1, 0x008000U, 1, 1);   /* GDD Data    Space */


  /************************/
  /* DSP TIPB peripherals */
  /************************/
  
  /* ---------------- */
  /* DSP Private TIPB */
  /* ---------------- */
  GEL_MapAddStr(0x0400, 2, 0x07F8, "R|W|AS2", 4); /* EMULATOR-TEST */

  GEL_MapAddStr(0x0800, 2, 0x0014, "R|W|AS2", 4); /* EMIF */

  GEL_MapAddStr(0x0E00, 2, 0x0004, "R|W|AS2", 4); /* DMA Control registers*/
  GEL_MapAddStr(0x0C00, 2, 0x0013, "R|W|AS2", 4); /* DMA Channel 0 */
  GEL_MapAddStr(0x0C20, 2, 0x0013, "R|W|AS2", 4); /* DMA Channel 1 */
  GEL_MapAddStr(0x0C40, 2, 0x0013, "R|W|AS2", 4); /* DMA Channel 2 */ 
  GEL_MapAddStr(0x0C60, 2, 0x0013, "R|W|AS2", 4); /* DMA Channek 3 */
  GEL_MapAddStr(0x0C80, 2, 0x0013, "R|W|AS2", 4); /* DMA Channel 4 */
  GEL_MapAddStr(0x0CA0, 2, 0x0013, "R|W|AS2", 4); /* DMA Channel 5 */

  GEL_MapAddStr(0x1400, 2, 0x0009, "R|W|AS2", 4); /* Instruction Cache */
  GEL_MapAddStr(0x1600, 2, 0x0080, "R|W|AS2", 4);

  /* OS timers: Missing read registers */
  GEL_MapAddStr(0x2800, 2, 0x0001, "R|W|AS2", 4); /* OS TIMER1 */
  GEL_MapAddStr(0x2802, 2, 0x0004, "R|W|AS2", 4);

  GEL_MapAddStr(0x2C00, 2, 0x0001, "R|W|AS2", 4); /* OS TIMER2 */
  GEL_MapAddStr(0x2C02, 2, 0x0004, "R|W|AS2", 4);

  GEL_MapAddStr(0x3000, 2, 0x0001, "R|W|AS2", 4); /* OS TIMER3 */
  GEL_MapAddStr(0x3002, 2, 0x0004, "R|W|AS2", 4);

  GEL_MapAddStr(0x3400, 2, 0x0001, "R|W|AS2", 4); /* WATCHDOG TIMER */
  GEL_MapAddStr(0x3404, 2, 0x0001, "R|W|AS2", 4);

  /* TODO: Find register description
  GEL_MapAddStr(0x3800, 2, 0x0400, "R|W|AS2", 4); /* DSPINT_IF Interrupt Priority */

  /* ------------------------ */
  /* DSP Public TIPB Strobe 0 */
  /* ------------------------ */
  GEL_MapAddStr(0x0000, 2, 0x0001, "R|W|AS2", 4); /* RHEA Configuration */
  GEL_MapAddStr(0x0002, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x0004, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x0006, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x0008, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x000A, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x000C, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x000E, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x0010, 2, 0x0001, "R|W|AS2", 4);

  GEL_MapAddStr(0x2000, 2, 0x0400, "R|W|AS2", 4); /* TRACE */

  GEL_MapAddStr(0x4000, 2, 0x0001, "R|W|AS2", 4); /* CLKM2 */
  GEL_MapAddStr(0x4002, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x4004, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x4006, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x4008, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x400A, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x400C, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x400E, 2, 0x0001, "R|W|AS2", 4);
  GEL_MapAddStr(0x4010, 2, 0x0001, "R|W|AS2", 4);


  /* TODO: Verify that DSP MMU is mapped to DSP IO space
  GEL_MapAddStr(0x4400, 2, 0x0400, "R|W|AS2", 4); /* DSP MMU */

  GEL_MapAddStr(0x4800, 2, 0x0026, "R|W|AS2", 4); /* Interrupt Handler level 2.0 */

  GEL_MapAddStr(0x4C00, 2, 0x0400, "R|W|AS2", 4); /* Interrupt Handler level 2.1 */
  
  /* ------------------------ */
  /* DSP Public TIPB Strobe 1 */
  /* ------------------------ */
  GEL_MapAddStr(0x8000, 2, 0x0013, "R|AS2",   4); /* UART1 */
  GEL_MapAddStr(0x8014, 2, 0x0004, "R|AS2",   4);

  GEL_MapAddStr(0x8400, 2, 0x0013, "R|W|AS2", 4); /* UART2 */
  GEL_MapAddStr(0x8414, 2, 0x0004, "R|AS2",   4);