📄 arm926ej-macros.h.s
字号:
;------------------------------------------------------------------------------
; Macro: <label> ARM926EJ_MMU_INIT
;
; Function: This MACRO initialises the ARM926EJ Memory Management Unit, and
; sets up some variables which have specific relevance to the
; following memory map.
;
; Assumptions: TTB_BASE has been defined
; The translation table (arm926ej_tt.s) has been loaded at TTB_BASE
;
;------------------------------------------------------------------------------
MACRO
$label ARM926EJ_MMU_INIT
cb_base EQU 0x00c00000
cnb_base EQU 0x00800000
ncb_base EQU 0x01000000
ncnb_base EQU 0x01400000
c_base EQU 0x00000000
nc_base EQU 0x00400000
test_l1_offset EQU 0x0
ncnb_l1_offset EQU 0x50
ncb_l1_offset EQU 0x40
cnb_l1_offset EQU 0x20
cb_l1_offset EQU 0x30
LDR r0, =TTB_BASE
MCR p15, 0, r0, c2, c0, 0 ; C2C0 = Write TTB
MOV r0, #2_11111111 ; D0-D6 = Manager
ORR r0, r0, #2_00111111 << 8 ; D15-D7 = No access
MCR p15, 0, r0, c3, c0, 0 ; C3C0 = Write DAC
MRC p15, 0, r0, c1, c0, 0 ; Read Control Reg
ORR r0, r0, #2_01111001 ; M bit set - enable MMU
ORR r0, r0, #2_01000000 << 8 ; RR bit set
MCR p15, 0, r0, c1, c0, 0 ; C1C0 = Write config
MEND
; ----------------------------------------------------------------------------
; Macro: <label> Clean_DCacheLine_By_Address $reg
;
; Function: Macro which cleans a DCache line using an address
;
; Parameters: <label> : optional part number/label for macro
; <reg> : internal register used by macro
;
; Assumptions: ARM926EJ only
;------------------------------------------------------------------------------
MACRO
$label Clean_DCacheLine_By_Address $reg
$label
MCR p15, 0, $reg, c7, c10, 1
MEND
;------------------------------------------------------------------------------
; Macro: <label> ENTER_SYS_MODE
;
; Function: Enter System Mode
;
; Parameters: None
;
; Assumptions: None
;
;------------------------------------------------------------------------------
MACRO
$label ENTER_SYS_MODE
$label
MRS r0, CPSR
BIC r0, r0, #Mode_Bits
ORR r0, r0, #Mode_SYS_32
MSR CPSR_c, r0
MEND
;------------------------------------------------------------------------------
; Macro: INVALIDATE_UTLB_2 $reg
;
; Function: This macro invalidates all entries that are not preserved in
; the instruction TLB.
;
; Internally: Register $reg is set to zero
;
MACRO
INVALIDATE_UTLB_2 $reg
MCR p15,0,$reg,c8,c5,0
MEND
;------------------------------------------------------------------------------
; Macro: INVALIDATE_UTLB_3 $reg
;
; Function: This macro invalidates all entries that are not preserved in
; the instruction TLB.
;
; Internally: Register $reg is set to zero
;
MACRO
INVALIDATE_UTLB_3 $reg
MCR p15,0,$reg,c8,c6,0
MEND
;------------------------------------------------------------------------------
; Macro: INVALIDATE_UTLB_VA_2 $reg
;
; Function: This macro invalidates the entry in the Unified TLB that is
; associated with virtual address of register $reg
;
; Internally: Register $reg holds the virtual address
;
MACRO
INVALIDATE_UTLB_VA_2 $reg
MCR p15,0,$reg,c8,c6,1
MEND
;------------------------------------------------------------------------------
; Macro: INVALIDATE_UTLB_VA_3 $reg
;
; Function: This macro invalidates the entry in the Unified TLB that is
; associated with virtual address of register $reg
;
; Internally: Register $reg holds the virtual address
;
MACRO
INVALIDATE_UTLB_VA_3 $reg
MCR p15,0,$reg,c8,c7,1
MEND
;------------------------------------------------------------------------------
; Macro: GET_CACHE_INDEX_FROM_VA $cache_type, $Rva, $Rind
;
; Function: This macro writes in reg $Rind the cache index derived from the
; VA held in $Rva
;
; Internally: Register $Rva and $Rind used
;
MACRO
GET_CACHE_INDEX_FROM_VA $cache_type, $Rva, $Rind
MRC p15,0,$Rind,c0,c0,1 ; Read Cache Reg
[ "$cache_type"="ICACHE"
MOV $Rind,$Rind,LSR #6
|
[ "$cache_type"="DCACHE"
MOV $Rind,$Rind,LSR #18
|
! 0, "Inappropriate use of GET_CACHE_INDEX_FROM_VA"
]
]
AND $Rind,$Rind,#0x0000000F
; Select mask according to size
CMP $Rind,#3 ; 4K
LDREQ $Rind,=0x000003E0
CMP $Rind,#4 ; 8K
LDREQ $Rind,=0x000007E0
CMP $Rind,#5 ; 16K
LDREQ $Rind,=0x00000FE0
CMP $Rind,#6 ; 32K
LDREQ $Rind,=0x00001FE0
CMP $Rind,#7 ; 64K
LDREQ $Rind,=0x00003FE0
CMP $Rind,#8 ; 128K
LDREQ $Rind,=0x00007FE0
AND $Rind, $Rind, $Rva ; apply mask
MOV $Rind, $Rind, LSR #5
MEND
;------------------------------------------------------------------------------
;
; Macro: $label ICACHE_LOCKDOWN_WAY $way (r0 = start, r1 = nlines)
;
; Origin This macro is the 926 version of 'ICACHE_LOCKDOWN' macro found in System-Macros
;
; Function This macro performs a lockdown of instructions in the ICache way $way
; It locks the number of lines (diagonals) requested in R1*3,
; starting from address R0, into way $way (for a total of
; CACHE_NUM_COLUMN / 4 * R1 * R2 words, with R2=3 seg).
; Note that this macro must be located in a non-cacheable region
; to work, else these instructions themselves will be locked into
; the cache.
;
; Warning This macro uses R0 and R1 as global arguments !!
;
;
; Internally: All registers preserved, except for flags.
;
MACRO
$label ICACHE_LOCKDOWN_WAY $way
$label LOCAL
PRESERVE 0, 3
MOV r3, #0 ; Init line counter
MOV r2, #3
MUL r1, r2, r1 ; Init block counter
[ "$way"="WAY_0"
MOV r2, #0xE ; Lock bits - way 0
]
[ "$way"="WAY_1"
MOV r2, #0xD ; Lock bits - way 1
]
[ "$way"="WAY_2"
MOV r2, #0xB ; Lock bits - way 2
]
[ "$way"="WAY_3"
MOV r2, #0x7 ; Lock bits - way 3
]
lock_loop$l
SET_ICACHE_LOCKDOWN r2 ; Set lock-down mode
ICACHE_PREFETCH r0 ; Force ICache linefill for one seg
ADD r0, r0, #CACHE_NUM_COLUMN ; Next cache line address
ADD r3, r3, #1 ; Next line
CMP r3, r1 ; Last line?
BNE lock_loop$l
[ "$way"="WAY_0"
MOV r2, #0x1 ; Lock bits - way 0
]
[ "$way"="WAY_1"
MOV r2, #0x2 ; Lock bits - way 1
]
[ "$way"="WAY_2"
MOV r2, #0x4 ; Lock bits - way 2
]
[ "$way"="WAY_3"
MOV r2, #0x8 ; Lock bits - way 3
]
SET_ICACHE_LOCKDOWN r2 ; Set lock-down mode to ways 0,1,2
RESTORE 0, 3
LOCAL_END
MEND
;------------------------------------------------------------------------------
;
; Macro: $label DCACHE_LOCKDOWN_WAY $way (r0 = start, r1 = nlines)
;
; Origin This macro is the 926 version of 'DCACHE_LOCKDOWN' macro found in System-Macros
;
; Function This macro performs a lockdown of data in the DCache way $way
; It locks the number of lines (diagonals) requested in R1*3,
; starting from address R0, into way $way (for a total of
; CACHE_NUM_COLUMN / 4 * R1 * R2 words, with R2=3 seg).
;
; Warning This macro uses R0 and R1 as global arguments !!
;
;
; Internally: All registers preserved, except for flags.
;
MACRO
$label DCACHE_LOCKDOWN_WAY $way
$label LOCAL
PRESERVE 0, 4
MOV r3, #0 ; Init line counter
MOV r2, #3
MUL r1, r2, r1 ; Init block counter
[ "$way"="WAY_0"
MOV r2, #0xE ; Lock bits - way 0
]
[ "$way"="WAY_1"
MOV r2, #0xD ; Lock bits - way 1
]
[ "$way"="WAY_2"
MOV r2, #0xB ; Lock bits - way 2
]
[ "$way"="WAY_3"
MOV r2, #0x7 ; Lock bits - way 3
]
lock_loop$l
SET_DCACHE_LOCKDOWN r2 ; Set lock-down mode
LDR r4, [r0] ; Force DCache linefill for one seg
ADD r0, r0, #CACHE_NUM_COLUMN ; Next cache line address
ADD r3, r3, #1 ; Next line
CMP r3, r1 ; Last line?
BNE lock_loop$l
[ "$way"="WAY_0"
MOV r2, #0x1 ; Lock bits - way 0
]
[ "$way"="WAY_1"
MOV r2, #0x2 ; Lock bits - way 1
]
[ "$way"="WAY_2"
MOV r2, #0x4 ; Lock bits - way 2
]
[ "$way"="WAY_3"
MOV r2, #0x8 ; Lock bits - way 3
]
SET_DCACHE_LOCKDOWN r2 ; Set lock-down mode to ways 0,1,2
RESTORE 0, 4
LOCAL_END
MEND
;
; a macro to disable random FIQs generated via the trickbox. This is used
; mainly for RIS with random configs. If RIS decides to generate a test using
; FIQ mode then it uses this macro to disable random FIQs. Same for the
; following 2 macros.
;
MACRO
$label ARM926EJ_DISABLE_FIQ
LOCAL
b start$l
temp1$l DCD 0
temp2$l DCD 0
start$l
str r0,temp1$l
str r1,temp2$l
mov r0,#TB_BASE
ldr r1,[r0]
bic r1,r1,#(1 :SHL: 6)
str r1,[r0]
ldr r0,temp1$l
ldr r1,temp2$l
LOCAL_END
MEND
MACRO
$label ARM926EJ_DISABLE_IRQ
LOCAL
b start$l
temp1$l DCD 0
temp2$l DCD 0
start$l
str r0,temp1$l
str r1,temp2$l
mov r0,#TB_BASE
ldr r1,[r0]
bic r1,r1,#(1 :SHL: 5)
str r1,[r0]
ldr r0,temp1$l
ldr r1,temp2$l
LOCAL_END
MEND
MACRO
$label ARM926EJ_DISABLE_ABT
LOCAL
b start$l
temp1$l DCD 0
temp2$l DCD 0
start$l
str r0,temp1$l
str r1,temp2$l
mov r0,#TB_BASE
ldr r1,[r0]
bic r1,r1,#(1 :SHL: 11)
str r1,[r0]
ldr r0,temp1$l
ldr r1,temp2$l
LOCAL_END
MEND
END
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -