led_inth.h

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

#define   GDD_LCH5_LEDINT               132 
#define   GDD_LCH6_LEDINT               133 
#define   GDD_LCH7_LEDINT               134 
// 135: FREE
// ...
// ...
// 159: FREE

#define SECTION_INDEX               0x0100

// Highest Priority level to process the request
#define INTLED_HIGHEST_PRIORITY     0
#define INTLED_LOWEST_PRIORITY      31

// Total Number of interrupts
#define INTLED_NUMBER_OF_INTERRUPTS 160

// INTERRUPT  CONFIGURATION 
// INTLED_InterruptNumber_t, Interrupt Number identifies the Interrupt

// INTLED_InterruptKind_t
// Identify the kind of interrupt: either FIQ/IRQ 
typedef  enum { 
  INTLED_IRQ = 0,
  INTLED_FIQ = 1
} INTLED_InterruptKind_t;

// INTLED_Priority_t: Priority level of the interrupt, 0=highest priority to 31
typedef UWORD8 INTLED_Priority_t;

// INTLED_SensitiveEdge_t: Sensitivity of the incoming interrupt
typedef enum { 
  RISING_EDGE_SENSITIVE = 0,
  HIGH_LEVEL_SENSITIVE    = 1
} INTLED_SensitiveEdge_t;

// INTLED_LevelRegister_t: Define an Interruption 
typedef struct {
  UWORD8                 IntIndex;  
  INTLED_InterruptKind_t   InterruptKind;
  INTLED_Priority_t        Priority;
  INTLED_SensitiveEdge_t   SensitiveEdge;
} INTLED_LevelRegister_t;

// OFFSET OF THE 32 bits REGISTERS
#define INTLED_ITR_OFFSET       0x00 /* Interrupt register offset */ 
#define INTLED_MIR_OFFSET       0x04 /* Mask Interrupt register offset */
#define INTLED_SIR_IRQ_OFFSET   0x10 /* Srce Binary coded IRQ register offset */
#define INTLED_SIR_FIQ_OFFSET   0x14 /* Srce Binary coded FIQ register offset */
#define INTLED_ICR_OFFSET       0x18 /* Interrupt Control register offset */
#define INTLED_ILR_OFFSET       0x1C /* Interrupt Level registers offset */
#define INTLED_GMR_OFFSET       0xA0 /* Interrupt GMR registers offset */

#define INTLED_SET_OFFSET       0x9C /* Interrupt Set registers offset */

#define INTLED_STATUS_OFFSET   0xA0
#define INTLED_OCP_CFG_OFFSET  0xA4
#define INTLED_INTLED_REV_OFFSET 0xA8

// ITR Contains the pending requests READ ONLY and RESET and Clear
#define INTLED_ITR_ADDR         (ARMINTLED_BASE_ADDR+INTLED_ITR_OFFSET)
#define LEV2_INTLED_ITR         (ARMINTLED_L20_BASE_ADDR+INTLED_ITR_OFFSET)

// MIR READ or WRITE, RESET and Clear
#define INTLED_MIR_ADDR         (ARMINTLED_BASE_ADDR+INTLED_MIR_OFFSET)
#define LEV2_INTLED_MIR         (ARMINTLED_L20_BASE_ADDR+INTLED_MIR_OFFSET)

// SIR_IRQ and SIR_FIQ, READ ONLY
// SOURCE_IRQ (Binary coded) 
// The register indicates the interrupt number having requested a MCU action
#define INTLED_SIR_IRQ_ADDR     (ARMINTLED_BASE_ADDR+INTLED_SIR_IRQ_OFFSET)
#define LEV2_INTLED_SIR_IRQ     (ARMINTLED_L20_BASE_ADDR+INTLED_SIR_IRQ_OFFSET)
// SOURCE_FIQ (Binary coded)
// The register indicates the interrupt number having requested a MCU action
#define INTLED_SIR_FIQ_ADDR     (ARMINTLED_BASE_ADDR+INTLED_SIR_FIQ_OFFSET)
#define LEV2_INTLED_SIR_FIQ     (ARMINTLED_L20_BASE_ADDR+INTLED_SIR_FIQ_OFFSET)

// Interrupt Control Register READ/WRITE
#define INTLED_ICR_ADDR         (ARMINTLED_BASE_ADDR+INTLED_ICR_OFFSET)
#define LEV2_INTLED_ICR         (ARMINTLED_L20_BASE_ADDR+INTLED_ICR_OFFSET)

// ILR REGISTERS define all int type and respective attributes
// - Kind of IT    : either IFQ or IRQ
// - Priority      : Priority level to process the request
// - Sensitive Edge: Either Falling Edge or Low Level Sensitive
// READ/WRITE
#define INTLED_ILR_ADDR         (ARMINTLED_BASE_ADDR+INTLED_ILR_OFFSET)
#define LEV2_INTLED_ILR         (ARMINTLED_L20_BASE_ADDR+INTLED_ILR_OFFSET)

#define INTLED_SET_ADDR         (ARMINTLED_BASE_ADDR+INTLED_SET_OFFSET)

#define INTLED_GMR_ADDR         (ARMINTLED_BASE_ADDR+INTLED_GMR_OFFSET)
#define LEV2_INTLED_OCP_CFG     (ARMINTLED_L20_BASE_ADDR+INTLED_OCP_CFG_OFFSET)

// Bit definition of Interrupt Level Registers(Same for ext & internal)
#define INTLED_FIQNIRQ_POSBIT        0
#define INTLED_SENSITIVE_EDGE_POSBIT 1
#define INTLED_PRIORITY_POSBIT       2

// Bit definition of INTLED Control Register
#define INTLED_NEW_IRQ_AGR_POSBIT  0
#define INTLED_NEW_FIQ_AGR_POSBIT  1

/*------------------------------------------------------------------------------
 NAME: INTLED_InitLevel: Add an interrupt into the Interrupt Level Registers
 DESCRIPTION : Initialize the given interrupt kind either FIQ or IRQ
               into the Interrupt Level Registers at the position defined
               by IntIndex setting its SensitiveEdge and priority
 PARAMETERS  :
   IntIndex = predefined order number is the IT position
                     into the Interrupt Level Register range 0 .. 160
   InterruptKind   = IRQ of FIQ interrupt, INTLED_FIQ or INTLED_IRQ
   SensEdge        = Define the edge triggered interrupt
                     FALLING_EDGE_SENSITIVE or LOW_LEVEL_SENSITIVE
   Priority        = Priority level of the interrupt
                     0=highest priority
 RETURN VALUE: None
 LIMITATIONS : None
------------------------------------------------------------------------------*/
void INTLED_InitLevel (UWORD8               IntIndex, 
                     INTLED_InterruptKind_t InterruptKind ,
                     INTLED_Priority_t      Priority,
                     INTLED_SensitiveEdge_t SensitiveEdge);

/*------------------------------------------------------------------------------
 NAME        : INTLED_ResetIT
 DESCRIPTION : Reset all the pending INT, Reset INTLED level 2 and all INT
 PARAMETERS  : None
 RETURN VALUE: None
 LIMITATIONS : None
------------------------------------------------------------------------------*/
void INTLED_ResetINT(void);

/*------------------------------------------------------------------------------
 MACRO       : INTLED_EnableOneIT: Unmask the selected interrupt
 DESCRIPTION : Unmask the given Interrupt or Enable one interrupt
 PARAMETERS  :
   Interrupt = Interrupt number(range 0..159) corresponding to the INT
               Fiq_or_Irq:  INTLED_IRQ or INTLED_FIQ
               See Interrupt Configuration above.
 RETURN VALUE: None
 LIMITATIONS : Must be called on Incoming IT
------------------------------------------------------------------------------*/
void INTLED_EnableOneIT(UWORD8 IntIndex, BOOL Fiq_or_Irq);

/*------------------------------------------------------------------------------
 MACRO       : INTLED_DisableOneIT: Mask the selected interrupt
 DESCRIPTION : Mask the given Interrupt or Disable one interrupt
 PARAMETERS  :
   Interrupt = Interrupt number(range 0..159) corresponding to the INT
               See Interrupt Configuration above.
 RETURN VALUE: None
 LIMITATIONS : None
------------------------------------------------------------------------------*/
void INTLED_DisableOneIT(UWORD8 Interrupt);

/*-----------------------------------------------------------------------
 MACRO : INTLED_ValidNext: Validate the next INT depending on the current
 DESCRIPTION : Acknowledge the active interrupt and return the origin of the 
               interrupt (binary format) by reading the Source IRQ/FIQ register.
               In case of sensitive edge Interrupt, the IT register bit is
               deactivated when reading the Source IRQ/FIQ register otherwise,
               it's reset when the corresponding interrupt becomes inactive.
               After processing the Interrupt FIQ/IRQ sequence,
   Set the dedicated bit NEW_IQ_AGR/NEW_FIQ/AGR of Control Register
   in order to reset IRQ Output and Source IRQ/FIQ register and thus,
   to allow a new IRQ/FIQ catching.
 PARAMETERS  : Fiq_or_Irq: Identify the kind of interrupt: either FIQ/IRQ
 RETURN VALUE: None
 LIMITATIONS : Must be called after the end of IT treatment to enable
               a new interrupt catching
-----------------------------------------------------------------------*/
void INTLED_ValidNextInt(INTLED_InterruptKind_t Fiq_or_Irq);

/*------------------------------------------------------------------------------
 MACRO       : INTLED_CurrentInt Get all the pending interrupts 
 DESCRIPTION : Get the current It and valid the next one
 PARAMETERS  : Fiq_or_Irq:  INTLED_IRQ or INTLED_FIQ
 RETURN VALUE: Number of the active and acknowledged Interrupt
 LIMITATIONS : Must be called on Incoming INT
------------------------------------------------------------------------------*/
UWORD8 INTLED_GetCurrentInt (BOOL Fiq_or_Irq);


#endif /* _LED_INTLED_LED__HH */