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📄 usb_otg_hhc.h

📁 OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器
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#define            USB_OTG_HHC_HCCONTROL_16_2_RESERVED_POS                                                               11
#define            USB_OTG_HHC_HCCONTROL_16_2_RESERVED_NUMB                                                              21
#define            USB_OTG_HHC_HCCONTROL_16_2_RESERVED_RES_VAL                                                           0x0
//R

#define            USB_OTG_HHC_HCCONTROL_16_2_RWE_POS                                                                    10
#define            USB_OTG_HHC_HCCONTROL_16_2_RWE_NUMB                                                                   1
#define            USB_OTG_HHC_HCCONTROL_16_2_RWE_RES_VAL                                                                0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_16_2_RWC_POS                                                                    9
#define            USB_OTG_HHC_HCCONTROL_16_2_RWC_NUMB                                                                   1
#define            USB_OTG_HHC_HCCONTROL_16_2_RWC_RES_VAL                                                                0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_16_2_IR_POS                                                                     8
#define            USB_OTG_HHC_HCCONTROL_16_2_IR_NUMB                                                                    1
#define            USB_OTG_HHC_HCCONTROL_16_2_IR_RES_VAL                                                                 0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_16_2_HCFS_POS                                                                   6
#define            USB_OTG_HHC_HCCONTROL_16_2_HCFS_NUMB                                                                  2
#define            USB_OTG_HHC_HCCONTROL_16_2_HCFS_RES_VAL                                                               0x00
//R/W

#define            USB_OTG_HHC_HCCONTROL_16_2_BLE_POS                                                                    5
#define            USB_OTG_HHC_HCCONTROL_16_2_BLE_NUMB                                                                   1
#define            USB_OTG_HHC_HCCONTROL_16_2_BLE_RES_VAL                                                                0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_16_2_CLE_POS                                                                    4
#define            USB_OTG_HHC_HCCONTROL_16_2_CLE_NUMB                                                                   1
#define            USB_OTG_HHC_HCCONTROL_16_2_CLE_RES_VAL                                                                0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_16_2_IE_POS                                                                     3
#define            USB_OTG_HHC_HCCONTROL_16_2_IE_NUMB                                                                    1
#define            USB_OTG_HHC_HCCONTROL_16_2_IE_RES_VAL                                                                 0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_16_2_PLE_POS                                                                    2
#define            USB_OTG_HHC_HCCONTROL_16_2_PLE_NUMB                                                                   1
#define            USB_OTG_HHC_HCCONTROL_16_2_PLE_RES_VAL                                                                0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_16_2_CBSR_POS                                                                   0
#define            USB_OTG_HHC_HCCONTROL_16_2_CBSR_NUMB                                                                  2
#define            USB_OTG_HHC_HCCONTROL_16_2_CBSR_RES_VAL                                                               0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_32                                                                            REG32(USB_OTG_HHC_BASE_ADDR_ARM+USB_OTG_HHC_HCCONTROL_OFFSET*coeff32_arm)


#define            USB_OTG_HHC_HCCONTROL_32_RESERVED_POS                                                                 11
#define            USB_OTG_HHC_HCCONTROL_32_RESERVED_NUMB                                                                21
#define            USB_OTG_HHC_HCCONTROL_32_RESERVED_RES_VAL                                                             0x0
//R

#define            USB_OTG_HHC_HCCONTROL_32_RWE_POS                                                                      10
#define            USB_OTG_HHC_HCCONTROL_32_RWE_NUMB                                                                     1
#define            USB_OTG_HHC_HCCONTROL_32_RWE_RES_VAL                                                                  0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_32_RWC_POS                                                                      9
#define            USB_OTG_HHC_HCCONTROL_32_RWC_NUMB                                                                     1
#define            USB_OTG_HHC_HCCONTROL_32_RWC_RES_VAL                                                                  0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_32_IR_POS                                                                       8
#define            USB_OTG_HHC_HCCONTROL_32_IR_NUMB                                                                      1
#define            USB_OTG_HHC_HCCONTROL_32_IR_RES_VAL                                                                   0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_32_HCFS_POS                                                                     6
#define            USB_OTG_HHC_HCCONTROL_32_HCFS_NUMB                                                                    2
#define            USB_OTG_HHC_HCCONTROL_32_HCFS_RES_VAL                                                                 0x00
//R/W

#define            USB_OTG_HHC_HCCONTROL_32_BLE_POS                                                                      5
#define            USB_OTG_HHC_HCCONTROL_32_BLE_NUMB                                                                     1
#define            USB_OTG_HHC_HCCONTROL_32_BLE_RES_VAL                                                                  0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_32_CLE_POS                                                                      4
#define            USB_OTG_HHC_HCCONTROL_32_CLE_NUMB                                                                     1
#define            USB_OTG_HHC_HCCONTROL_32_CLE_RES_VAL                                                                  0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_32_IE_POS                                                                       3
#define            USB_OTG_HHC_HCCONTROL_32_IE_NUMB                                                                      1
#define            USB_OTG_HHC_HCCONTROL_32_IE_RES_VAL                                                                   0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_32_PLE_POS                                                                      2
#define            USB_OTG_HHC_HCCONTROL_32_PLE_NUMB                                                                     1
#define            USB_OTG_HHC_HCCONTROL_32_PLE_RES_VAL                                                                  0x0
//R/W

#define            USB_OTG_HHC_HCCONTROL_32_CBSR_POS                                                                     0
#define            USB_OTG_HHC_HCCONTROL_32_CBSR_NUMB                                                                    2
#define            USB_OTG_HHC_HCCONTROL_32_CBSR_RES_VAL                                                                 0x0
//R/W


//USB_OTG_HHC_HCCOMMANDSTATUS
//-------------------
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0                                                                    REG16(USB_OTG_HHC_BASE_ADDR_ARM+USB_OTG_HHC_HCCOMMANDSTATUS_OFFSET*coeff16_arm+0)


#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_RESERVED2_POS                                                        18
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_RESERVED2_NUMB                                                       14
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_RESERVED2_RES_VAL                                                    0x0
//R

#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_SOC_POS                                                              16
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_SOC_NUMB                                                             2
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_SOC_RES_VAL                                                          0x0
//R

#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_RESERVED1_POS                                                        4
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_RESERVED1_NUMB                                                       12
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_RESERVED1_RES_VAL                                                    0x0
//R

#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_OCR_POS                                                              3
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_OCR_NUMB                                                             1
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_OCR_RES_VAL                                                          0X0
//R/W

#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_BLF_POS                                                              2
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_BLF_NUMB                                                             1
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_BLF_RES_VAL                                                          0x0
//R/W

#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_CLF_POS                                                              1
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_CLF_NUMB                                                             1
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_CLF_RES_VAL                                                          0x0
//R/W

#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_HCR_POS                                                              0
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_HCR_NUMB                                                             1
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_0_HCR_RES_VAL                                                          0x0
//R/W

#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2                                                                    REG16(USB_OTG_HHC_BASE_ADDR_ARM+USB_OTG_HHC_HCCOMMANDSTATUS_OFFSET*coeff16_arm+2)


#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_RESERVED2_POS                                                        18
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_RESERVED2_NUMB                                                       14
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_RESERVED2_RES_VAL                                                    0x0
//R

#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_SOC_POS                                                              16
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_SOC_NUMB                                                             2
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_SOC_RES_VAL                                                          0x0
//R

#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_RESERVED1_POS                                                        4
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_RESERVED1_NUMB                                                       12
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_RESERVED1_RES_VAL                                                    0x0
//R

#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_OCR_POS                                                              3
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_OCR_NUMB                                                             1
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_OCR_RES_VAL                                                          0X0
//R/W

#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_BLF_POS                                                              2
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_BLF_NUMB                                                             1
#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_BLF_RES_VAL                                                          0x0
//R/W

#define            USB_OTG_HHC_HCCOMMANDSTATUS_16_2_CLF_POS                                                              1

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