gdmatest_omap32.h
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//=====================================================================
// TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
// Property of Texas Instruments -- For Unrestricted Internal Use Only
// Unauthorized reproduction and/or distribution is strictly prohibited
// This product is protected under copyright law and trade secret law as
// an unpublished work.Created 2001,(C) Copyright 2001 Texas Instruments.
// All rights reserved.
//=====================================================================
#include "test.h"
#ifndef _GDMATEST_OMAP32__HH
#define _GDMATEST_OMAP32__HH
//-------------------------------------------------------------------------------
// NAME : DMAT_SpyWriteFailResults_OMAP32
//
// DESCRIPTION : Verify the data in the destination using the same algorithm
// than for the source
//
// PARAMETERS : ChannelNumber DMA_CHANNEL_0
// DMA_CHANNEL_1
// DMA_CHANNEL_2
// DMA_CHANNEL_3
// DMA_CHANNEL_4
// DMA_CHANNEL_5
// DMA_CHANNEL_6
// DMA_CHANNEL_7
// DMA_CHANNEL_8
// DMA_CHANNEL_9
// DMA_CHANNEL_10
// DMA_CHANNEL_11
// DMA_CHANNEL_12
// DMA_CHANNEL_13
// DMA_CHANNEL_14
// DMA_CHANNEL_15
// DMA_CHANNEL_LCD
// i Loop counter value
// FailData Memory read data to write into spy
// ExpectedData Generated pattern data expected from memory.
//
//
// RETURN VALUE : none
//
//--------------------------------------------------------------------------------
BOOL DMAT_SpyWriteFailResults_OMAP32( UWORD16 ChannelNumber, UWORD16 i, UWORD16 FailData, UWORD16 ExpectedData);
//-------------------------------------------------------------------------------
// NAME : DMAT_InitializeOrVerifyData_OMAP32
//
// DESCRIPTION : Either initialize or Verify the data involved in the DMA transfer.
//
// PARAMETERS : ChannelNumber DMA_CHANNEL_0
// DMA_CHANNEL_1
// DMA_CHANNEL_2
// DMA_CHANNEL_3
// DMA_CHANNEL_4
// DMA_CHANNEL_5
// DMA_CHANNEL_6
// DMA_CHANNEL_7
// DMA_CHANNEL_8
// DMA_CHANNEL_9
// DMA_CHANNEL_10
// DMA_CHANNEL_11
// DMA_CHANNEL_12
// DMA_CHANNEL_13
// DMA_CHANNEL_14
// DMA_CHANNEL_15
// DMA_CHANNEL_LCD
// MemMode INITIALIZE_MEM
// VERIFY_MEM
//
//
// RETURN VALUE : IS_OK or NOT_OK if something fail
//
//--------------------------------------------------------------------------------
BOOL DMAT_InitializeOrVerifyData( UWORD16 ChannelNumber, UWORD16 MemMode );
//-------------------------------------------------------------------------------
// NAME : DMAT_InitWithPattern_OMAP32
//
// DESCRIPTION : Setup everything which is involved with data in the channel
//
// PARAMETERS : ChannelNumber DMA_CHANNEL_0
// DMA_CHANNEL_1
// DMA_CHANNEL_2
// DMA_CHANNEL_3
// DMA_CHANNEL_4
// DMA_CHANNEL_5
// DMA_CHANNEL_6
// DMA_CHANNEL_7
// DMA_CHANNEL_8
// DMA_CHANNEL_9
// DMA_CHANNEL_10
// DMA_CHANNEL_11
// DMA_CHANNEL_12
// DMA_CHANNEL_13
// DMA_CHANNEL_14
// DMA_CHANNEL_15
// DMA_CHANNEL_LCD
//
// Config See DMA_CONFIG... labels in dmatest.h
//
//
// RETURN VALUE : IS_OK or NOT_OK if something fail
//
//--------------------------------------------------------------------------------
BOOL DMAT_InitWithPattern_OMAP32( UWORD16 ChannelNumber ,
UWORD16 Pattern,
UWORD8 Eltype,
UWORD8 SrcPack,
UWORD8 DestPack,
UWORD8 SrcBurst,
UWORD8 DestBurst,
UWORD8 SyncNumb,
UWORD8 EventSync,
UWORD8 Priority,
UWORD8 Autoinit,
UWORD8 OMAP31Disable,
UWORD8 SrcAmode,
UWORD8 DestAmode,
UWORD16 EltNumber,
UWORD16 FrameNumber,
UWORD16 EltIndex,
UWORD16 FrameIndex,
UWORD16 DestElementIndex,
UWORD32 Color,
UWORD8 ConstantFillEnable,
UWORD8 TransparentEnable,
UWORD8 BlockSynchronizationEnable,
UWORD8 LogicalChannelType,
UWORD8 LogicalChannelInterleave);
//--------------------------------------------------------------------------------
// DMAT_InitWithPattern_BURST FOR CCP OR CAMERA
//
//DMA_CHANNEL_0, ChannelNumber
//DMA_PATTERN_LCD_0 , Pattern,
//DMA_AUTOGATE_OFF, Autogating_on #define DMA_AUTOGATE_OFF 0x0 DMA_GCR
//DMA_FREE_RUNNING, Free #define DMA_FREE_RUNNING 0x1 DMA_GCR
//DMA_TYPE_32_BITS, TypeSize #define DMA_TYPE_32_BITS 0x2 DMA_CSDP
//DMA_SINGLE_BURST, SrcBurst- #define DMA_SINGLE_BURST 0x0 DMA_CSDP
//DMA_BURST_4, DestBurst- #define DMA_BURST_4 0x2 DMA_CSDP
//DMA_SYNC_1, SyncNumb- #define DMA_SYNC_1 0x1 DMA_CCR
//DMA_FRAME_SYNCHRONIZED, EventSync;//fs #define DMA_FRAME_SYNCHRONIZED 0x1 DMA_CCR
//DMA_HIGH_PRIORITY, Priority- #define DMA_HIGH_PRIORITY 0x1 DMA_CCR
//DMA_AUTOINIT_OFF, Autoinit #define DMA_AUTOINIT_OFF 0x0 DMA_CCR
//DMA_COMPATIBLE_DIS, OMAP31Disable- #define DMA_COMPATIBLE_DIS 0x1 DMA_CCR
//DMA_ADD_CONSTANT, SrcAddressMode- #define DMA_ADD_CONSTANT 0x0 DMA_CCR
//DMA_ADD_SINGLE_INDEX, DestAddressMode #define DMA_ADD_SINGLE_INDEX 0x2 DMA_CCR
//256, EltNumber DMA_CEN
//8, FrameNumber DMA_CFN
//0, EltIndex DMA_CEI//DMA_CSEI
//64, FrameIndex [Treshold value (64 for ti_camera and 4 for CCP)] DMA_CFI//DMA_CSFI
//0, DestElementIndex DMA_CDEI
//DMA_CFE_DISABLE, ConstantFillEnable #define DMA_CFE_DISABLE 0 DMA_CCR2
//DMA_TCE_DISABLE, TransparentEnable #define DMA_TCE_DISABLE 0 DMA_CCR2
//DMA_BSE_ENABLE, BlockSynchronizationEnable #define DMA_BSE_ENABLE 1 DMA_CCR2
//DMA_PSE_ENABLE, PacketSizecsfi #define DMA_PSE_ENABLE 1 DMA_CCR2
//DMA_LCH_TYP_PD, LogicalChannelType #define DMA_LCH_TYP_PD 0x7 DMA_LCH_CTRL
//DMA_LCH_INTERLEAVE_EN LogicalChannelInterleave #define DMA_LCH_INTERLEAVE_EN 0x1 DMA_LCH_CTRL
//
//
//RETURN VALUE : IS_OK or NOT_OK if something fail
//--------------------------------------------------------------------------------
BOOL DMAT_InitWithPattern_BURST( UWORD16 ChannelNumber ,
UWORD16 Pattern,
//UWORD8 Autogating_on,
//UWORD8 Free,
UWORD8 TypeSize,
UWORD8 SrcBurst,
UWORD8 DestBurst,
UWORD8 SyncNumb,
UWORD8 EventSync,
UWORD8 Priority,
UWORD8 Autoinit,
UWORD8 OMAP31Disable,
UWORD8 SrcAddressMode,
UWORD8 DestAddressMode,
UWORD16 EltNumber,
UWORD16 FrameNumber,
UWORD16 EltIndex,
UWORD16 FrameIndex,
UWORD16 DestElementIndex,
UWORD8 ConstantFillEnable,
UWORD8 TransparentEnable,
UWORD8 BlockSynchronizationEnable,
UWORD8 PacketSizecsfi,
UWORD8 LogicalChannelType,
UWORD8 LogicalChannelInterleave);
//-------------------------------------------------------------------------------
// NAME : DMAT_ChainingSetup
//
// DESCRIPTION : Setup Chaining for the logical channels
//
// PARAMETERS : ChannelNumber DMA_CHANNEL_0
// DMA_CHANNEL_1
// DMA_CHANNEL_2
// DMA_CHANNEL_3
// DMA_CHANNEL_4
// DMA_CHANNEL_5
// DMA_CHANNEL_6
// DMA_CHANNEL_7
// DMA_CHANNEL_8
// DMA_CHANNEL_9
// DMA_CHANNEL_10
// DMA_CHANNEL_11
// DMA_CHANNEL_12
// DMA_CHANNEL_13
// DMA_CHANNEL_14
// DMA_CHANNEL_15
//
// Config See DMA_CONFIG... labels in dmatest.h
//
//
// RETURN VALUE : IS_OK or NOT_OK if something fail
//
//--------------------------------------------------------------------------------
BOOL DMAT_ChainingSetup(
UWORD16 ChannelNumber ,
UWORD8 NextLogicalChannel, BIT ChainingEnable);
//-------------------------------------------------------------------------------
// NAME : DMAT_ConfigPort_OMAP32
//
// DESCRIPTION : Setup port configuration involved with data in the channel
//
//
// PARAMETERS : ChannelNumber DMA_CHANNEL_0
// DMA_CHANNEL_1
// DMA_CHANNEL_2
// DMA_CHANNEL_3
// DMA_CHANNEL_4
// DMA_CHANNEL_5
// DMA_CHANNEL_6
// DMA_CHANNEL_7
// DMA_CHANNEL_8
// DMA_CHANNEL_9
// DMA_CHANNEL_10
// DMA_CHANNEL_11
// DMA_CHANNEL_12
// DMA_CHANNEL_13
// DMA_CHANNEL_14
// DMA_CHANNEL_15
//
//
// SrcPort DMA_EMIFF
// DMA_EMIFS
// DMA_OCPT1
// DMA_RHEA
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