i2c.h

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/******************************************************************************
            TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION           
                                                                             
   Property of Texas Instruments -- For  Unrestricted  Internal  Use  Only 
   Unauthorized reproduction and/or distribution is strictly prohibited.  This 
   product  is  protected  under  copyright  law  and  trade  secret law as an 
   unpublished work.  Created 1987, (C) Copyright 2000 Texas Instruments.  All 
   rights reserved.                                                            
                  
                                                           
   Filename       	: i2c.h

   Description    	: I2C library

   Project        	: Ulysse (creation)
   Adapted for Helen

   Author         	: [e-mail], Sylvie Albert
   Modified for Helen by : [e-mail], Jean-Philippe Ulpiano

*******************************************************************************/


#ifndef _I2C_H
#define _I2C_H


#include "result.h"
#include "test.h"
#include "global_types.h"

#ifdef SET32BITS
  #undef SET32BITS
#endif
// Reestablishing 32-bit alignment at release 0.11
#define SET32BITS(ADDR) ((ADDR)<<2)


#define I2C_IS 1
#define I2C_NOT 0

#define I2C_TEST_REGISTER_RESET_VALUE8(RegisterName)\
                                                     \
      if((RegisterName&0xFF)!=((RegisterName ## _RES_VAL)&0xFF))\
        RES_Set(RegisterName ## _BAD_RESET_VALUE);          
        
#define I2C_MODIFY_REGISTER_RESET_VALUE8(RegisterName)\
                                                       \
      RegisterName=((~(RegisterName ## _RES_VAL))&0xFF);          \
      if((RegisterName&0xFF)!=((~(RegisterName ## _RES_VAL))&0xFF))\
      {                                                   \
        RES_Set(RegisterName ## _BAD_RESET_VALUE);         \
        RES_Set(DATA_STORE);                                \
        RES_Set(0x0001);                                     \
      }    
 
// this is the time for transmitting 1 byte (+15%)  with i2c in Helen (clock 12 MHz)
#define TIME_TO_WAIT     0x008F
          
/*************************
  Registers description   
*************************/

// Device Register
//=================
#define I2C_DEVICE_OFFSET           SET32BITS(0x00)
#define I2C_DEVICE_REG              (REG8(MAP_I2C_REG+I2C_DEVICE_OFFSET))

#define DEVICE_DEVICE_POS           0x0
#define DEVICE_DEVICE_NUMB          0x7
#define DEVICE_DEVICE_RES_VAL       0x0

// Adress Register
//=================
#define I2C_ADDRESS_OFFSET          SET32BITS(0x01)
#define I2C_ADDRESS_REG             (REG8(MAP_I2C_REG+I2C_ADDRESS_OFFSET))
#define I2C_ADDRESS_REG_RES_VAL     0x0

// Write Register
//================
#define I2C_DATA_WRITE_OFFSET       SET32BITS(0x02)
#define I2C_DATA_WRITE_REG          (REG8(MAP_I2C_REG+I2C_DATA_WRITE_OFFSET))
#define I2C_DATA_WRITE_REG_RES_VAL  0x00

// Read Register
//===============
#define I2C_DATA_READ_OFFSET        SET32BITS(0x03)
#define I2C_DATA_READ_REG           (REG8(MAP_I2C_REG+I2C_DATA_READ_OFFSET))
#define I2C_DATA_READ_REG_RES_VAL   0x00

// Cmd Register
//==============
#define I2C_CMD_OFFSET              SET32BITS(0x04)
#define I2C_CMD_REG                 (REG8(MAP_I2C_REG+I2C_CMD_OFFSET))

#define CMD_SOFT_RESET_POS          0x0
#define CMD_SOFT_RESET_NUMB         0x1
#define CMD_SOFT_RESET_RES_VAL      0x1

#define CMD_ENCLK_POS               0x1
#define CMD_ENCLK_NUMB         	0x1
#define CMD_ENCLK_RES_VAL           0x0

#define CMD_START_POS               0x2
#define CMD_START_NUMB              0x1
#define CMD_START_RES_VAL           0x0

#define CMD_RW_POS                  0x3
#define CMD_RW_NUMB                 0x1
#define CMD_RW_RES_VAL              0x0

#define CMD_COMBREAD_POS            0x4
#define CMD_COMBREAD_NUMB           0x1
#define CMD_COMBREAD_RES_VAL        0x1

#define CMD_IRQMSK_POS              0x5
#define CMD_IRQMSK_NUMB             0x1
#define CMD_IRQMSK_RES_VAL          0x0

#define I2C_CK_ENABLE               1
#define I2C_CK_DISABLE              0

#define I2C_SET_RESET               1
#define I2C_STOP_RESET              0

// Conf FIFO Register
//====================
#define I2C_CONF_FIFO_OFFSET        SET32BITS(0x05)
#define I2C_CONF_FIFO_REG           (REG8(MAP_I2C_REG+I2C_CONF_FIFO_OFFSET)) 

#define CFIFO_FIFOSIZE_POS          0x0
#define CFIFO_FIFOSIZE_NUMB         0x4
#define CFIFO_FIFOSIZE_RES_VAL      0xF

// Conf CLK Register
//===================
#define I2C_CONF_CLK_OFFSET         SET32BITS(0x06)
#define I2C_CONF_CLK_REG            (REG8(MAP_I2C_REG+I2C_CONF_CLK_OFFSET))

#define CLK_PTV_POS              0x0
#define CLK_PTV_NUMB             0x3
#define CLK_PTV_RES_VAL          0x0

#define CLK_SPKF_POS             0x3
#define CLK_SPKF_NUMB            0x3
#define CLK_SPKF_RES_VAL         0x0

// Conf CLK REF Register
//=======================
#define I2C_CONF_CLK_REF_OFFSET     SET32BITS(0x07)
#define I2C_CONF_CLK_REF_REG        (REG8(MAP_I2C_REG+I2C_CONF_CLK_REF_OFFSET))

#define CLKREF_POS                0x0
#define CLKREF_NUMB               0x7
#define CLKREF_RES_VAL            0x0A

// Status FIFO Register
//======================
#define I2C_STATUS_FIFO_OFFSET      SET32BITS(0x08)
#define I2C_STATUS_FIFO_REG         (REG8(MAP_I2C_REG+I2C_STATUS_FIFO_OFFSET))

#define FIFO_READCPT_POS           0x2
#define FIFO_READCPT_NUMB          0x4
#define FIFO_READCPT_RES_VAL       0x0

#define FIFO_EMPTY_POS             0x1
#define FIFO_EMPTY_NUMB            0x1
#define FIFO_EMPTY_RES_VAL         0x1

#define FIFO_FULL_POS              0x0
#define FIFO_FULL_NUMB             0x1
#define FIFO_FULL_RES_VAL          0x0


// Status activity Register
//==========================
#define I2C_STATUS_ACTIVITY_OFFSET  SET32BITS(0x09)
#define I2C_STATUS_ACTIVITY_REG     (REG8(MAP_I2C_REG+I2C_STATUS_ACTIVITY_OFFSET))

#define ACTIVITY_IT_POS            0x3
#define ACTIVITY_IT_NUMB           0x1
#define ACTIVITY_IT_RES_VAL        0x0

#define ACTIVITY_IDLE_POS          0x2
#define ACTIVITY_IDLE_NUMB         0x1
#define ACTIVITY_IDLE_RES_VAL      0x0

#define ACTIVITY_ERRDEV_POS        0x1
#define ACTIVITY_ERRDEV_NUMB       0x1
#define ACTIVITY_ERRDEV_RES_VAL    0x0

#define ACTIVITY_ERRDTA_POS        0x0
#define ACTIVITY_ERRDTA_NUMB       0x1
#define ACTIVITY_ERRDTA_RES_VAL    0x0



/* COMMAND register */
#define I2C_IRQ_MASK    0x20
#define I2C_COMB_READ   0x10
#define I2C_RW          0x08 
#define I2C_START       0x04
#define I2C_EN_CLK      0x02
#define I2C_SOFT_REST   0x01

/* FIFO register */
#define I2C_FIFO_SIZE   0x0f

/* CONFIGURATION CLOCK register */
#define I2C_SPK_F       0x38  /* spike filter */
#define I2C_PTV 	       0x07    /* divisor_1 */

/* CONFIGURATION CLOCK functional reference register 
 the default value is set to 10 */
#define I2C_CLK_REF     0x007f    /* divisor_2 */

/* Status FIFO Register */
#define I2C_FIFO_FULL   0x01

/* Status activity register */
#define I2C_INTERRUPT     0x08
#define I2C_IDDLE         0x04
#define I2C_ERROR_DEVICE  0x02
#define I2C_ERROR_DATA    0x01

/* Device address */
#define I2CDEVICE(X) (I2C_DEVICE_REG) = (X)|((I2C_DEVICE_REG)&(0x00))

/* sub-address */
#define I2CADDRESS(X) ( I2C_ADDRESS_REG) =(X)

/* Data to read */
#define I2CDATA_TO_READ=(I2C_DATA_READ_REG)

/* Data to write */
#define I2CDATA_TO_WRITE(X) (I2C_DATA_WRITE_REG) = (X)  

/* Return Interrupt bit state */
#define I2CIRQ_MASK (I2C_CMD_REG &= I2C_IRQ_MASK)

/* Interrupts enable */
#define I2CIRQ_MASK_EN (I2C_CMD_REG |= I2C_IRQ_MASK)

/* Interrupts disable */
#define I2CIRQ_MASK_DIS (I2C_CMD_REG &= ~I2C_IRQ_MASK)

/* Return FIFO size */
#define I2CFIFO_SIZE (I2C_CONF_FIFO_REG &= I2C_FIFO_SIZE)

/* Execute a soft Reset */
#define I2CSOFT_RESET ( I2C_CMD_REG |= I2C_SOFT_REST)

/* Devalidate Soft Reset */
#define I2CNO_SOFT_RESET ( I2C_CMD_REG &= ~I2C_SOFT_REST)

/* Simple read */
#define I2CSIMPLE_READ (I2C_CMD_REG &= ~I2C_COMB_READ)

/* Combined Read */
#define I2CCOMBINED_READ (I2C_CMD_REG |= I2C_COMB_READ)

/* Read from the bus */
#define I2CREAD ( I2C_CMD_REG |= I2C_RW)

/* Write to the bus */
#define I2CWRITE (I2C_CMD_REG &= ~I2C_RW) 

/* Send START bit */
#define I2CSTART (I2C_CMD_REG |= I2C_START)

/* Return the FIFO_FULL state bit */
#define I2CFIFO_FULL ( I2C_STATUS_FIFO_REG &= I2C_FIFO_FULL)

/* Validate the clock */
#define I2C_CLOCK_ENABLE ( I2C_CMD_REG |= I2C_EN_CLK)

/* Enable the clock */
#define I2C_CLOCK_DISABLE ( I2C_CMD_REG &= ~I2C_EN_CLK)


void I2C_TestResetValue(void);
void I2C_TestRegistersAccess(void);
UWORD32 I2C_Config (UWORD32 rate, UWORD32 spike, UWORD32 FIFOSIZE, UWORD32 IRQ);
void I2C_Config_read_mode(UWORD32 Sonr);
UWORD32 I2C_IsErrorDevice(void);
UWORD32 I2C_IsErrorData(void);
UWORD32 I2C_WriteFifo(UWORD8 data, UWORD32 number_of_data, UWORD32 test_five_parameter);
UWORD32 I2C_IsIdle(void);
BOOL I2C_WaitCompletedTransfer (void);
UWORD32 I2C_Write (UWORD8 device, UWORD8 address, UWORD8 data, UWORD32 number_of_data,UWORD32 waitornot,UWORD32 polorint,UWORD32 test_five_parameter);
UWORD32 I2C_Read (UWORD8 device, UWORD8 address,UWORD8 data, UWORD32 simpleornot,UWORD32 polorint);
UWORD32 I2C_EepromClear (UWORD8 device,UWORD32 value);

UWORD32 I2C_TestI2cReset(UWORD32 *i2cres);
UWORD32 I2C_TestI2cWrRegisters(UWORD32 speed);
UWORD32 I2C_TestI2cTransferInt(UWORD32 speed);
UWORD32 I2C_TestI2cTransferIdle(void);
UWORD32 I2C_TestI2cSoftReset(UWORD32 speed);
UWORD32 I2C_TestI2cErrors(UWORD32 speed);
UWORD32 I2C_WriteHelen ( UWORD8 device, UWORD8 address, UWORD8 data, 
                    UWORD32 number_of_data,UWORD32 waitornot,
                    UWORD32 polorint,UWORD32 test_five_parameter,UWORD16 bytes);
UWORD32 I2C_ReadHelen (UWORD8 device, UWORD8 address,UWORD8 data, \
			UWORD32 simpleornot,UWORD32 polorint);

#endif