wcdma_mrc.h
来自「OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI」· C头文件 代码 · 共 366 行
H
366 行
//========================================================================
// TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION
// Property of Texas Instruments
// For Unrestricted Internal Use Only
// Unauthorized reproduction and/or distribution is strictly prohibited.
// This product is protected under copyright law and trade secret law
// as an unpublished work
// Created 2001, (C) Copyright 2001 Texas Instruments. All rights reserved
//
//========================================================================
#include "wcdma_mapping.h"
#ifndef _wcdma_mrc__H
#define _wcdma_mrc__H
//Standard Register offset list
#define MRC_ENABLE_OFFSET 0xE001
#define MRC_ABORT_OFFSET 0xE003
#define MRC_HALT_OFFSET 0xE004
#define MRC_INT_ENABLE_OFFSET 0xE010
#define MRC_FX0_OFFSET 0xE300
#define MRC_FX1_OFFSET 0xE301
#define MRC_FX2_OFFSET 0xE302
#define MRC_FX3_OFFSET 0xE303
#define MRC_FX4_OFFSET 0xE304
#define MRC_FX5_OFFSET 0xE305
#define MRC_FX6_OFFSET 0xE306
#define MRC_FX7_OFFSET 0xE307
//MRC_ENABLE
//-------------------------
#define MRC_ENABLE REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_ENABLE_OFFSET) << 2))
#define MRC_ENABLE_RES_VAL 0x00000000
//R/W
//No write to this reg are allowed
//-------------------------
//MRC_ABORT
//-------------------------
#define MRC_ABORT REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_ABORT_OFFSET) << 2))
#define MRC_ABORT_RES_VAL 0x00000000
//R/W
//-------------------------
//MRC_HALT
//-------------------------
#define MRC_HALT REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_HALT_OFFSET) << 2))
#define MRC_HALT_RES_VAL 0x00000000
//R/W
//-------------------------
//MRC_INT_ENABLE
//-------------------------
#define MRC_INT_ENABLE REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_INT_ENABLE_OFFSET) << 2))
#define MRC_INT_ENABLE_RES_VAL 0x00000000
//R/W
//-------------------------
//MRC_FX0
//-------------------------
#define MRC_FX0 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_FX0_OFFSET) << 2))
#define MRC_FX0_RES_VAL 0x00000000
//R/W
//-------------------------
//MRC_FX1
//-------------------------
#define MRC_FX1 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_FX1_OFFSET) << 2))
#define MRC_FX1_RES_VAL 0x00000000
//R/W
//-------------------------
//MRC_FX2
//-------------------------
#define MRC_FX2 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_FX2_OFFSET) << 2))
#define MRC_FX2_RES_VAL 0x00000000
//R/W
//-------------------------
//MRC_FX3
//-------------------------
#define MRC_FX3 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_FX3_OFFSET) << 2))
#define MRC_FX3_RES_VAL 0x00000000
//R/W
//-------------------------
//MRC_FX4
//-------------------------
#define MRC_FX4 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_FX4_OFFSET) << 2))
#define MRC_FX4_RES_VAL 0x00000000
//R/W
//-------------------------
//MRC_FX5
//-------------------------
#define MRC_FX5 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_FX5_OFFSET) << 2))
#define MRC_FX5_RES_VAL 0x00000000
//R/W
//-------------------------
//MRC_FX6
//-------------------------
#define MRC_FX6 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_FX6_OFFSET) << 2))
#define MRC_FX6_RES_VAL 0x00000000
//R/W
//-------------------------
//MRC_FX7
//-------------------------
#define MRC_FX7 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_FX7_OFFSET) << 2))
#define MRC_FX7_RES_VAL 0x00000000
//R/W
//-------------------------
#define MRC_ENABLE_RD_MASK 0x00000001
//The MRC_ENABLE reg has no write-able bits
#define MRC_ABORT_RD_MASK 0x00000001
#define MRC_ABORT_WR_MASK 0x00000001
#define MRC_HALT_RD_MASK 0x00000001
#define MRC_HALT_WR_MASK 0x00000001
#define MRC_INT_ENABLE_RD_MASK 0x00000001
#define MRC_INT_ENABLE_WR_MASK 0x00000001
#define MRC_FX0_RD_MASK 0x0000FFFF
#define MRC_FX0_WR_MASK 0x0000FFFF
#define MRC_FX1_RD_MASK 0x0000FFFF
#define MRC_FX1_WR_MASK 0x0000FFFF
#define MRC_FX2_RD_MASK 0x0000FFFF
#define MRC_FX2_WR_MASK 0x0000FFFF
#define MRC_FX3_RD_MASK 0x0000FFFF
#define MRC_FX3_WR_MASK 0x0000FFFF
#define MRC_FX4_RD_MASK 0x0000FFFF
#define MRC_FX4_WR_MASK 0x0000FFFF
#define MRC_FX5_RD_MASK 0x0000FFFF
#define MRC_FX5_WR_MASK 0x0000FFFF
#define MRC_FX6_RD_MASK 0x0000FFFF
#define MRC_FX6_WR_MASK 0x0000FFFF
#define MRC_FX7_RD_MASK 0x0000FFFF
#define MRC_FX7_WR_MASK 0x0000FFFF
//RAM Locations
//MRC_Program_Mem_0
#define MRC_Program_Mem_0_OFFSET 0xe400
#define MRC_Program_Mem_0 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_Program_Mem_0_OFFSET) << 2))
#define MRC_Program_Mem_0_RD_MASK 0x0000FFFF
#define MRC_Program_Mem_0_WR_MASK 0x0000FFFF
//-------------------------
//MRC_Program_Mem_1
#define MRC_Program_Mem_1_OFFSET 0xe401
#define MRC_Program_Mem_1 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_Program_Mem_1_OFFSET) << 2))
#define MRC_Program_Mem_1_RD_MASK 0x0000FFFF
#define MRC_Program_Mem_1_WR_MASK 0x0000FFFF
//-------------------------
//-------------------------
//MRC_Program_Mem_1023
#define MRC_Program_Mem_1023_OFFSET 0xe7ff
#define MRC_Program_Mem_1023 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_Program_Mem_1023_OFFSET) << 2))
#define MRC_Program_Mem_1023_RD_MASK 0x0000FFFF
#define MRC_Program_Mem_1023_WR_MASK 0x0000FFFF
//RAM Locations
//MRC_MEMB_C_0
#define MRC_MEMB_C_0_OFFSET 0xe800
#define MRC_MEMB_C_0 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_MEMB_C_0_OFFSET) << 2))
#define MRC_MEMB_C_0_RD_MASK 0x0000FFFF
#define MRC_MEMB_C_0_WR_MASK 0x0000FFFF
//-------------------------
//MRC_MEMB_C_1
#define MRC_MEMB_C_1_OFFSET 0xe801
#define MRC_MEMB_C_1 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_MEMB_C_1_OFFSET) << 2))
#define MRC_MEMB_C_1_RD_MASK 0x0000FFFF
#define MRC_MEMB_C_1_WR_MASK 0x0000FFFF
//-------------------------
//MRC_MEMB_C_1023
#define MRC_MEMB_C_1023_OFFSET 0xebff
#define MRC_MEMB_C_1023 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_MEMB_C_1023_OFFSET) << 2))
#define MRC_MEMB_C_1023_RD_MASK 0x0000FFFF
#define MRC_MEMB_C_1023_WR_MASK 0x0000FFFF
//RAM Locations
//MRC_MEMA_0
#define MRC_MEMA_0_OFFSET 0xEC00
#define MRC_MEMA_0 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_MEMA_0_OFFSET) << 2))
#define MRC_MEMA_0_RD_MASK 0x00FFFFFF
#define MRC_MEMA_0_WR_MASK 0x00FFFFFF
//-------------------------
//MRC_MEMA_1
#define MRC_MEMA_1_OFFSET 0xEC01
#define MRC_MEMA_1 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_MEMA_1_OFFSET) << 2))
#define MRC_MEMA_1_RD_MASK 0x00FFFFFF
#define MRC_MEMA_1_WR_MASK 0x00FFFFFF
//-------------------------
//MRC_MEMA_1023
#define MRC_MEMA_1023_OFFSET 0xefff
#define MRC_MEMA_1023 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+MRC_MEMA_1023_OFFSET) << 2))
#define MRC_MEMA_1023_RD_MASK 0x00FFFFFF
#define MRC_MEMA_1023_WR_MASK 0x00FFFFFF
//RAM Locations
//FSB_Buffer_0
#define FSB_Buffer_0_OFFSET 0x0000
#define FSB_Buffer_0 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+FSB_Buffer_0_OFFSET) << 2))
#define FSB_Buffer_0_RD_MASK 0xFFFFFFFF
#define FSB_Buffer_0_WR_MASK 0xFFFFFFFF
//-------------------------
//FSB_Buffer_1
#define FSB_Buffer_1_OFFSET 0x0001
#define FSB_Buffer_1 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+FSB_Buffer_1_OFFSET) << 2))
#define FSB_Buffer_1_RD_MASK 0xFFFFFFFF
#define FSB_Buffer_1_WR_MASK 0xFFFFFFFF
//-------------------------
//FSB_Buffer_2
#define FSB_Buffer_2_OFFSET 0x0002
#define FSB_Buffer_2 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+FSB_Buffer_2_OFFSET) << 2))
#define FSB_Buffer_2_RD_MASK 0xFFFFFFFF
#define FSB_Buffer_2_WR_MASK 0xFFFFFFFF
//-------------------------
//FSB_Buffer_3
#define FSB_Buffer_3_OFFSET 0x0003
#define FSB_Buffer_3 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+FSB_Buffer_3_OFFSET) << 2))
#define FSB_Buffer_3_RD_MASK 0xFFFFFFFF
#define FSB_Buffer_3_WR_MASK 0xFFFFFFFF
//-------------------------
//FSB_Buffer_4
#define FSB_Buffer_4_OFFSET 0x0004
#define FSB_Buffer_4 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+FSB_Buffer_4_OFFSET) << 2))
#define FSB_Buffer_4_RD_MASK 0xFFFFFFFF
#define FSB_Buffer_4_WR_MASK 0xFFFFFFFF
//-------------------------
//FSB_Buffer_5
#define FSB_Buffer_5_OFFSET 0x0005
#define FSB_Buffer_5 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+FSB_Buffer_5_OFFSET) << 2))
#define FSB_Buffer_5_RD_MASK 0xFFFFFFFF
#define FSB_Buffer_5_WR_MASK 0xFFFFFFFF
//-------------------------
//FSB_Buffer_6
#define FSB_Buffer_6_OFFSET 0x0006
#define FSB_Buffer_6 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+FSB_Buffer_6_OFFSET) << 2))
#define FSB_Buffer_6_RD_MASK 0xFFFFFFFF
#define FSB_Buffer_6_WR_MASK 0xFFFFFFFF
//-------------------------
//FSB_Buffer_7
#define FSB_Buffer_7_OFFSET 0x0007
#define FSB_Buffer_7 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+FSB_Buffer_7_OFFSET) << 2))
#define FSB_Buffer_7_RD_MASK 0xFFFFFFFF
#define FSB_Buffer_7_WR_MASK 0xFFFFFFFF
//-------------------------
//FSB_Buffer_8
#define FSB_Buffer_8_OFFSET 0x0008
#define FSB_Buffer_8 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+FSB_Buffer_8_OFFSET) << 2))
#define FSB_Buffer_8_RD_MASK 0xFFFFFFFF
#define FSB_Buffer_8_WR_MASK 0xFFFFFFFF
//-------------------------
//FSB_Buffer_9
#define FSB_Buffer_9_OFFSET 0x0009
#define FSB_Buffer_9 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+FSB_Buffer_9_OFFSET) << 2))
#define FSB_Buffer_9_RD_MASK 0xFFFFFFFF
#define FSB_Buffer_9_WR_MASK 0xFFFFFFFF
//-------------------------
//FSB_Buffer_49151
#define FSB_Buffer_49151_OFFSET 0x3fff
#define FSB_Buffer_49151 REG32(WCDMA_CS_LB+((WCDMA_MRC_BASE_ADDR+FSB_Buffer_49151_OFFSET) << 2))
#define FSB_Buffer_49151_RD_MASK 0xFFFFFFFF
#define FSB_Buffer_49151_WR_MASK 0xFFFFFFFF
// Function prototype
void WCDMA_MrcTestResetValue(void);
void WCDMA_MrcTestRegistersAccess(void);
#endif
⌨️ 快捷键说明
复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?