dsp_uart.h

OMAP1030 处理器的ARM 侧硬件测试代码 OMAP1030 是TI的双核处理器

//=====================================================================  
//      TEXAS INSTRUMENTS INCORPORATED PROPRIETARY INFORMATION             
// Property of Texas Instruments -- For Unrestricted Internal Use Only   
// Unauthorized reproduction and/or distribution is strictly prohibited  
// This product is protected under copyright law and trade secret law as 
// an unpublished work.Created 1987,(C) Copyright 1997 Texas Instruments.
// All rights reserved.                                                  
//   Filename             : dsp_uart.h
//
//   Description          : Header file for the MPU DSP_UART 
//
//   Project              : OMAP
//
//   Author               : Achuta Thippana
//
//   MACROS PROVIDED      :
//
//=====================================================================  
#ifndef _DSP_UART_HH
#define _DSP_UART_HH

#include "global_types.h"
#include "mem.h"

/*register address definition*/

#define DSP_UART_RHR1_REG_OFFSET	0x000
#define DSP_UART_THR1_REG_OFFSET	0x000
#define DSP_UART_DLL1_REG_OFFSET	0x000
					
#define DSP_UART_IER1_REG_OFFSET	0x002
#define DSP_UART_DLH1_REG_OFFSET	0x002
					
#define DSP_UART_IIR1_REG_OFFSET	0x004
#define DSP_UART_FCR1_REG_OFFSET	0x004
#define DSP_UART_EFR1_REG_OFFSET	0x004
					
#define DSP_UART_LCR1_REG_OFFSET	0x006 
					
#define DSP_UART_MCR1_REG_OFFSET	0x008
#define DSP_UART_XON1_1_REG_OFFSET	0x008
					
					
#define DSP_UART_LSR1_REG_OFFSET	0x00A
#define DSP_UART_XON1_2_REG_OFFSET	0x00A
					
#define DSP_UART_MSR1_REG_OFFSET	0x00C
#define DSP_UART_TCR1_REG_OFFSET	0x00C
#define DSP_UART_XOFF1_1_REG_OFFSET	0x00C
					
					
#define DSP_UART_SPR1_REG_OFFSET	0x00E
#define DSP_UART_TLR1_REG_OFFSET	0x00E
#define DSP_UART_XOFF1_2_REG_OFFSET	0x00E
					
#define DSP_UART_MDR1_1_REG_OFFSET	0x010
					
#define DSP_UART_UASR_REG_OFFSET	0x012
					
#define DSP_UART_SCR1_REG_OFFSET	0x014
					
#define DSP_UART_SSR1_REG_OFFSET	0x016


#define DSP_UART_RHR1_REG_ADDR	        (MEM_DSP_UART_ADDR + DSP_UART_RHR1_REG_OFFSET)        
#define DSP_UART_THR1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_THR1_REG_OFFSET)        
#define DSP_UART_DLL1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_DLL1_REG_OFFSET)        
					                                
#define DSP_UART_IER1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_IER1_REG_OFFSET)        
#define DSP_UART_DLH1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_DLH1_REG_OFFSET)        
					                                
#define DSP_UART_IIR1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_IIR1_REG_OFFSET)        
#define DSP_UART_FCR1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_FCR1_REG_OFFSET)        
#define DSP_UART_EFR1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_EFR1_REG_OFFSET)        
					                                
#define DSP_UART_LCR1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_LCR1_REG_OFFSET)        
					                                
#define DSP_UART_MCR1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_MCR1_REG_OFFSET)        
#define DSP_UART_XON1_1_REG_ADDR	(MEM_DSP_UART_ADDR + DSP_UART_XON1_1_REG_OFFSET)      
					                                
					                                
#define DSP_UART_LSR1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_LSR1_REG_OFFSET)        
#define DSP_UART_XON1_2_REG_ADDR	(MEM_DSP_UART_ADDR + DSP_UART_XON1_2_REG_OFFSET)      
					                                
#define DSP_UART_MSR1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_MSR1_REG_OFFSET)        
#define DSP_UART_TCR1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_TCR1_REG_OFFSET)        
#define DSP_UART_XOFF1_1_REG_ADDR	(MEM_DSP_UART_ADDR + DSP_UART_XOFF1_1_REG_OFFSET)     
					                                
					                                
#define DSP_UART_SPR1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_SPR1_REG_OFFSET)        
#define DSP_UART_TLR1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_TLR1_REG_OFFSET)        
#define DSP_UART_XOFF1_2_REG_ADDR	(MEM_DSP_UART_ADDR + DSP_UART_XOFF1_2_REG_OFFSET)     
					                                
#define DSP_UART_MDR1_1_REG_ADDR	(MEM_DSP_UART_ADDR + DSP_UART_MDR1_1_REG_OFFSET)      
					                                
#define DSP_UART_UASR_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_UASR_REG_OFFSET)        
					                                
#define DSP_UART_SCR1_REG_ADDR		(MEM_DSP_UART_ADDR + DSP_UART_SCR1_REG_OFFSET)        
					                                
#define DSP_UART_SSR1_REG_ADDR	   	(MEM_DSP_UART_ADDR + DSP_UART_SSR1_REG_OFFSET)        


#define ARM_UART_SWITCH_REG_ADDR        0xFFFCEFFC

/** Reset values of registers **/

/* #define DSP_UART_RHR1_RESET_VAL     -Undefined */
/* #define DSP_UART_THR1_RESET_VAL     -Undefined */	
/* #define DSP_UART_DLL1_RESET_VAL     -Undefined */	
					                                

#define DSP_UART_IER1_RESET_VAL	        0x00
/* #define DSP_UART_DLH1_REG_OFFSET	-Undefined */
					
#define DSP_UART_IIR1_RESET_VAL	        0x01
/* #define DSP_UART_FCR1_RESET_VAL	        0x00 -write only*/
#define DSP_UART_EFR1_RESET_VAL	        0x00
					
#define DSP_UART_LCR1_RESET_VAL	        0x00 
					
#define DSP_UART_MCR1_RESET_VAL	        0x00
/* #define DSP_UART_XON1_1_RESET_VAL	0x008 */
					
					
#define DSP_UART_LSR1_RESET_VAL	        0x60
/* #define DSP_UART_XON1_2_RESET_VAL	0x00A*/
					
#define DSP_UART_MSR1_RESET_VAL	        0x00
#define DSP_UART_TCR1_RESET_VAL	        0x0F 
/* #define DSP_UART_XOFF1_1_RESET_VAL	0x00C */
					
					
/* #define DSP_UART_SPR1_RESET_VAL	0x00E */
#define DSP_UART_TLR1_RESET_VAL	0x00
/* #define DSP_UART_XOFF1_2_RESET_VAL	0x00E */
					
#define DSP_UART_MDR1_1_RESET_VAL	0x07
					
#define DSP_UART_UASR_RESET_VAL	        0x00 
					
#define DSP_UART_SCR1_RESET_VAL	0x00
					
#define DSP_UART_SSR1_RESET_VAL	0x00


#endif